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STM32F769IDiscovery
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uDANTE Audio Networking with STM32F7 DISCO board
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STM32F769IDiscovery
1.00
uDANTE Audio Networking with STM32F7 DISCO board
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TIM. More...
#include <stm32f745xx.h>
Data Fields | |
| __IO uint32_t | CR1 |
| __IO uint32_t | CR2 |
| __IO uint32_t | SMCR |
| __IO uint32_t | DIER |
| __IO uint32_t | SR |
| __IO uint32_t | EGR |
| __IO uint32_t | CCMR1 |
| __IO uint32_t | CCMR2 |
| __IO uint32_t | CCER |
| __IO uint32_t | CNT |
| __IO uint32_t | PSC |
| __IO uint32_t | ARR |
| __IO uint32_t | RCR |
| __IO uint32_t | CCR1 |
| __IO uint32_t | CCR2 |
| __IO uint32_t | CCR3 |
| __IO uint32_t | CCR4 |
| __IO uint32_t | BDTR |
| __IO uint32_t | DCR |
| __IO uint32_t | DMAR |
| __IO uint32_t | OR |
| __IO uint32_t | CCMR3 |
| __IO uint32_t | CCR5 |
| __IO uint32_t | CCR6 |
| __IO uint32_t | AF1 |
| __IO uint32_t | AF2 |
TIM.
Definition at line 879 of file stm32f745xx.h.
| __IO uint32_t AF1 |
TIM Alternate function option register 1, Address offset: 0x60
Definition at line 950 of file stm32f765xx.h.
| __IO uint32_t AF2 |
TIM Alternate function option register 2, Address offset: 0x64
Definition at line 951 of file stm32f765xx.h.
| __IO uint32_t ARR |
TIM auto-reload register, Address offset: 0x2C
Definition at line 892 of file stm32f745xx.h.
| __IO uint32_t BDTR |
TIM break and dead-time register, Address offset: 0x44
Definition at line 898 of file stm32f745xx.h.
| __IO uint32_t CCER |
TIM capture/compare enable register, Address offset: 0x20
Definition at line 889 of file stm32f745xx.h.
| __IO uint32_t CCMR1 |
TIM capture/compare mode register 1, Address offset: 0x18
Definition at line 887 of file stm32f745xx.h.
| __IO uint32_t CCMR2 |
TIM capture/compare mode register 2, Address offset: 0x1C
Definition at line 888 of file stm32f745xx.h.
| __IO uint32_t CCMR3 |
TIM capture/compare mode register 3, Address offset: 0x54
Definition at line 902 of file stm32f745xx.h.
| __IO uint32_t CCR1 |
TIM capture/compare register 1, Address offset: 0x34
Definition at line 894 of file stm32f745xx.h.
| __IO uint32_t CCR2 |
TIM capture/compare register 2, Address offset: 0x38
Definition at line 895 of file stm32f745xx.h.
| __IO uint32_t CCR3 |
TIM capture/compare register 3, Address offset: 0x3C
Definition at line 896 of file stm32f745xx.h.
| __IO uint32_t CCR4 |
TIM capture/compare register 4, Address offset: 0x40
Definition at line 897 of file stm32f745xx.h.
| __IO uint32_t CCR5 |
TIM capture/compare mode register5, Address offset: 0x58
Definition at line 903 of file stm32f745xx.h.
| __IO uint32_t CCR6 |
TIM capture/compare mode register6, Address offset: 0x5C
Definition at line 904 of file stm32f745xx.h.
| __IO uint32_t CNT |
TIM counter register, Address offset: 0x24
Definition at line 890 of file stm32f745xx.h.
| __IO uint32_t CR1 |
TIM control register 1, Address offset: 0x00
Definition at line 881 of file stm32f745xx.h.
| __IO uint32_t CR2 |
TIM control register 2, Address offset: 0x04
Definition at line 882 of file stm32f745xx.h.
| __IO uint32_t DCR |
TIM DMA control register, Address offset: 0x48
Definition at line 899 of file stm32f745xx.h.
| __IO uint32_t DIER |
TIM DMA/interrupt enable register, Address offset: 0x0C
Definition at line 884 of file stm32f745xx.h.
| __IO uint32_t DMAR |
TIM DMA address for full transfer, Address offset: 0x4C
Definition at line 900 of file stm32f745xx.h.
| __IO uint32_t EGR |
TIM event generation register, Address offset: 0x14
Definition at line 886 of file stm32f745xx.h.
| __IO uint32_t OR |
TIM option register, Address offset: 0x50
Definition at line 901 of file stm32f745xx.h.
| __IO uint32_t PSC |
TIM prescaler, Address offset: 0x28
Definition at line 891 of file stm32f745xx.h.
| __IO uint32_t RCR |
TIM repetition counter register, Address offset: 0x30
Definition at line 893 of file stm32f745xx.h.
| __IO uint32_t SMCR |
TIM slave mode control register, Address offset: 0x08
Definition at line 883 of file stm32f745xx.h.
| __IO uint32_t SR |
TIM status register, Address offset: 0x10
Definition at line 885 of file stm32f745xx.h.
1.8.11
