STM32F769IDiscovery  1.00
uDANTE Audio Networking with STM32F7 DISCO board
Data Fields

Digital to Analog Converter. More...

#include <stm32f745xx.h>

Data Fields

__IO uint32_t CR
 
__IO uint32_t SWTRIGR
 
__IO uint32_t DHR12R1
 
__IO uint32_t DHR12L1
 
__IO uint32_t DHR8R1
 
__IO uint32_t DHR12R2
 
__IO uint32_t DHR12L2
 
__IO uint32_t DHR8R2
 
__IO uint32_t DHR12RD
 
__IO uint32_t DHR12LD
 
__IO uint32_t DHR8RD
 
__IO uint32_t DOR1
 
__IO uint32_t DOR2
 
__IO uint32_t SR
 

Detailed Description

Digital to Analog Converter.

Definition at line 336 of file stm32f745xx.h.

Field Documentation

__IO uint32_t CR

DAC control register, Address offset: 0x00

Definition at line 338 of file stm32f745xx.h.

__IO uint32_t DHR12L1

DAC channel1 12-bit left aligned data holding register, Address offset: 0x0C

Definition at line 341 of file stm32f745xx.h.

__IO uint32_t DHR12L2

DAC channel2 12-bit left aligned data holding register, Address offset: 0x18

Definition at line 344 of file stm32f745xx.h.

__IO uint32_t DHR12LD

DUAL DAC 12-bit left aligned data holding register, Address offset: 0x24

Definition at line 347 of file stm32f745xx.h.

__IO uint32_t DHR12R1

DAC channel1 12-bit right-aligned data holding register, Address offset: 0x08

Definition at line 340 of file stm32f745xx.h.

__IO uint32_t DHR12R2

DAC channel2 12-bit right aligned data holding register, Address offset: 0x14

Definition at line 343 of file stm32f745xx.h.

__IO uint32_t DHR12RD

Dual DAC 12-bit right-aligned data holding register, Address offset: 0x20

Definition at line 346 of file stm32f745xx.h.

__IO uint32_t DHR8R1

DAC channel1 8-bit right aligned data holding register, Address offset: 0x10

Definition at line 342 of file stm32f745xx.h.

__IO uint32_t DHR8R2

DAC channel2 8-bit right-aligned data holding register, Address offset: 0x1C

Definition at line 345 of file stm32f745xx.h.

__IO uint32_t DHR8RD

DUAL DAC 8-bit right aligned data holding register, Address offset: 0x28

Definition at line 348 of file stm32f745xx.h.

__IO uint32_t DOR1

DAC channel1 data output register, Address offset: 0x2C

Definition at line 349 of file stm32f745xx.h.

__IO uint32_t DOR2

DAC channel2 data output register, Address offset: 0x30

Definition at line 350 of file stm32f745xx.h.

__IO uint32_t SR

DAC status register, Address offset: 0x34

Definition at line 351 of file stm32f745xx.h.

__IO uint32_t SWTRIGR

DAC software trigger register, Address offset: 0x04

Definition at line 339 of file stm32f745xx.h.


The documentation for this struct was generated from the following files: