ADC_TypeDef Struct Reference

Analog to Digital Converter. More...

#include <stm32f745xx.h>

Data Fields
__IO uint32_t	SR
__IO uint32_t	CR1
__IO uint32_t	CR2
__IO uint32_t	SMPR1
__IO uint32_t	SMPR2
__IO uint32_t	JOFR1
__IO uint32_t	JOFR2
__IO uint32_t	JOFR3
__IO uint32_t	JOFR4
__IO uint32_t	HTR
__IO uint32_t	LTR
__IO uint32_t	SQR1
__IO uint32_t	SQR2
__IO uint32_t	SQR3
__IO uint32_t	JSQR
__IO uint32_t	JDR1
__IO uint32_t	JDR2
__IO uint32_t	JDR3
__IO uint32_t	JDR4
__IO uint32_t	DR

Detailed Description

Analog to Digital Converter.

Definition at line 204 of file stm32f745xx.h.

Field Documentation

__IO uint32_t CR1

ADC control register 1, Address offset: 0x04

Definition at line 207 of file stm32f745xx.h.

__IO uint32_t CR2

ADC control register 2, Address offset: 0x08

Definition at line 208 of file stm32f745xx.h.

__IO uint32_t DR

ADC regular data register, Address offset: 0x4C

Definition at line 225 of file stm32f745xx.h.

__IO uint32_t HTR

ADC watchdog higher threshold register, Address offset: 0x24

Definition at line 215 of file stm32f745xx.h.

__IO uint32_t JDR1

ADC injected data register 1, Address offset: 0x3C

Definition at line 221 of file stm32f745xx.h.

__IO uint32_t JDR2

ADC injected data register 2, Address offset: 0x40

Definition at line 222 of file stm32f745xx.h.

__IO uint32_t JDR3

ADC injected data register 3, Address offset: 0x44

Definition at line 223 of file stm32f745xx.h.

__IO uint32_t JDR4

ADC injected data register 4, Address offset: 0x48

Definition at line 224 of file stm32f745xx.h.

__IO uint32_t JOFR1

ADC injected channel data offset register 1, Address offset: 0x14

Definition at line 211 of file stm32f745xx.h.

__IO uint32_t JOFR2

ADC injected channel data offset register 2, Address offset: 0x18

Definition at line 212 of file stm32f745xx.h.

__IO uint32_t JOFR3

ADC injected channel data offset register 3, Address offset: 0x1C

Definition at line 213 of file stm32f745xx.h.

__IO uint32_t JOFR4

ADC injected channel data offset register 4, Address offset: 0x20

Definition at line 214 of file stm32f745xx.h.

__IO uint32_t JSQR

ADC injected sequence register, Address offset: 0x38

Definition at line 220 of file stm32f745xx.h.

__IO uint32_t LTR

ADC watchdog lower threshold register, Address offset: 0x28

Definition at line 216 of file stm32f745xx.h.

__IO uint32_t SMPR1

ADC sample time register 1, Address offset: 0x0C

Definition at line 209 of file stm32f745xx.h.

__IO uint32_t SMPR2

ADC sample time register 2, Address offset: 0x10

Definition at line 210 of file stm32f745xx.h.

__IO uint32_t SQR1

ADC regular sequence register 1, Address offset: 0x2C

Definition at line 217 of file stm32f745xx.h.

__IO uint32_t SQR2

ADC regular sequence register 2, Address offset: 0x30

Definition at line 218 of file stm32f745xx.h.

__IO uint32_t SQR3

ADC regular sequence register 3, Address offset: 0x34

Definition at line 219 of file stm32f745xx.h.

__IO uint32_t SR

ADC status register, Address offset: 0x00

Definition at line 206 of file stm32f745xx.h.

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The documentation for this struct was generated from the following files:

• C:/Users/Torsten/Documents/Eclipse_WS2/STM32F769IDiscovery/CMSIS/device/stm32f745xx.h
• C:/Users/Torsten/Documents/Eclipse_WS2/STM32F769IDiscovery/CMSIS/device/stm32f746xx.h
• C:/Users/Torsten/Documents/Eclipse_WS2/STM32F769IDiscovery/CMSIS/device/stm32f756xx.h
• C:/Users/Torsten/Documents/Eclipse_WS2/STM32F769IDiscovery/CMSIS/device/stm32f765xx.h
• C:/Users/Torsten/Documents/Eclipse_WS2/STM32F769IDiscovery/CMSIS/device/stm32f767xx.h
• C:/Users/Torsten/Documents/Eclipse_WS2/STM32F769IDiscovery/CMSIS/device/stm32f769xx.h
• C:/Users/Torsten/Documents/Eclipse_WS2/STM32F769IDiscovery/CMSIS/device/stm32f777xx.h
• C:/Users/Torsten/Documents/Eclipse_WS2/STM32F769IDiscovery/CMSIS/device/stm32f779xx.h