STM32F769IDiscovery  1.00
uDANTE Audio Networking with STM32F7 DISCO board
Macros
HAL RCC Aliased maintained for legacy purpose

Macros

#define RCC_StopWakeUpClock_MSI   RCC_STOP_WAKEUPCLOCK_MSI
 
#define RCC_StopWakeUpClock_HSI   RCC_STOP_WAKEUPCLOCK_HSI
 
#define HAL_RCC_CCSCallback   HAL_RCC_CSSCallback
 
#define HAL_RC48_EnableBuffer_Cmd(cmd)   (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
 
#define __ADC_CLK_DISABLE   __HAL_RCC_ADC_CLK_DISABLE
 
#define __ADC_CLK_ENABLE   __HAL_RCC_ADC_CLK_ENABLE
 
#define __ADC_CLK_SLEEP_DISABLE   __HAL_RCC_ADC_CLK_SLEEP_DISABLE
 
#define __ADC_CLK_SLEEP_ENABLE   __HAL_RCC_ADC_CLK_SLEEP_ENABLE
 
#define __ADC_FORCE_RESET   __HAL_RCC_ADC_FORCE_RESET
 
#define __ADC_RELEASE_RESET   __HAL_RCC_ADC_RELEASE_RESET
 
#define __ADC1_CLK_DISABLE   __HAL_RCC_ADC1_CLK_DISABLE
 
#define __ADC1_CLK_ENABLE   __HAL_RCC_ADC1_CLK_ENABLE
 
#define __ADC1_FORCE_RESET   __HAL_RCC_ADC1_FORCE_RESET
 
#define __ADC1_RELEASE_RESET   __HAL_RCC_ADC1_RELEASE_RESET
 
#define __ADC1_CLK_SLEEP_ENABLE   __HAL_RCC_ADC1_CLK_SLEEP_ENABLE
 
#define __ADC1_CLK_SLEEP_DISABLE   __HAL_RCC_ADC1_CLK_SLEEP_DISABLE
 
#define __ADC2_CLK_DISABLE   __HAL_RCC_ADC2_CLK_DISABLE
 
#define __ADC2_CLK_ENABLE   __HAL_RCC_ADC2_CLK_ENABLE
 
#define __ADC2_FORCE_RESET   __HAL_RCC_ADC2_FORCE_RESET
 
#define __ADC2_RELEASE_RESET   __HAL_RCC_ADC2_RELEASE_RESET
 
#define __ADC3_CLK_DISABLE   __HAL_RCC_ADC3_CLK_DISABLE
 
#define __ADC3_CLK_ENABLE   __HAL_RCC_ADC3_CLK_ENABLE
 
#define __ADC3_FORCE_RESET   __HAL_RCC_ADC3_FORCE_RESET
 
#define __ADC3_RELEASE_RESET   __HAL_RCC_ADC3_RELEASE_RESET
 
#define __AES_CLK_DISABLE   __HAL_RCC_AES_CLK_DISABLE
 
#define __AES_CLK_ENABLE   __HAL_RCC_AES_CLK_ENABLE
 
#define __AES_CLK_SLEEP_DISABLE   __HAL_RCC_AES_CLK_SLEEP_DISABLE
 
#define __AES_CLK_SLEEP_ENABLE   __HAL_RCC_AES_CLK_SLEEP_ENABLE
 
#define __AES_FORCE_RESET   __HAL_RCC_AES_FORCE_RESET
 
#define __AES_RELEASE_RESET   __HAL_RCC_AES_RELEASE_RESET
 
#define __CRYP_CLK_SLEEP_ENABLE   __HAL_RCC_CRYP_CLK_SLEEP_ENABLE
 
#define __CRYP_CLK_SLEEP_DISABLE   __HAL_RCC_CRYP_CLK_SLEEP_DISABLE
 
#define __CRYP_CLK_ENABLE   __HAL_RCC_CRYP_CLK_ENABLE
 
#define __CRYP_CLK_DISABLE   __HAL_RCC_CRYP_CLK_DISABLE
 
#define __CRYP_FORCE_RESET   __HAL_RCC_CRYP_FORCE_RESET
 
#define __CRYP_FORCE_RESET   __HAL_RCC_CRYP_FORCE_RESET
 
#define __CRYP_RELEASE_RESET   __HAL_RCC_CRYP_RELEASE_RESET
 
#define __AFIO_CLK_DISABLE   __HAL_RCC_AFIO_CLK_DISABLE
 
#define __AFIO_CLK_ENABLE   __HAL_RCC_AFIO_CLK_ENABLE
 
#define __AFIO_FORCE_RESET   __HAL_RCC_AFIO_FORCE_RESET
 
#define __AFIO_RELEASE_RESET   __HAL_RCC_AFIO_RELEASE_RESET
 
#define __AHB_FORCE_RESET   __HAL_RCC_AHB_FORCE_RESET
 
#define __AHB_RELEASE_RESET   __HAL_RCC_AHB_RELEASE_RESET
 
#define __AHB1_FORCE_RESET   __HAL_RCC_AHB1_FORCE_RESET
 
#define __AHB1_RELEASE_RESET   __HAL_RCC_AHB1_RELEASE_RESET
 
#define __AHB2_FORCE_RESET   __HAL_RCC_AHB2_FORCE_RESET
 
#define __AHB2_RELEASE_RESET   __HAL_RCC_AHB2_RELEASE_RESET
 
#define __AHB3_FORCE_RESET   __HAL_RCC_AHB3_FORCE_RESET
 
#define __AHB3_RELEASE_RESET   __HAL_RCC_AHB3_RELEASE_RESET
 
#define __APB1_FORCE_RESET   __HAL_RCC_APB1_FORCE_RESET
 
#define __APB1_RELEASE_RESET   __HAL_RCC_APB1_RELEASE_RESET
 
#define __APB2_FORCE_RESET   __HAL_RCC_APB2_FORCE_RESET
 
#define __APB2_RELEASE_RESET   __HAL_RCC_APB2_RELEASE_RESET
 
#define __BKP_CLK_DISABLE   __HAL_RCC_BKP_CLK_DISABLE
 
#define __BKP_CLK_ENABLE   __HAL_RCC_BKP_CLK_ENABLE
 
#define __BKP_FORCE_RESET   __HAL_RCC_BKP_FORCE_RESET
 
#define __BKP_RELEASE_RESET   __HAL_RCC_BKP_RELEASE_RESET
 
#define __CAN1_CLK_DISABLE   __HAL_RCC_CAN1_CLK_DISABLE
 
#define __CAN1_CLK_ENABLE   __HAL_RCC_CAN1_CLK_ENABLE
 
#define __CAN1_CLK_SLEEP_DISABLE   __HAL_RCC_CAN1_CLK_SLEEP_DISABLE
 
#define __CAN1_CLK_SLEEP_ENABLE   __HAL_RCC_CAN1_CLK_SLEEP_ENABLE
 
#define __CAN1_FORCE_RESET   __HAL_RCC_CAN1_FORCE_RESET
 
#define __CAN1_RELEASE_RESET   __HAL_RCC_CAN1_RELEASE_RESET
 
#define __CAN_CLK_DISABLE   __HAL_RCC_CAN1_CLK_DISABLE
 
#define __CAN_CLK_ENABLE   __HAL_RCC_CAN1_CLK_ENABLE
 
#define __CAN_FORCE_RESET   __HAL_RCC_CAN1_FORCE_RESET
 
#define __CAN_RELEASE_RESET   __HAL_RCC_CAN1_RELEASE_RESET
 
#define __CAN2_CLK_DISABLE   __HAL_RCC_CAN2_CLK_DISABLE
 
#define __CAN2_CLK_ENABLE   __HAL_RCC_CAN2_CLK_ENABLE
 
#define __CAN2_FORCE_RESET   __HAL_RCC_CAN2_FORCE_RESET
 
#define __CAN2_RELEASE_RESET   __HAL_RCC_CAN2_RELEASE_RESET
 
#define __CEC_CLK_DISABLE   __HAL_RCC_CEC_CLK_DISABLE
 
#define __CEC_CLK_ENABLE   __HAL_RCC_CEC_CLK_ENABLE
 
#define __COMP_CLK_DISABLE   __HAL_RCC_COMP_CLK_DISABLE
 
#define __COMP_CLK_ENABLE   __HAL_RCC_COMP_CLK_ENABLE
 
#define __COMP_FORCE_RESET   __HAL_RCC_COMP_FORCE_RESET
 
#define __COMP_RELEASE_RESET   __HAL_RCC_COMP_RELEASE_RESET
 
#define __COMP_CLK_SLEEP_ENABLE   __HAL_RCC_COMP_CLK_SLEEP_ENABLE
 
#define __COMP_CLK_SLEEP_DISABLE   __HAL_RCC_COMP_CLK_SLEEP_DISABLE
 
#define __CEC_FORCE_RESET   __HAL_RCC_CEC_FORCE_RESET
 
#define __CEC_RELEASE_RESET   __HAL_RCC_CEC_RELEASE_RESET
 
#define __CRC_CLK_DISABLE   __HAL_RCC_CRC_CLK_DISABLE
 
#define __CRC_CLK_ENABLE   __HAL_RCC_CRC_CLK_ENABLE
 
#define __CRC_CLK_SLEEP_DISABLE   __HAL_RCC_CRC_CLK_SLEEP_DISABLE
 
#define __CRC_CLK_SLEEP_ENABLE   __HAL_RCC_CRC_CLK_SLEEP_ENABLE
 
#define __CRC_FORCE_RESET   __HAL_RCC_CRC_FORCE_RESET
 
#define __CRC_RELEASE_RESET   __HAL_RCC_CRC_RELEASE_RESET
 
#define __DAC_CLK_DISABLE   __HAL_RCC_DAC_CLK_DISABLE
 
#define __DAC_CLK_ENABLE   __HAL_RCC_DAC_CLK_ENABLE
 
#define __DAC_FORCE_RESET   __HAL_RCC_DAC_FORCE_RESET
 
#define __DAC_RELEASE_RESET   __HAL_RCC_DAC_RELEASE_RESET
 
#define __DAC1_CLK_DISABLE   __HAL_RCC_DAC1_CLK_DISABLE
 
#define __DAC1_CLK_ENABLE   __HAL_RCC_DAC1_CLK_ENABLE
 
#define __DAC1_CLK_SLEEP_DISABLE   __HAL_RCC_DAC1_CLK_SLEEP_DISABLE
 
#define __DAC1_CLK_SLEEP_ENABLE   __HAL_RCC_DAC1_CLK_SLEEP_ENABLE
 
#define __DAC1_FORCE_RESET   __HAL_RCC_DAC1_FORCE_RESET
 
#define __DAC1_RELEASE_RESET   __HAL_RCC_DAC1_RELEASE_RESET
 
#define __DBGMCU_CLK_ENABLE   __HAL_RCC_DBGMCU_CLK_ENABLE
 
#define __DBGMCU_CLK_DISABLE   __HAL_RCC_DBGMCU_CLK_DISABLE
 
#define __DBGMCU_FORCE_RESET   __HAL_RCC_DBGMCU_FORCE_RESET
 
#define __DBGMCU_RELEASE_RESET   __HAL_RCC_DBGMCU_RELEASE_RESET
 
#define __DFSDM_CLK_DISABLE   __HAL_RCC_DFSDM_CLK_DISABLE
 
#define __DFSDM_CLK_ENABLE   __HAL_RCC_DFSDM_CLK_ENABLE
 
#define __DFSDM_CLK_SLEEP_DISABLE   __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE
 
#define __DFSDM_CLK_SLEEP_ENABLE   __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE
 
#define __DFSDM_FORCE_RESET   __HAL_RCC_DFSDM_FORCE_RESET
 
#define __DFSDM_RELEASE_RESET   __HAL_RCC_DFSDM_RELEASE_RESET
 
#define __DMA1_CLK_DISABLE   __HAL_RCC_DMA1_CLK_DISABLE
 
#define __DMA1_CLK_ENABLE   __HAL_RCC_DMA1_CLK_ENABLE
 
#define __DMA1_CLK_SLEEP_DISABLE   __HAL_RCC_DMA1_CLK_SLEEP_DISABLE
 
#define __DMA1_CLK_SLEEP_ENABLE   __HAL_RCC_DMA1_CLK_SLEEP_ENABLE
 
#define __DMA1_FORCE_RESET   __HAL_RCC_DMA1_FORCE_RESET
 
#define __DMA1_RELEASE_RESET   __HAL_RCC_DMA1_RELEASE_RESET
 
#define __DMA2_CLK_DISABLE   __HAL_RCC_DMA2_CLK_DISABLE
 
#define __DMA2_CLK_ENABLE   __HAL_RCC_DMA2_CLK_ENABLE
 
#define __DMA2_CLK_SLEEP_DISABLE   __HAL_RCC_DMA2_CLK_SLEEP_DISABLE
 
#define __DMA2_CLK_SLEEP_ENABLE   __HAL_RCC_DMA2_CLK_SLEEP_ENABLE
 
#define __DMA2_FORCE_RESET   __HAL_RCC_DMA2_FORCE_RESET
 
#define __DMA2_RELEASE_RESET   __HAL_RCC_DMA2_RELEASE_RESET
 
#define __ETHMAC_CLK_DISABLE   __HAL_RCC_ETHMAC_CLK_DISABLE
 
#define __ETHMAC_CLK_ENABLE   __HAL_RCC_ETHMAC_CLK_ENABLE
 
#define __ETHMAC_FORCE_RESET   __HAL_RCC_ETHMAC_FORCE_RESET
 
#define __ETHMAC_RELEASE_RESET   __HAL_RCC_ETHMAC_RELEASE_RESET
 
#define __ETHMACRX_CLK_DISABLE   __HAL_RCC_ETHMACRX_CLK_DISABLE
 
#define __ETHMACRX_CLK_ENABLE   __HAL_RCC_ETHMACRX_CLK_ENABLE
 
#define __ETHMACTX_CLK_DISABLE   __HAL_RCC_ETHMACTX_CLK_DISABLE
 
#define __ETHMACTX_CLK_ENABLE   __HAL_RCC_ETHMACTX_CLK_ENABLE
 
#define __FIREWALL_CLK_DISABLE   __HAL_RCC_FIREWALL_CLK_DISABLE
 
#define __FIREWALL_CLK_ENABLE   __HAL_RCC_FIREWALL_CLK_ENABLE
 
#define __FLASH_CLK_DISABLE   __HAL_RCC_FLASH_CLK_DISABLE
 
#define __FLASH_CLK_ENABLE   __HAL_RCC_FLASH_CLK_ENABLE
 
#define __FLASH_CLK_SLEEP_DISABLE   __HAL_RCC_FLASH_CLK_SLEEP_DISABLE
 
#define __FLASH_CLK_SLEEP_ENABLE   __HAL_RCC_FLASH_CLK_SLEEP_ENABLE
 
#define __FLASH_FORCE_RESET   __HAL_RCC_FLASH_FORCE_RESET
 
#define __FLASH_RELEASE_RESET   __HAL_RCC_FLASH_RELEASE_RESET
 
#define __FLITF_CLK_DISABLE   __HAL_RCC_FLITF_CLK_DISABLE
 
#define __FLITF_CLK_ENABLE   __HAL_RCC_FLITF_CLK_ENABLE
 
#define __FLITF_FORCE_RESET   __HAL_RCC_FLITF_FORCE_RESET
 
#define __FLITF_RELEASE_RESET   __HAL_RCC_FLITF_RELEASE_RESET
 
#define __FLITF_CLK_SLEEP_ENABLE   __HAL_RCC_FLITF_CLK_SLEEP_ENABLE
 
#define __FLITF_CLK_SLEEP_DISABLE   __HAL_RCC_FLITF_CLK_SLEEP_DISABLE
 
#define __FMC_CLK_DISABLE   __HAL_RCC_FMC_CLK_DISABLE
 
#define __FMC_CLK_ENABLE   __HAL_RCC_FMC_CLK_ENABLE
 
#define __FMC_CLK_SLEEP_DISABLE   __HAL_RCC_FMC_CLK_SLEEP_DISABLE
 
#define __FMC_CLK_SLEEP_ENABLE   __HAL_RCC_FMC_CLK_SLEEP_ENABLE
 
#define __FMC_FORCE_RESET   __HAL_RCC_FMC_FORCE_RESET
 
#define __FMC_RELEASE_RESET   __HAL_RCC_FMC_RELEASE_RESET
 
#define __FSMC_CLK_DISABLE   __HAL_RCC_FSMC_CLK_DISABLE
 
#define __FSMC_CLK_ENABLE   __HAL_RCC_FSMC_CLK_ENABLE
 
#define __GPIOA_CLK_DISABLE   __HAL_RCC_GPIOA_CLK_DISABLE
 
#define __GPIOA_CLK_ENABLE   __HAL_RCC_GPIOA_CLK_ENABLE
 
#define __GPIOA_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE
 
#define __GPIOA_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE
 
#define __GPIOA_FORCE_RESET   __HAL_RCC_GPIOA_FORCE_RESET
 
#define __GPIOA_RELEASE_RESET   __HAL_RCC_GPIOA_RELEASE_RESET
 
#define __GPIOB_CLK_DISABLE   __HAL_RCC_GPIOB_CLK_DISABLE
 
#define __GPIOB_CLK_ENABLE   __HAL_RCC_GPIOB_CLK_ENABLE
 
#define __GPIOB_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE
 
#define __GPIOB_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE
 
#define __GPIOB_FORCE_RESET   __HAL_RCC_GPIOB_FORCE_RESET
 
#define __GPIOB_RELEASE_RESET   __HAL_RCC_GPIOB_RELEASE_RESET
 
#define __GPIOC_CLK_DISABLE   __HAL_RCC_GPIOC_CLK_DISABLE
 
#define __GPIOC_CLK_ENABLE   __HAL_RCC_GPIOC_CLK_ENABLE
 
#define __GPIOC_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE
 
#define __GPIOC_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE
 
#define __GPIOC_FORCE_RESET   __HAL_RCC_GPIOC_FORCE_RESET
 
#define __GPIOC_RELEASE_RESET   __HAL_RCC_GPIOC_RELEASE_RESET
 
#define __GPIOD_CLK_DISABLE   __HAL_RCC_GPIOD_CLK_DISABLE
 
#define __GPIOD_CLK_ENABLE   __HAL_RCC_GPIOD_CLK_ENABLE
 
#define __GPIOD_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE
 
#define __GPIOD_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE
 
#define __GPIOD_FORCE_RESET   __HAL_RCC_GPIOD_FORCE_RESET
 
#define __GPIOD_RELEASE_RESET   __HAL_RCC_GPIOD_RELEASE_RESET
 
#define __GPIOE_CLK_DISABLE   __HAL_RCC_GPIOE_CLK_DISABLE
 
#define __GPIOE_CLK_ENABLE   __HAL_RCC_GPIOE_CLK_ENABLE
 
#define __GPIOE_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE
 
#define __GPIOE_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE
 
#define __GPIOE_FORCE_RESET   __HAL_RCC_GPIOE_FORCE_RESET
 
#define __GPIOE_RELEASE_RESET   __HAL_RCC_GPIOE_RELEASE_RESET
 
#define __GPIOF_CLK_DISABLE   __HAL_RCC_GPIOF_CLK_DISABLE
 
#define __GPIOF_CLK_ENABLE   __HAL_RCC_GPIOF_CLK_ENABLE
 
#define __GPIOF_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE
 
#define __GPIOF_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE
 
#define __GPIOF_FORCE_RESET   __HAL_RCC_GPIOF_FORCE_RESET
 
#define __GPIOF_RELEASE_RESET   __HAL_RCC_GPIOF_RELEASE_RESET
 
#define __GPIOG_CLK_DISABLE   __HAL_RCC_GPIOG_CLK_DISABLE
 
#define __GPIOG_CLK_ENABLE   __HAL_RCC_GPIOG_CLK_ENABLE
 
#define __GPIOG_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE
 
#define __GPIOG_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE
 
#define __GPIOG_FORCE_RESET   __HAL_RCC_GPIOG_FORCE_RESET
 
#define __GPIOG_RELEASE_RESET   __HAL_RCC_GPIOG_RELEASE_RESET
 
#define __GPIOH_CLK_DISABLE   __HAL_RCC_GPIOH_CLK_DISABLE
 
#define __GPIOH_CLK_ENABLE   __HAL_RCC_GPIOH_CLK_ENABLE
 
#define __GPIOH_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE
 
#define __GPIOH_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE
 
#define __GPIOH_FORCE_RESET   __HAL_RCC_GPIOH_FORCE_RESET
 
#define __GPIOH_RELEASE_RESET   __HAL_RCC_GPIOH_RELEASE_RESET
 
#define __I2C1_CLK_DISABLE   __HAL_RCC_I2C1_CLK_DISABLE
 
#define __I2C1_CLK_ENABLE   __HAL_RCC_I2C1_CLK_ENABLE
 
#define __I2C1_CLK_SLEEP_DISABLE   __HAL_RCC_I2C1_CLK_SLEEP_DISABLE
 
#define __I2C1_CLK_SLEEP_ENABLE   __HAL_RCC_I2C1_CLK_SLEEP_ENABLE
 
#define __I2C1_FORCE_RESET   __HAL_RCC_I2C1_FORCE_RESET
 
#define __I2C1_RELEASE_RESET   __HAL_RCC_I2C1_RELEASE_RESET
 
#define __I2C2_CLK_DISABLE   __HAL_RCC_I2C2_CLK_DISABLE
 
#define __I2C2_CLK_ENABLE   __HAL_RCC_I2C2_CLK_ENABLE
 
#define __I2C2_CLK_SLEEP_DISABLE   __HAL_RCC_I2C2_CLK_SLEEP_DISABLE
 
#define __I2C2_CLK_SLEEP_ENABLE   __HAL_RCC_I2C2_CLK_SLEEP_ENABLE
 
#define __I2C2_FORCE_RESET   __HAL_RCC_I2C2_FORCE_RESET
 
#define __I2C2_RELEASE_RESET   __HAL_RCC_I2C2_RELEASE_RESET
 
#define __I2C3_CLK_DISABLE   __HAL_RCC_I2C3_CLK_DISABLE
 
#define __I2C3_CLK_ENABLE   __HAL_RCC_I2C3_CLK_ENABLE
 
#define __I2C3_CLK_SLEEP_DISABLE   __HAL_RCC_I2C3_CLK_SLEEP_DISABLE
 
#define __I2C3_CLK_SLEEP_ENABLE   __HAL_RCC_I2C3_CLK_SLEEP_ENABLE
 
#define __I2C3_FORCE_RESET   __HAL_RCC_I2C3_FORCE_RESET
 
#define __I2C3_RELEASE_RESET   __HAL_RCC_I2C3_RELEASE_RESET
 
#define __LCD_CLK_DISABLE   __HAL_RCC_LCD_CLK_DISABLE
 
#define __LCD_CLK_ENABLE   __HAL_RCC_LCD_CLK_ENABLE
 
#define __LCD_CLK_SLEEP_DISABLE   __HAL_RCC_LCD_CLK_SLEEP_DISABLE
 
#define __LCD_CLK_SLEEP_ENABLE   __HAL_RCC_LCD_CLK_SLEEP_ENABLE
 
#define __LCD_FORCE_RESET   __HAL_RCC_LCD_FORCE_RESET
 
#define __LCD_RELEASE_RESET   __HAL_RCC_LCD_RELEASE_RESET
 
#define __LPTIM1_CLK_DISABLE   __HAL_RCC_LPTIM1_CLK_DISABLE
 
#define __LPTIM1_CLK_ENABLE   __HAL_RCC_LPTIM1_CLK_ENABLE
 
#define __LPTIM1_CLK_SLEEP_DISABLE   __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE
 
#define __LPTIM1_CLK_SLEEP_ENABLE   __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE
 
#define __LPTIM1_FORCE_RESET   __HAL_RCC_LPTIM1_FORCE_RESET
 
#define __LPTIM1_RELEASE_RESET   __HAL_RCC_LPTIM1_RELEASE_RESET
 
#define __LPTIM2_CLK_DISABLE   __HAL_RCC_LPTIM2_CLK_DISABLE
 
#define __LPTIM2_CLK_ENABLE   __HAL_RCC_LPTIM2_CLK_ENABLE
 
#define __LPTIM2_CLK_SLEEP_DISABLE   __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE
 
#define __LPTIM2_CLK_SLEEP_ENABLE   __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE
 
#define __LPTIM2_FORCE_RESET   __HAL_RCC_LPTIM2_FORCE_RESET
 
#define __LPTIM2_RELEASE_RESET   __HAL_RCC_LPTIM2_RELEASE_RESET
 
#define __LPUART1_CLK_DISABLE   __HAL_RCC_LPUART1_CLK_DISABLE
 
#define __LPUART1_CLK_ENABLE   __HAL_RCC_LPUART1_CLK_ENABLE
 
#define __LPUART1_CLK_SLEEP_DISABLE   __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE
 
#define __LPUART1_CLK_SLEEP_ENABLE   __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE
 
#define __LPUART1_FORCE_RESET   __HAL_RCC_LPUART1_FORCE_RESET
 
#define __LPUART1_RELEASE_RESET   __HAL_RCC_LPUART1_RELEASE_RESET
 
#define __OPAMP_CLK_DISABLE   __HAL_RCC_OPAMP_CLK_DISABLE
 
#define __OPAMP_CLK_ENABLE   __HAL_RCC_OPAMP_CLK_ENABLE
 
#define __OPAMP_CLK_SLEEP_DISABLE   __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE
 
#define __OPAMP_CLK_SLEEP_ENABLE   __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE
 
#define __OPAMP_FORCE_RESET   __HAL_RCC_OPAMP_FORCE_RESET
 
#define __OPAMP_RELEASE_RESET   __HAL_RCC_OPAMP_RELEASE_RESET
 
#define __OTGFS_CLK_DISABLE   __HAL_RCC_OTGFS_CLK_DISABLE
 
#define __OTGFS_CLK_ENABLE   __HAL_RCC_OTGFS_CLK_ENABLE
 
#define __OTGFS_CLK_SLEEP_DISABLE   __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE
 
#define __OTGFS_CLK_SLEEP_ENABLE   __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE
 
#define __OTGFS_FORCE_RESET   __HAL_RCC_OTGFS_FORCE_RESET
 
#define __OTGFS_RELEASE_RESET   __HAL_RCC_OTGFS_RELEASE_RESET
 
#define __PWR_CLK_DISABLE   __HAL_RCC_PWR_CLK_DISABLE
 
#define __PWR_CLK_ENABLE   __HAL_RCC_PWR_CLK_ENABLE
 
#define __PWR_CLK_SLEEP_DISABLE   __HAL_RCC_PWR_CLK_SLEEP_DISABLE
 
#define __PWR_CLK_SLEEP_ENABLE   __HAL_RCC_PWR_CLK_SLEEP_ENABLE
 
#define __PWR_FORCE_RESET   __HAL_RCC_PWR_FORCE_RESET
 
#define __PWR_RELEASE_RESET   __HAL_RCC_PWR_RELEASE_RESET
 
#define __QSPI_CLK_DISABLE   __HAL_RCC_QSPI_CLK_DISABLE
 
#define __QSPI_CLK_ENABLE   __HAL_RCC_QSPI_CLK_ENABLE
 
#define __QSPI_CLK_SLEEP_DISABLE   __HAL_RCC_QSPI_CLK_SLEEP_DISABLE
 
#define __QSPI_CLK_SLEEP_ENABLE   __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
 
#define __QSPI_FORCE_RESET   __HAL_RCC_QSPI_FORCE_RESET
 
#define __QSPI_RELEASE_RESET   __HAL_RCC_QSPI_RELEASE_RESET
 
#define __RNG_CLK_DISABLE   __HAL_RCC_RNG_CLK_DISABLE
 
#define __RNG_CLK_ENABLE   __HAL_RCC_RNG_CLK_ENABLE
 
#define __RNG_CLK_SLEEP_DISABLE   __HAL_RCC_RNG_CLK_SLEEP_DISABLE
 
#define __RNG_CLK_SLEEP_ENABLE   __HAL_RCC_RNG_CLK_SLEEP_ENABLE
 
#define __RNG_FORCE_RESET   __HAL_RCC_RNG_FORCE_RESET
 
#define __RNG_RELEASE_RESET   __HAL_RCC_RNG_RELEASE_RESET
 
#define __SAI1_CLK_DISABLE   __HAL_RCC_SAI1_CLK_DISABLE
 
#define __SAI1_CLK_ENABLE   __HAL_RCC_SAI1_CLK_ENABLE
 
#define __SAI1_CLK_SLEEP_DISABLE   __HAL_RCC_SAI1_CLK_SLEEP_DISABLE
 
#define __SAI1_CLK_SLEEP_ENABLE   __HAL_RCC_SAI1_CLK_SLEEP_ENABLE
 
#define __SAI1_FORCE_RESET   __HAL_RCC_SAI1_FORCE_RESET
 
#define __SAI1_RELEASE_RESET   __HAL_RCC_SAI1_RELEASE_RESET
 
#define __SAI2_CLK_DISABLE   __HAL_RCC_SAI2_CLK_DISABLE
 
#define __SAI2_CLK_ENABLE   __HAL_RCC_SAI2_CLK_ENABLE
 
#define __SAI2_CLK_SLEEP_DISABLE   __HAL_RCC_SAI2_CLK_SLEEP_DISABLE
 
#define __SAI2_CLK_SLEEP_ENABLE   __HAL_RCC_SAI2_CLK_SLEEP_ENABLE
 
#define __SAI2_FORCE_RESET   __HAL_RCC_SAI2_FORCE_RESET
 
#define __SAI2_RELEASE_RESET   __HAL_RCC_SAI2_RELEASE_RESET
 
#define __SDIO_CLK_DISABLE   __HAL_RCC_SDIO_CLK_DISABLE
 
#define __SDIO_CLK_ENABLE   __HAL_RCC_SDIO_CLK_ENABLE
 
#define __SDMMC_CLK_DISABLE   __HAL_RCC_SDMMC_CLK_DISABLE
 
#define __SDMMC_CLK_ENABLE   __HAL_RCC_SDMMC_CLK_ENABLE
 
#define __SDMMC_CLK_SLEEP_DISABLE   __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE
 
#define __SDMMC_CLK_SLEEP_ENABLE   __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE
 
#define __SDMMC_FORCE_RESET   __HAL_RCC_SDMMC_FORCE_RESET
 
#define __SDMMC_RELEASE_RESET   __HAL_RCC_SDMMC_RELEASE_RESET
 
#define __SPI1_CLK_DISABLE   __HAL_RCC_SPI1_CLK_DISABLE
 
#define __SPI1_CLK_ENABLE   __HAL_RCC_SPI1_CLK_ENABLE
 
#define __SPI1_CLK_SLEEP_DISABLE   __HAL_RCC_SPI1_CLK_SLEEP_DISABLE
 
#define __SPI1_CLK_SLEEP_ENABLE   __HAL_RCC_SPI1_CLK_SLEEP_ENABLE
 
#define __SPI1_FORCE_RESET   __HAL_RCC_SPI1_FORCE_RESET
 
#define __SPI1_RELEASE_RESET   __HAL_RCC_SPI1_RELEASE_RESET
 
#define __SPI2_CLK_DISABLE   __HAL_RCC_SPI2_CLK_DISABLE
 
#define __SPI2_CLK_ENABLE   __HAL_RCC_SPI2_CLK_ENABLE
 
#define __SPI2_CLK_SLEEP_DISABLE   __HAL_RCC_SPI2_CLK_SLEEP_DISABLE
 
#define __SPI2_CLK_SLEEP_ENABLE   __HAL_RCC_SPI2_CLK_SLEEP_ENABLE
 
#define __SPI2_FORCE_RESET   __HAL_RCC_SPI2_FORCE_RESET
 
#define __SPI2_RELEASE_RESET   __HAL_RCC_SPI2_RELEASE_RESET
 
#define __SPI3_CLK_DISABLE   __HAL_RCC_SPI3_CLK_DISABLE
 
#define __SPI3_CLK_ENABLE   __HAL_RCC_SPI3_CLK_ENABLE
 
#define __SPI3_CLK_SLEEP_DISABLE   __HAL_RCC_SPI3_CLK_SLEEP_DISABLE
 
#define __SPI3_CLK_SLEEP_ENABLE   __HAL_RCC_SPI3_CLK_SLEEP_ENABLE
 
#define __SPI3_FORCE_RESET   __HAL_RCC_SPI3_FORCE_RESET
 
#define __SPI3_RELEASE_RESET   __HAL_RCC_SPI3_RELEASE_RESET
 
#define __SRAM_CLK_DISABLE   __HAL_RCC_SRAM_CLK_DISABLE
 
#define __SRAM_CLK_ENABLE   __HAL_RCC_SRAM_CLK_ENABLE
 
#define __SRAM1_CLK_SLEEP_DISABLE   __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE
 
#define __SRAM1_CLK_SLEEP_ENABLE   __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE
 
#define __SRAM2_CLK_SLEEP_DISABLE   __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE
 
#define __SRAM2_CLK_SLEEP_ENABLE   __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE
 
#define __SWPMI1_CLK_DISABLE   __HAL_RCC_SWPMI1_CLK_DISABLE
 
#define __SWPMI1_CLK_ENABLE   __HAL_RCC_SWPMI1_CLK_ENABLE
 
#define __SWPMI1_CLK_SLEEP_DISABLE   __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE
 
#define __SWPMI1_CLK_SLEEP_ENABLE   __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE
 
#define __SWPMI1_FORCE_RESET   __HAL_RCC_SWPMI1_FORCE_RESET
 
#define __SWPMI1_RELEASE_RESET   __HAL_RCC_SWPMI1_RELEASE_RESET
 
#define __SYSCFG_CLK_DISABLE   __HAL_RCC_SYSCFG_CLK_DISABLE
 
#define __SYSCFG_CLK_ENABLE   __HAL_RCC_SYSCFG_CLK_ENABLE
 
#define __SYSCFG_CLK_SLEEP_DISABLE   __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE
 
#define __SYSCFG_CLK_SLEEP_ENABLE   __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE
 
#define __SYSCFG_FORCE_RESET   __HAL_RCC_SYSCFG_FORCE_RESET
 
#define __SYSCFG_RELEASE_RESET   __HAL_RCC_SYSCFG_RELEASE_RESET
 
#define __TIM1_CLK_DISABLE   __HAL_RCC_TIM1_CLK_DISABLE
 
#define __TIM1_CLK_ENABLE   __HAL_RCC_TIM1_CLK_ENABLE
 
#define __TIM1_CLK_SLEEP_DISABLE   __HAL_RCC_TIM1_CLK_SLEEP_DISABLE
 
#define __TIM1_CLK_SLEEP_ENABLE   __HAL_RCC_TIM1_CLK_SLEEP_ENABLE
 
#define __TIM1_FORCE_RESET   __HAL_RCC_TIM1_FORCE_RESET
 
#define __TIM1_RELEASE_RESET   __HAL_RCC_TIM1_RELEASE_RESET
 
#define __TIM10_CLK_DISABLE   __HAL_RCC_TIM10_CLK_DISABLE
 
#define __TIM10_CLK_ENABLE   __HAL_RCC_TIM10_CLK_ENABLE
 
#define __TIM10_FORCE_RESET   __HAL_RCC_TIM10_FORCE_RESET
 
#define __TIM10_RELEASE_RESET   __HAL_RCC_TIM10_RELEASE_RESET
 
#define __TIM11_CLK_DISABLE   __HAL_RCC_TIM11_CLK_DISABLE
 
#define __TIM11_CLK_ENABLE   __HAL_RCC_TIM11_CLK_ENABLE
 
#define __TIM11_FORCE_RESET   __HAL_RCC_TIM11_FORCE_RESET
 
#define __TIM11_RELEASE_RESET   __HAL_RCC_TIM11_RELEASE_RESET
 
#define __TIM12_CLK_DISABLE   __HAL_RCC_TIM12_CLK_DISABLE
 
#define __TIM12_CLK_ENABLE   __HAL_RCC_TIM12_CLK_ENABLE
 
#define __TIM12_FORCE_RESET   __HAL_RCC_TIM12_FORCE_RESET
 
#define __TIM12_RELEASE_RESET   __HAL_RCC_TIM12_RELEASE_RESET
 
#define __TIM13_CLK_DISABLE   __HAL_RCC_TIM13_CLK_DISABLE
 
#define __TIM13_CLK_ENABLE   __HAL_RCC_TIM13_CLK_ENABLE
 
#define __TIM13_FORCE_RESET   __HAL_RCC_TIM13_FORCE_RESET
 
#define __TIM13_RELEASE_RESET   __HAL_RCC_TIM13_RELEASE_RESET
 
#define __TIM14_CLK_DISABLE   __HAL_RCC_TIM14_CLK_DISABLE
 
#define __TIM14_CLK_ENABLE   __HAL_RCC_TIM14_CLK_ENABLE
 
#define __TIM14_FORCE_RESET   __HAL_RCC_TIM14_FORCE_RESET
 
#define __TIM14_RELEASE_RESET   __HAL_RCC_TIM14_RELEASE_RESET
 
#define __TIM15_CLK_DISABLE   __HAL_RCC_TIM15_CLK_DISABLE
 
#define __TIM15_CLK_ENABLE   __HAL_RCC_TIM15_CLK_ENABLE
 
#define __TIM15_CLK_SLEEP_DISABLE   __HAL_RCC_TIM15_CLK_SLEEP_DISABLE
 
#define __TIM15_CLK_SLEEP_ENABLE   __HAL_RCC_TIM15_CLK_SLEEP_ENABLE
 
#define __TIM15_FORCE_RESET   __HAL_RCC_TIM15_FORCE_RESET
 
#define __TIM15_RELEASE_RESET   __HAL_RCC_TIM15_RELEASE_RESET
 
#define __TIM16_CLK_DISABLE   __HAL_RCC_TIM16_CLK_DISABLE
 
#define __TIM16_CLK_ENABLE   __HAL_RCC_TIM16_CLK_ENABLE
 
#define __TIM16_CLK_SLEEP_DISABLE   __HAL_RCC_TIM16_CLK_SLEEP_DISABLE
 
#define __TIM16_CLK_SLEEP_ENABLE   __HAL_RCC_TIM16_CLK_SLEEP_ENABLE
 
#define __TIM16_FORCE_RESET   __HAL_RCC_TIM16_FORCE_RESET
 
#define __TIM16_RELEASE_RESET   __HAL_RCC_TIM16_RELEASE_RESET
 
#define __TIM17_CLK_DISABLE   __HAL_RCC_TIM17_CLK_DISABLE
 
#define __TIM17_CLK_ENABLE   __HAL_RCC_TIM17_CLK_ENABLE
 
#define __TIM17_CLK_SLEEP_DISABLE   __HAL_RCC_TIM17_CLK_SLEEP_DISABLE
 
#define __TIM17_CLK_SLEEP_ENABLE   __HAL_RCC_TIM17_CLK_SLEEP_ENABLE
 
#define __TIM17_FORCE_RESET   __HAL_RCC_TIM17_FORCE_RESET
 
#define __TIM17_RELEASE_RESET   __HAL_RCC_TIM17_RELEASE_RESET
 
#define __TIM2_CLK_DISABLE   __HAL_RCC_TIM2_CLK_DISABLE
 
#define __TIM2_CLK_ENABLE   __HAL_RCC_TIM2_CLK_ENABLE
 
#define __TIM2_CLK_SLEEP_DISABLE   __HAL_RCC_TIM2_CLK_SLEEP_DISABLE
 
#define __TIM2_CLK_SLEEP_ENABLE   __HAL_RCC_TIM2_CLK_SLEEP_ENABLE
 
#define __TIM2_FORCE_RESET   __HAL_RCC_TIM2_FORCE_RESET
 
#define __TIM2_RELEASE_RESET   __HAL_RCC_TIM2_RELEASE_RESET
 
#define __TIM3_CLK_DISABLE   __HAL_RCC_TIM3_CLK_DISABLE
 
#define __TIM3_CLK_ENABLE   __HAL_RCC_TIM3_CLK_ENABLE
 
#define __TIM3_CLK_SLEEP_DISABLE   __HAL_RCC_TIM3_CLK_SLEEP_DISABLE
 
#define __TIM3_CLK_SLEEP_ENABLE   __HAL_RCC_TIM3_CLK_SLEEP_ENABLE
 
#define __TIM3_FORCE_RESET   __HAL_RCC_TIM3_FORCE_RESET
 
#define __TIM3_RELEASE_RESET   __HAL_RCC_TIM3_RELEASE_RESET
 
#define __TIM4_CLK_DISABLE   __HAL_RCC_TIM4_CLK_DISABLE
 
#define __TIM4_CLK_ENABLE   __HAL_RCC_TIM4_CLK_ENABLE
 
#define __TIM4_CLK_SLEEP_DISABLE   __HAL_RCC_TIM4_CLK_SLEEP_DISABLE
 
#define __TIM4_CLK_SLEEP_ENABLE   __HAL_RCC_TIM4_CLK_SLEEP_ENABLE
 
#define __TIM4_FORCE_RESET   __HAL_RCC_TIM4_FORCE_RESET
 
#define __TIM4_RELEASE_RESET   __HAL_RCC_TIM4_RELEASE_RESET
 
#define __TIM5_CLK_DISABLE   __HAL_RCC_TIM5_CLK_DISABLE
 
#define __TIM5_CLK_ENABLE   __HAL_RCC_TIM5_CLK_ENABLE
 
#define __TIM5_CLK_SLEEP_DISABLE   __HAL_RCC_TIM5_CLK_SLEEP_DISABLE
 
#define __TIM5_CLK_SLEEP_ENABLE   __HAL_RCC_TIM5_CLK_SLEEP_ENABLE
 
#define __TIM5_FORCE_RESET   __HAL_RCC_TIM5_FORCE_RESET
 
#define __TIM5_RELEASE_RESET   __HAL_RCC_TIM5_RELEASE_RESET
 
#define __TIM6_CLK_DISABLE   __HAL_RCC_TIM6_CLK_DISABLE
 
#define __TIM6_CLK_ENABLE   __HAL_RCC_TIM6_CLK_ENABLE
 
#define __TIM6_CLK_SLEEP_DISABLE   __HAL_RCC_TIM6_CLK_SLEEP_DISABLE
 
#define __TIM6_CLK_SLEEP_ENABLE   __HAL_RCC_TIM6_CLK_SLEEP_ENABLE
 
#define __TIM6_FORCE_RESET   __HAL_RCC_TIM6_FORCE_RESET
 
#define __TIM6_RELEASE_RESET   __HAL_RCC_TIM6_RELEASE_RESET
 
#define __TIM7_CLK_DISABLE   __HAL_RCC_TIM7_CLK_DISABLE
 
#define __TIM7_CLK_ENABLE   __HAL_RCC_TIM7_CLK_ENABLE
 
#define __TIM7_CLK_SLEEP_DISABLE   __HAL_RCC_TIM7_CLK_SLEEP_DISABLE
 
#define __TIM7_CLK_SLEEP_ENABLE   __HAL_RCC_TIM7_CLK_SLEEP_ENABLE
 
#define __TIM7_FORCE_RESET   __HAL_RCC_TIM7_FORCE_RESET
 
#define __TIM7_RELEASE_RESET   __HAL_RCC_TIM7_RELEASE_RESET
 
#define __TIM8_CLK_DISABLE   __HAL_RCC_TIM8_CLK_DISABLE
 
#define __TIM8_CLK_ENABLE   __HAL_RCC_TIM8_CLK_ENABLE
 
#define __TIM8_CLK_SLEEP_DISABLE   __HAL_RCC_TIM8_CLK_SLEEP_DISABLE
 
#define __TIM8_CLK_SLEEP_ENABLE   __HAL_RCC_TIM8_CLK_SLEEP_ENABLE
 
#define __TIM8_FORCE_RESET   __HAL_RCC_TIM8_FORCE_RESET
 
#define __TIM8_RELEASE_RESET   __HAL_RCC_TIM8_RELEASE_RESET
 
#define __TIM9_CLK_DISABLE   __HAL_RCC_TIM9_CLK_DISABLE
 
#define __TIM9_CLK_ENABLE   __HAL_RCC_TIM9_CLK_ENABLE
 
#define __TIM9_FORCE_RESET   __HAL_RCC_TIM9_FORCE_RESET
 
#define __TIM9_RELEASE_RESET   __HAL_RCC_TIM9_RELEASE_RESET
 
#define __TSC_CLK_DISABLE   __HAL_RCC_TSC_CLK_DISABLE
 
#define __TSC_CLK_ENABLE   __HAL_RCC_TSC_CLK_ENABLE
 
#define __TSC_CLK_SLEEP_DISABLE   __HAL_RCC_TSC_CLK_SLEEP_DISABLE
 
#define __TSC_CLK_SLEEP_ENABLE   __HAL_RCC_TSC_CLK_SLEEP_ENABLE
 
#define __TSC_FORCE_RESET   __HAL_RCC_TSC_FORCE_RESET
 
#define __TSC_RELEASE_RESET   __HAL_RCC_TSC_RELEASE_RESET
 
#define __UART4_CLK_DISABLE   __HAL_RCC_UART4_CLK_DISABLE
 
#define __UART4_CLK_ENABLE   __HAL_RCC_UART4_CLK_ENABLE
 
#define __UART4_CLK_SLEEP_DISABLE   __HAL_RCC_UART4_CLK_SLEEP_DISABLE
 
#define __UART4_CLK_SLEEP_ENABLE   __HAL_RCC_UART4_CLK_SLEEP_ENABLE
 
#define __UART4_FORCE_RESET   __HAL_RCC_UART4_FORCE_RESET
 
#define __UART4_RELEASE_RESET   __HAL_RCC_UART4_RELEASE_RESET
 
#define __UART5_CLK_DISABLE   __HAL_RCC_UART5_CLK_DISABLE
 
#define __UART5_CLK_ENABLE   __HAL_RCC_UART5_CLK_ENABLE
 
#define __UART5_CLK_SLEEP_DISABLE   __HAL_RCC_UART5_CLK_SLEEP_DISABLE
 
#define __UART5_CLK_SLEEP_ENABLE   __HAL_RCC_UART5_CLK_SLEEP_ENABLE
 
#define __UART5_FORCE_RESET   __HAL_RCC_UART5_FORCE_RESET
 
#define __UART5_RELEASE_RESET   __HAL_RCC_UART5_RELEASE_RESET
 
#define __USART1_CLK_DISABLE   __HAL_RCC_USART1_CLK_DISABLE
 
#define __USART1_CLK_ENABLE   __HAL_RCC_USART1_CLK_ENABLE
 
#define __USART1_CLK_SLEEP_DISABLE   __HAL_RCC_USART1_CLK_SLEEP_DISABLE
 
#define __USART1_CLK_SLEEP_ENABLE   __HAL_RCC_USART1_CLK_SLEEP_ENABLE
 
#define __USART1_FORCE_RESET   __HAL_RCC_USART1_FORCE_RESET
 
#define __USART1_RELEASE_RESET   __HAL_RCC_USART1_RELEASE_RESET
 
#define __USART2_CLK_DISABLE   __HAL_RCC_USART2_CLK_DISABLE
 
#define __USART2_CLK_ENABLE   __HAL_RCC_USART2_CLK_ENABLE
 
#define __USART2_CLK_SLEEP_DISABLE   __HAL_RCC_USART2_CLK_SLEEP_DISABLE
 
#define __USART2_CLK_SLEEP_ENABLE   __HAL_RCC_USART2_CLK_SLEEP_ENABLE
 
#define __USART2_FORCE_RESET   __HAL_RCC_USART2_FORCE_RESET
 
#define __USART2_RELEASE_RESET   __HAL_RCC_USART2_RELEASE_RESET
 
#define __USART3_CLK_DISABLE   __HAL_RCC_USART3_CLK_DISABLE
 
#define __USART3_CLK_ENABLE   __HAL_RCC_USART3_CLK_ENABLE
 
#define __USART3_CLK_SLEEP_DISABLE   __HAL_RCC_USART3_CLK_SLEEP_DISABLE
 
#define __USART3_CLK_SLEEP_ENABLE   __HAL_RCC_USART3_CLK_SLEEP_ENABLE
 
#define __USART3_FORCE_RESET   __HAL_RCC_USART3_FORCE_RESET
 
#define __USART3_RELEASE_RESET   __HAL_RCC_USART3_RELEASE_RESET
 
#define __USART4_CLK_DISABLE   __HAL_RCC_USART4_CLK_DISABLE
 
#define __USART4_CLK_ENABLE   __HAL_RCC_USART4_CLK_ENABLE
 
#define __USART4_CLK_SLEEP_ENABLE   __HAL_RCC_USART4_CLK_SLEEP_ENABLE
 
#define __USART4_CLK_SLEEP_DISABLE   __HAL_RCC_USART4_CLK_SLEEP_DISABLE
 
#define __USART4_FORCE_RESET   __HAL_RCC_USART4_FORCE_RESET
 
#define __USART4_RELEASE_RESET   __HAL_RCC_USART4_RELEASE_RESET
 
#define __USART5_CLK_DISABLE   __HAL_RCC_USART5_CLK_DISABLE
 
#define __USART5_CLK_ENABLE   __HAL_RCC_USART5_CLK_ENABLE
 
#define __USART5_CLK_SLEEP_ENABLE   __HAL_RCC_USART5_CLK_SLEEP_ENABLE
 
#define __USART5_CLK_SLEEP_DISABLE   __HAL_RCC_USART5_CLK_SLEEP_DISABLE
 
#define __USART5_FORCE_RESET   __HAL_RCC_USART5_FORCE_RESET
 
#define __USART5_RELEASE_RESET   __HAL_RCC_USART5_RELEASE_RESET
 
#define __USART7_CLK_DISABLE   __HAL_RCC_USART7_CLK_DISABLE
 
#define __USART7_CLK_ENABLE   __HAL_RCC_USART7_CLK_ENABLE
 
#define __USART7_FORCE_RESET   __HAL_RCC_USART7_FORCE_RESET
 
#define __USART7_RELEASE_RESET   __HAL_RCC_USART7_RELEASE_RESET
 
#define __USART8_CLK_DISABLE   __HAL_RCC_USART8_CLK_DISABLE
 
#define __USART8_CLK_ENABLE   __HAL_RCC_USART8_CLK_ENABLE
 
#define __USART8_FORCE_RESET   __HAL_RCC_USART8_FORCE_RESET
 
#define __USART8_RELEASE_RESET   __HAL_RCC_USART8_RELEASE_RESET
 
#define __USB_CLK_DISABLE   __HAL_RCC_USB_CLK_DISABLE
 
#define __USB_CLK_ENABLE   __HAL_RCC_USB_CLK_ENABLE
 
#define __USB_FORCE_RESET   __HAL_RCC_USB_FORCE_RESET
 
#define __USB_CLK_SLEEP_ENABLE   __HAL_RCC_USB_CLK_SLEEP_ENABLE
 
#define __USB_CLK_SLEEP_DISABLE   __HAL_RCC_USB_CLK_SLEEP_DISABLE
 
#define __USB_OTG_FS_CLK_DISABLE   __HAL_RCC_USB_OTG_FS_CLK_DISABLE
 
#define __USB_OTG_FS_CLK_ENABLE   __HAL_RCC_USB_OTG_FS_CLK_ENABLE
 
#define __USB_RELEASE_RESET   __HAL_RCC_USB_RELEASE_RESET
 
#define __WWDG_CLK_DISABLE   __HAL_RCC_WWDG_CLK_DISABLE
 
#define __WWDG_CLK_ENABLE   __HAL_RCC_WWDG_CLK_ENABLE
 
#define __WWDG_CLK_SLEEP_DISABLE   __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
 
#define __WWDG_CLK_SLEEP_ENABLE   __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
 
#define __WWDG_FORCE_RESET   __HAL_RCC_WWDG_FORCE_RESET
 
#define __WWDG_RELEASE_RESET   __HAL_RCC_WWDG_RELEASE_RESET
 
#define __TIM21_CLK_ENABLE   __HAL_RCC_TIM21_CLK_ENABLE
 
#define __TIM21_CLK_DISABLE   __HAL_RCC_TIM21_CLK_DISABLE
 
#define __TIM21_FORCE_RESET   __HAL_RCC_TIM21_FORCE_RESET
 
#define __TIM21_RELEASE_RESET   __HAL_RCC_TIM21_RELEASE_RESET
 
#define __TIM21_CLK_SLEEP_ENABLE   __HAL_RCC_TIM21_CLK_SLEEP_ENABLE
 
#define __TIM21_CLK_SLEEP_DISABLE   __HAL_RCC_TIM21_CLK_SLEEP_DISABLE
 
#define __TIM22_CLK_ENABLE   __HAL_RCC_TIM22_CLK_ENABLE
 
#define __TIM22_CLK_DISABLE   __HAL_RCC_TIM22_CLK_DISABLE
 
#define __TIM22_FORCE_RESET   __HAL_RCC_TIM22_FORCE_RESET
 
#define __TIM22_RELEASE_RESET   __HAL_RCC_TIM22_RELEASE_RESET
 
#define __TIM22_CLK_SLEEP_ENABLE   __HAL_RCC_TIM22_CLK_SLEEP_ENABLE
 
#define __TIM22_CLK_SLEEP_DISABLE   __HAL_RCC_TIM22_CLK_SLEEP_DISABLE
 
#define __CRS_CLK_DISABLE   __HAL_RCC_CRS_CLK_DISABLE
 
#define __CRS_CLK_ENABLE   __HAL_RCC_CRS_CLK_ENABLE
 
#define __CRS_CLK_SLEEP_DISABLE   __HAL_RCC_CRS_CLK_SLEEP_DISABLE
 
#define __CRS_CLK_SLEEP_ENABLE   __HAL_RCC_CRS_CLK_SLEEP_ENABLE
 
#define __CRS_FORCE_RESET   __HAL_RCC_CRS_FORCE_RESET
 
#define __CRS_RELEASE_RESET   __HAL_RCC_CRS_RELEASE_RESET
 
#define __RCC_BACKUPRESET_FORCE   __HAL_RCC_BACKUPRESET_FORCE
 
#define __RCC_BACKUPRESET_RELEASE   __HAL_RCC_BACKUPRESET_RELEASE
 
#define __USB_OTG_FS_FORCE_RESET   __HAL_RCC_USB_OTG_FS_FORCE_RESET
 
#define __USB_OTG_FS_RELEASE_RESET   __HAL_RCC_USB_OTG_FS_RELEASE_RESET
 
#define __USB_OTG_FS_CLK_SLEEP_ENABLE   __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE
 
#define __USB_OTG_FS_CLK_SLEEP_DISABLE   __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE
 
#define __USB_OTG_HS_CLK_DISABLE   __HAL_RCC_USB_OTG_HS_CLK_DISABLE
 
#define __USB_OTG_HS_CLK_ENABLE   __HAL_RCC_USB_OTG_HS_CLK_ENABLE
 
#define __USB_OTG_HS_ULPI_CLK_ENABLE   __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE
 
#define __USB_OTG_HS_ULPI_CLK_DISABLE   __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE
 
#define __TIM9_CLK_SLEEP_ENABLE   __HAL_RCC_TIM9_CLK_SLEEP_ENABLE
 
#define __TIM9_CLK_SLEEP_DISABLE   __HAL_RCC_TIM9_CLK_SLEEP_DISABLE
 
#define __TIM10_CLK_SLEEP_ENABLE   __HAL_RCC_TIM10_CLK_SLEEP_ENABLE
 
#define __TIM10_CLK_SLEEP_DISABLE   __HAL_RCC_TIM10_CLK_SLEEP_DISABLE
 
#define __TIM11_CLK_SLEEP_ENABLE   __HAL_RCC_TIM11_CLK_SLEEP_ENABLE
 
#define __TIM11_CLK_SLEEP_DISABLE   __HAL_RCC_TIM11_CLK_SLEEP_DISABLE
 
#define __ETHMACPTP_CLK_SLEEP_ENABLE   __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE
 
#define __ETHMACPTP_CLK_SLEEP_DISABLE   __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE
 
#define __ETHMACPTP_CLK_ENABLE   __HAL_RCC_ETHMACPTP_CLK_ENABLE
 
#define __ETHMACPTP_CLK_DISABLE   __HAL_RCC_ETHMACPTP_CLK_DISABLE
 
#define __HASH_CLK_ENABLE   __HAL_RCC_HASH_CLK_ENABLE
 
#define __HASH_FORCE_RESET   __HAL_RCC_HASH_FORCE_RESET
 
#define __HASH_RELEASE_RESET   __HAL_RCC_HASH_RELEASE_RESET
 
#define __HASH_CLK_SLEEP_ENABLE   __HAL_RCC_HASH_CLK_SLEEP_ENABLE
 
#define __HASH_CLK_SLEEP_DISABLE   __HAL_RCC_HASH_CLK_SLEEP_DISABLE
 
#define __HASH_CLK_DISABLE   __HAL_RCC_HASH_CLK_DISABLE
 
#define __SPI5_CLK_ENABLE   __HAL_RCC_SPI5_CLK_ENABLE
 
#define __SPI5_CLK_DISABLE   __HAL_RCC_SPI5_CLK_DISABLE
 
#define __SPI5_FORCE_RESET   __HAL_RCC_SPI5_FORCE_RESET
 
#define __SPI5_RELEASE_RESET   __HAL_RCC_SPI5_RELEASE_RESET
 
#define __SPI5_CLK_SLEEP_ENABLE   __HAL_RCC_SPI5_CLK_SLEEP_ENABLE
 
#define __SPI5_CLK_SLEEP_DISABLE   __HAL_RCC_SPI5_CLK_SLEEP_DISABLE
 
#define __SPI6_CLK_ENABLE   __HAL_RCC_SPI6_CLK_ENABLE
 
#define __SPI6_CLK_DISABLE   __HAL_RCC_SPI6_CLK_DISABLE
 
#define __SPI6_FORCE_RESET   __HAL_RCC_SPI6_FORCE_RESET
 
#define __SPI6_RELEASE_RESET   __HAL_RCC_SPI6_RELEASE_RESET
 
#define __SPI6_CLK_SLEEP_ENABLE   __HAL_RCC_SPI6_CLK_SLEEP_ENABLE
 
#define __SPI6_CLK_SLEEP_DISABLE   __HAL_RCC_SPI6_CLK_SLEEP_DISABLE
 
#define __LTDC_CLK_ENABLE   __HAL_RCC_LTDC_CLK_ENABLE
 
#define __LTDC_CLK_DISABLE   __HAL_RCC_LTDC_CLK_DISABLE
 
#define __LTDC_FORCE_RESET   __HAL_RCC_LTDC_FORCE_RESET
 
#define __LTDC_RELEASE_RESET   __HAL_RCC_LTDC_RELEASE_RESET
 
#define __LTDC_CLK_SLEEP_ENABLE   __HAL_RCC_LTDC_CLK_SLEEP_ENABLE
 
#define __ETHMAC_CLK_SLEEP_ENABLE   __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE
 
#define __ETHMAC_CLK_SLEEP_DISABLE   __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE
 
#define __ETHMACTX_CLK_SLEEP_ENABLE   __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE
 
#define __ETHMACTX_CLK_SLEEP_DISABLE   __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE
 
#define __ETHMACRX_CLK_SLEEP_ENABLE   __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE
 
#define __ETHMACRX_CLK_SLEEP_DISABLE   __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE
 
#define __TIM12_CLK_SLEEP_ENABLE   __HAL_RCC_TIM12_CLK_SLEEP_ENABLE
 
#define __TIM12_CLK_SLEEP_DISABLE   __HAL_RCC_TIM12_CLK_SLEEP_DISABLE
 
#define __TIM13_CLK_SLEEP_ENABLE   __HAL_RCC_TIM13_CLK_SLEEP_ENABLE
 
#define __TIM13_CLK_SLEEP_DISABLE   __HAL_RCC_TIM13_CLK_SLEEP_DISABLE
 
#define __TIM14_CLK_SLEEP_ENABLE   __HAL_RCC_TIM14_CLK_SLEEP_ENABLE
 
#define __TIM14_CLK_SLEEP_DISABLE   __HAL_RCC_TIM14_CLK_SLEEP_DISABLE
 
#define __BKPSRAM_CLK_ENABLE   __HAL_RCC_BKPSRAM_CLK_ENABLE
 
#define __BKPSRAM_CLK_DISABLE   __HAL_RCC_BKPSRAM_CLK_DISABLE
 
#define __BKPSRAM_CLK_SLEEP_ENABLE   __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE
 
#define __BKPSRAM_CLK_SLEEP_DISABLE   __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE
 
#define __CCMDATARAMEN_CLK_ENABLE   __HAL_RCC_CCMDATARAMEN_CLK_ENABLE
 
#define __CCMDATARAMEN_CLK_DISABLE   __HAL_RCC_CCMDATARAMEN_CLK_DISABLE
 
#define __USART6_CLK_ENABLE   __HAL_RCC_USART6_CLK_ENABLE
 
#define __USART6_CLK_DISABLE   __HAL_RCC_USART6_CLK_DISABLE
 
#define __USART6_FORCE_RESET   __HAL_RCC_USART6_FORCE_RESET
 
#define __USART6_RELEASE_RESET   __HAL_RCC_USART6_RELEASE_RESET
 
#define __USART6_CLK_SLEEP_ENABLE   __HAL_RCC_USART6_CLK_SLEEP_ENABLE
 
#define __USART6_CLK_SLEEP_DISABLE   __HAL_RCC_USART6_CLK_SLEEP_DISABLE
 
#define __SPI4_CLK_ENABLE   __HAL_RCC_SPI4_CLK_ENABLE
 
#define __SPI4_CLK_DISABLE   __HAL_RCC_SPI4_CLK_DISABLE
 
#define __SPI4_FORCE_RESET   __HAL_RCC_SPI4_FORCE_RESET
 
#define __SPI4_RELEASE_RESET   __HAL_RCC_SPI4_RELEASE_RESET
 
#define __SPI4_CLK_SLEEP_ENABLE   __HAL_RCC_SPI4_CLK_SLEEP_ENABLE
 
#define __SPI4_CLK_SLEEP_DISABLE   __HAL_RCC_SPI4_CLK_SLEEP_DISABLE
 
#define __GPIOI_CLK_ENABLE   __HAL_RCC_GPIOI_CLK_ENABLE
 
#define __GPIOI_CLK_DISABLE   __HAL_RCC_GPIOI_CLK_DISABLE
 
#define __GPIOI_FORCE_RESET   __HAL_RCC_GPIOI_FORCE_RESET
 
#define __GPIOI_RELEASE_RESET   __HAL_RCC_GPIOI_RELEASE_RESET
 
#define __GPIOI_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE
 
#define __GPIOI_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE
 
#define __GPIOJ_CLK_ENABLE   __HAL_RCC_GPIOJ_CLK_ENABLE
 
#define __GPIOJ_CLK_DISABLE   __HAL_RCC_GPIOJ_CLK_DISABLE
 
#define __GPIOJ_FORCE_RESET   __HAL_RCC_GPIOJ_FORCE_RESET
 
#define __GPIOJ_RELEASE_RESET   __HAL_RCC_GPIOJ_RELEASE_RESET
 
#define __GPIOJ_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE
 
#define __GPIOJ_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE
 
#define __GPIOK_CLK_ENABLE   __HAL_RCC_GPIOK_CLK_ENABLE
 
#define __GPIOK_CLK_DISABLE   __HAL_RCC_GPIOK_CLK_DISABLE
 
#define __GPIOK_RELEASE_RESET   __HAL_RCC_GPIOK_RELEASE_RESET
 
#define __GPIOK_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE
 
#define __GPIOK_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE
 
#define __ETH_CLK_ENABLE   __HAL_RCC_ETH_CLK_ENABLE
 
#define __ETH_CLK_DISABLE   __HAL_RCC_ETH_CLK_DISABLE
 
#define __DCMI_CLK_ENABLE   __HAL_RCC_DCMI_CLK_ENABLE
 
#define __DCMI_CLK_DISABLE   __HAL_RCC_DCMI_CLK_DISABLE
 
#define __DCMI_FORCE_RESET   __HAL_RCC_DCMI_FORCE_RESET
 
#define __DCMI_RELEASE_RESET   __HAL_RCC_DCMI_RELEASE_RESET
 
#define __DCMI_CLK_SLEEP_ENABLE   __HAL_RCC_DCMI_CLK_SLEEP_ENABLE
 
#define __DCMI_CLK_SLEEP_DISABLE   __HAL_RCC_DCMI_CLK_SLEEP_DISABLE
 
#define __UART7_CLK_ENABLE   __HAL_RCC_UART7_CLK_ENABLE
 
#define __UART7_CLK_DISABLE   __HAL_RCC_UART7_CLK_DISABLE
 
#define __UART7_RELEASE_RESET   __HAL_RCC_UART7_RELEASE_RESET
 
#define __UART7_FORCE_RESET   __HAL_RCC_UART7_FORCE_RESET
 
#define __UART7_CLK_SLEEP_ENABLE   __HAL_RCC_UART7_CLK_SLEEP_ENABLE
 
#define __UART7_CLK_SLEEP_DISABLE   __HAL_RCC_UART7_CLK_SLEEP_DISABLE
 
#define __UART8_CLK_ENABLE   __HAL_RCC_UART8_CLK_ENABLE
 
#define __UART8_CLK_DISABLE   __HAL_RCC_UART8_CLK_DISABLE
 
#define __UART8_FORCE_RESET   __HAL_RCC_UART8_FORCE_RESET
 
#define __UART8_RELEASE_RESET   __HAL_RCC_UART8_RELEASE_RESET
 
#define __UART8_CLK_SLEEP_ENABLE   __HAL_RCC_UART8_CLK_SLEEP_ENABLE
 
#define __UART8_CLK_SLEEP_DISABLE   __HAL_RCC_UART8_CLK_SLEEP_DISABLE
 
#define __OTGHS_CLK_SLEEP_ENABLE   __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
 
#define __OTGHS_CLK_SLEEP_DISABLE   __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
 
#define __OTGHS_FORCE_RESET   __HAL_RCC_USB_OTG_HS_FORCE_RESET
 
#define __OTGHS_RELEASE_RESET   __HAL_RCC_USB_OTG_HS_RELEASE_RESET
 
#define __OTGHSULPI_CLK_SLEEP_ENABLE   __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
 
#define __OTGHSULPI_CLK_SLEEP_DISABLE   __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
 
#define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE   __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
 
#define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE   __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
 
#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED   __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED
 
#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED   __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED
 
#define __HAL_RCC_OTGHS_FORCE_RESET   __HAL_RCC_USB_OTG_HS_FORCE_RESET
 
#define __HAL_RCC_OTGHS_RELEASE_RESET   __HAL_RCC_USB_OTG_HS_RELEASE_RESET
 
#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE   __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
 
#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE   __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
 
#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED   __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED
 
#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED   __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED
 
#define __SRAM3_CLK_SLEEP_ENABLE   __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE
 
#define __CAN2_CLK_SLEEP_ENABLE   __HAL_RCC_CAN2_CLK_SLEEP_ENABLE
 
#define __CAN2_CLK_SLEEP_DISABLE   __HAL_RCC_CAN2_CLK_SLEEP_DISABLE
 
#define __DAC_CLK_SLEEP_ENABLE   __HAL_RCC_DAC_CLK_SLEEP_ENABLE
 
#define __DAC_CLK_SLEEP_DISABLE   __HAL_RCC_DAC_CLK_SLEEP_DISABLE
 
#define __ADC2_CLK_SLEEP_ENABLE   __HAL_RCC_ADC2_CLK_SLEEP_ENABLE
 
#define __ADC2_CLK_SLEEP_DISABLE   __HAL_RCC_ADC2_CLK_SLEEP_DISABLE
 
#define __ADC3_CLK_SLEEP_ENABLE   __HAL_RCC_ADC3_CLK_SLEEP_ENABLE
 
#define __ADC3_CLK_SLEEP_DISABLE   __HAL_RCC_ADC3_CLK_SLEEP_DISABLE
 
#define __FSMC_FORCE_RESET   __HAL_RCC_FSMC_FORCE_RESET
 
#define __FSMC_RELEASE_RESET   __HAL_RCC_FSMC_RELEASE_RESET
 
#define __FSMC_CLK_SLEEP_ENABLE   __HAL_RCC_FSMC_CLK_SLEEP_ENABLE
 
#define __FSMC_CLK_SLEEP_DISABLE   __HAL_RCC_FSMC_CLK_SLEEP_DISABLE
 
#define __SDIO_FORCE_RESET   __HAL_RCC_SDIO_FORCE_RESET
 
#define __SDIO_RELEASE_RESET   __HAL_RCC_SDIO_RELEASE_RESET
 
#define __SDIO_CLK_SLEEP_DISABLE   __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
 
#define __SDIO_CLK_SLEEP_ENABLE   __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
 
#define __DMA2D_CLK_ENABLE   __HAL_RCC_DMA2D_CLK_ENABLE
 
#define __DMA2D_CLK_DISABLE   __HAL_RCC_DMA2D_CLK_DISABLE
 
#define __DMA2D_FORCE_RESET   __HAL_RCC_DMA2D_FORCE_RESET
 
#define __DMA2D_RELEASE_RESET   __HAL_RCC_DMA2D_RELEASE_RESET
 
#define __DMA2D_CLK_SLEEP_ENABLE   __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE
 
#define __DMA2D_CLK_SLEEP_DISABLE   __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE
 
#define __HAL_RCC_OTGFS_FORCE_RESET   __HAL_RCC_USB_OTG_FS_FORCE_RESET
 
#define __HAL_RCC_OTGFS_RELEASE_RESET   __HAL_RCC_USB_OTG_FS_RELEASE_RESET
 
#define __ADC12_CLK_ENABLE   __HAL_RCC_ADC12_CLK_ENABLE
 
#define __ADC12_CLK_ENABLE   __HAL_RCC_ADC12_CLK_ENABLE
 
#define __ADC12_CLK_DISABLE   __HAL_RCC_ADC12_CLK_DISABLE
 
#define __ADC12_CLK_DISABLE   __HAL_RCC_ADC12_CLK_DISABLE
 
#define __ADC34_CLK_ENABLE   __HAL_RCC_ADC34_CLK_ENABLE
 
#define __ADC34_CLK_DISABLE   __HAL_RCC_ADC34_CLK_DISABLE
 
#define __DAC2_CLK_ENABLE   __HAL_RCC_DAC2_CLK_ENABLE
 
#define __DAC2_CLK_DISABLE   __HAL_RCC_DAC2_CLK_DISABLE
 
#define __TIM18_CLK_ENABLE   __HAL_RCC_TIM18_CLK_ENABLE
 
#define __TIM18_CLK_DISABLE   __HAL_RCC_TIM18_CLK_DISABLE
 
#define __TIM19_CLK_ENABLE   __HAL_RCC_TIM19_CLK_ENABLE
 
#define __TIM19_CLK_DISABLE   __HAL_RCC_TIM19_CLK_DISABLE
 
#define __TIM20_CLK_ENABLE   __HAL_RCC_TIM20_CLK_ENABLE
 
#define __TIM20_CLK_DISABLE   __HAL_RCC_TIM20_CLK_DISABLE
 
#define __HRTIM1_CLK_ENABLE   __HAL_RCC_HRTIM1_CLK_ENABLE
 
#define __HRTIM1_CLK_DISABLE   __HAL_RCC_HRTIM1_CLK_DISABLE
 
#define __SDADC1_CLK_ENABLE   __HAL_RCC_SDADC1_CLK_ENABLE
 
#define __SDADC2_CLK_ENABLE   __HAL_RCC_SDADC2_CLK_ENABLE
 
#define __SDADC3_CLK_ENABLE   __HAL_RCC_SDADC3_CLK_ENABLE
 
#define __SDADC1_CLK_DISABLE   __HAL_RCC_SDADC1_CLK_DISABLE
 
#define __SDADC2_CLK_DISABLE   __HAL_RCC_SDADC2_CLK_DISABLE
 
#define __SDADC3_CLK_DISABLE   __HAL_RCC_SDADC3_CLK_DISABLE
 
#define __ADC12_FORCE_RESET   __HAL_RCC_ADC12_FORCE_RESET
 
#define __ADC12_FORCE_RESET   __HAL_RCC_ADC12_FORCE_RESET
 
#define __ADC12_RELEASE_RESET   __HAL_RCC_ADC12_RELEASE_RESET
 
#define __ADC12_RELEASE_RESET   __HAL_RCC_ADC12_RELEASE_RESET
 
#define __ADC34_FORCE_RESET   __HAL_RCC_ADC34_FORCE_RESET
 
#define __ADC34_RELEASE_RESET   __HAL_RCC_ADC34_RELEASE_RESET
 
#define __DAC2_FORCE_RESET   __HAL_RCC_DAC2_FORCE_RESET
 
#define __DAC2_RELEASE_RESET   __HAL_RCC_DAC2_RELEASE_RESET
 
#define __TIM18_FORCE_RESET   __HAL_RCC_TIM18_FORCE_RESET
 
#define __TIM18_RELEASE_RESET   __HAL_RCC_TIM18_RELEASE_RESET
 
#define __TIM19_FORCE_RESET   __HAL_RCC_TIM19_FORCE_RESET
 
#define __TIM19_RELEASE_RESET   __HAL_RCC_TIM19_RELEASE_RESET
 
#define __TIM20_FORCE_RESET   __HAL_RCC_TIM20_FORCE_RESET
 
#define __TIM20_RELEASE_RESET   __HAL_RCC_TIM20_RELEASE_RESET
 
#define __HRTIM1_FORCE_RESET   __HAL_RCC_HRTIM1_FORCE_RESET
 
#define __HRTIM1_RELEASE_RESET   __HAL_RCC_HRTIM1_RELEASE_RESET
 
#define __SDADC1_FORCE_RESET   __HAL_RCC_SDADC1_FORCE_RESET
 
#define __SDADC2_FORCE_RESET   __HAL_RCC_SDADC2_FORCE_RESET
 
#define __SDADC3_FORCE_RESET   __HAL_RCC_SDADC3_FORCE_RESET
 
#define __SDADC1_RELEASE_RESET   __HAL_RCC_SDADC1_RELEASE_RESET
 
#define __SDADC2_RELEASE_RESET   __HAL_RCC_SDADC2_RELEASE_RESET
 
#define __SDADC3_RELEASE_RESET   __HAL_RCC_SDADC3_RELEASE_RESET
 
#define __ADC1_IS_CLK_ENABLED   __HAL_RCC_ADC1_IS_CLK_ENABLED
 
#define __ADC1_IS_CLK_DISABLED   __HAL_RCC_ADC1_IS_CLK_DISABLED
 
#define __ADC12_IS_CLK_ENABLED   __HAL_RCC_ADC12_IS_CLK_ENABLED
 
#define __ADC12_IS_CLK_DISABLED   __HAL_RCC_ADC12_IS_CLK_DISABLED
 
#define __ADC34_IS_CLK_ENABLED   __HAL_RCC_ADC34_IS_CLK_ENABLED
 
#define __ADC34_IS_CLK_DISABLED   __HAL_RCC_ADC34_IS_CLK_DISABLED
 
#define __CEC_IS_CLK_ENABLED   __HAL_RCC_CEC_IS_CLK_ENABLED
 
#define __CEC_IS_CLK_DISABLED   __HAL_RCC_CEC_IS_CLK_DISABLED
 
#define __CRC_IS_CLK_ENABLED   __HAL_RCC_CRC_IS_CLK_ENABLED
 
#define __CRC_IS_CLK_DISABLED   __HAL_RCC_CRC_IS_CLK_DISABLED
 
#define __DAC1_IS_CLK_ENABLED   __HAL_RCC_DAC1_IS_CLK_ENABLED
 
#define __DAC1_IS_CLK_DISABLED   __HAL_RCC_DAC1_IS_CLK_DISABLED
 
#define __DAC2_IS_CLK_ENABLED   __HAL_RCC_DAC2_IS_CLK_ENABLED
 
#define __DAC2_IS_CLK_DISABLED   __HAL_RCC_DAC2_IS_CLK_DISABLED
 
#define __DMA1_IS_CLK_ENABLED   __HAL_RCC_DMA1_IS_CLK_ENABLED
 
#define __DMA1_IS_CLK_DISABLED   __HAL_RCC_DMA1_IS_CLK_DISABLED
 
#define __DMA2_IS_CLK_ENABLED   __HAL_RCC_DMA2_IS_CLK_ENABLED
 
#define __DMA2_IS_CLK_DISABLED   __HAL_RCC_DMA2_IS_CLK_DISABLED
 
#define __FLITF_IS_CLK_ENABLED   __HAL_RCC_FLITF_IS_CLK_ENABLED
 
#define __FLITF_IS_CLK_DISABLED   __HAL_RCC_FLITF_IS_CLK_DISABLED
 
#define __FMC_IS_CLK_ENABLED   __HAL_RCC_FMC_IS_CLK_ENABLED
 
#define __FMC_IS_CLK_DISABLED   __HAL_RCC_FMC_IS_CLK_DISABLED
 
#define __GPIOA_IS_CLK_ENABLED   __HAL_RCC_GPIOA_IS_CLK_ENABLED
 
#define __GPIOA_IS_CLK_DISABLED   __HAL_RCC_GPIOA_IS_CLK_DISABLED
 
#define __GPIOB_IS_CLK_ENABLED   __HAL_RCC_GPIOB_IS_CLK_ENABLED
 
#define __GPIOB_IS_CLK_DISABLED   __HAL_RCC_GPIOB_IS_CLK_DISABLED
 
#define __GPIOC_IS_CLK_ENABLED   __HAL_RCC_GPIOC_IS_CLK_ENABLED
 
#define __GPIOC_IS_CLK_DISABLED   __HAL_RCC_GPIOC_IS_CLK_DISABLED
 
#define __GPIOD_IS_CLK_ENABLED   __HAL_RCC_GPIOD_IS_CLK_ENABLED
 
#define __GPIOD_IS_CLK_DISABLED   __HAL_RCC_GPIOD_IS_CLK_DISABLED
 
#define __GPIOE_IS_CLK_ENABLED   __HAL_RCC_GPIOE_IS_CLK_ENABLED
 
#define __GPIOE_IS_CLK_DISABLED   __HAL_RCC_GPIOE_IS_CLK_DISABLED
 
#define __GPIOF_IS_CLK_ENABLED   __HAL_RCC_GPIOF_IS_CLK_ENABLED
 
#define __GPIOF_IS_CLK_DISABLED   __HAL_RCC_GPIOF_IS_CLK_DISABLED
 
#define __GPIOG_IS_CLK_ENABLED   __HAL_RCC_GPIOG_IS_CLK_ENABLED
 
#define __GPIOG_IS_CLK_DISABLED   __HAL_RCC_GPIOG_IS_CLK_DISABLED
 
#define __GPIOH_IS_CLK_ENABLED   __HAL_RCC_GPIOH_IS_CLK_ENABLED
 
#define __GPIOH_IS_CLK_DISABLED   __HAL_RCC_GPIOH_IS_CLK_DISABLED
 
#define __HRTIM1_IS_CLK_ENABLED   __HAL_RCC_HRTIM1_IS_CLK_ENABLED
 
#define __HRTIM1_IS_CLK_DISABLED   __HAL_RCC_HRTIM1_IS_CLK_DISABLED
 
#define __I2C1_IS_CLK_ENABLED   __HAL_RCC_I2C1_IS_CLK_ENABLED
 
#define __I2C1_IS_CLK_DISABLED   __HAL_RCC_I2C1_IS_CLK_DISABLED
 
#define __I2C2_IS_CLK_ENABLED   __HAL_RCC_I2C2_IS_CLK_ENABLED
 
#define __I2C2_IS_CLK_DISABLED   __HAL_RCC_I2C2_IS_CLK_DISABLED
 
#define __I2C3_IS_CLK_ENABLED   __HAL_RCC_I2C3_IS_CLK_ENABLED
 
#define __I2C3_IS_CLK_DISABLED   __HAL_RCC_I2C3_IS_CLK_DISABLED
 
#define __PWR_IS_CLK_ENABLED   __HAL_RCC_PWR_IS_CLK_ENABLED
 
#define __PWR_IS_CLK_DISABLED   __HAL_RCC_PWR_IS_CLK_DISABLED
 
#define __SYSCFG_IS_CLK_ENABLED   __HAL_RCC_SYSCFG_IS_CLK_ENABLED
 
#define __SYSCFG_IS_CLK_DISABLED   __HAL_RCC_SYSCFG_IS_CLK_DISABLED
 
#define __SPI1_IS_CLK_ENABLED   __HAL_RCC_SPI1_IS_CLK_ENABLED
 
#define __SPI1_IS_CLK_DISABLED   __HAL_RCC_SPI1_IS_CLK_DISABLED
 
#define __SPI2_IS_CLK_ENABLED   __HAL_RCC_SPI2_IS_CLK_ENABLED
 
#define __SPI2_IS_CLK_DISABLED   __HAL_RCC_SPI2_IS_CLK_DISABLED
 
#define __SPI3_IS_CLK_ENABLED   __HAL_RCC_SPI3_IS_CLK_ENABLED
 
#define __SPI3_IS_CLK_DISABLED   __HAL_RCC_SPI3_IS_CLK_DISABLED
 
#define __SPI4_IS_CLK_ENABLED   __HAL_RCC_SPI4_IS_CLK_ENABLED
 
#define __SPI4_IS_CLK_DISABLED   __HAL_RCC_SPI4_IS_CLK_DISABLED
 
#define __SDADC1_IS_CLK_ENABLED   __HAL_RCC_SDADC1_IS_CLK_ENABLED
 
#define __SDADC1_IS_CLK_DISABLED   __HAL_RCC_SDADC1_IS_CLK_DISABLED
 
#define __SDADC2_IS_CLK_ENABLED   __HAL_RCC_SDADC2_IS_CLK_ENABLED
 
#define __SDADC2_IS_CLK_DISABLED   __HAL_RCC_SDADC2_IS_CLK_DISABLED
 
#define __SDADC3_IS_CLK_ENABLED   __HAL_RCC_SDADC3_IS_CLK_ENABLED
 
#define __SDADC3_IS_CLK_DISABLED   __HAL_RCC_SDADC3_IS_CLK_DISABLED
 
#define __SRAM_IS_CLK_ENABLED   __HAL_RCC_SRAM_IS_CLK_ENABLED
 
#define __SRAM_IS_CLK_DISABLED   __HAL_RCC_SRAM_IS_CLK_DISABLED
 
#define __TIM1_IS_CLK_ENABLED   __HAL_RCC_TIM1_IS_CLK_ENABLED
 
#define __TIM1_IS_CLK_DISABLED   __HAL_RCC_TIM1_IS_CLK_DISABLED
 
#define __TIM2_IS_CLK_ENABLED   __HAL_RCC_TIM2_IS_CLK_ENABLED
 
#define __TIM2_IS_CLK_DISABLED   __HAL_RCC_TIM2_IS_CLK_DISABLED
 
#define __TIM3_IS_CLK_ENABLED   __HAL_RCC_TIM3_IS_CLK_ENABLED
 
#define __TIM3_IS_CLK_DISABLED   __HAL_RCC_TIM3_IS_CLK_DISABLED
 
#define __TIM4_IS_CLK_ENABLED   __HAL_RCC_TIM4_IS_CLK_ENABLED
 
#define __TIM4_IS_CLK_DISABLED   __HAL_RCC_TIM4_IS_CLK_DISABLED
 
#define __TIM5_IS_CLK_ENABLED   __HAL_RCC_TIM5_IS_CLK_ENABLED
 
#define __TIM5_IS_CLK_DISABLED   __HAL_RCC_TIM5_IS_CLK_DISABLED
 
#define __TIM6_IS_CLK_ENABLED   __HAL_RCC_TIM6_IS_CLK_ENABLED
 
#define __TIM6_IS_CLK_DISABLED   __HAL_RCC_TIM6_IS_CLK_DISABLED
 
#define __TIM7_IS_CLK_ENABLED   __HAL_RCC_TIM7_IS_CLK_ENABLED
 
#define __TIM7_IS_CLK_DISABLED   __HAL_RCC_TIM7_IS_CLK_DISABLED
 
#define __TIM8_IS_CLK_ENABLED   __HAL_RCC_TIM8_IS_CLK_ENABLED
 
#define __TIM8_IS_CLK_DISABLED   __HAL_RCC_TIM8_IS_CLK_DISABLED
 
#define __TIM12_IS_CLK_ENABLED   __HAL_RCC_TIM12_IS_CLK_ENABLED
 
#define __TIM12_IS_CLK_DISABLED   __HAL_RCC_TIM12_IS_CLK_DISABLED
 
#define __TIM13_IS_CLK_ENABLED   __HAL_RCC_TIM13_IS_CLK_ENABLED
 
#define __TIM13_IS_CLK_DISABLED   __HAL_RCC_TIM13_IS_CLK_DISABLED
 
#define __TIM14_IS_CLK_ENABLED   __HAL_RCC_TIM14_IS_CLK_ENABLED
 
#define __TIM14_IS_CLK_DISABLED   __HAL_RCC_TIM14_IS_CLK_DISABLED
 
#define __TIM15_IS_CLK_ENABLED   __HAL_RCC_TIM15_IS_CLK_ENABLED
 
#define __TIM15_IS_CLK_DISABLED   __HAL_RCC_TIM15_IS_CLK_DISABLED
 
#define __TIM16_IS_CLK_ENABLED   __HAL_RCC_TIM16_IS_CLK_ENABLED
 
#define __TIM16_IS_CLK_DISABLED   __HAL_RCC_TIM16_IS_CLK_DISABLED
 
#define __TIM17_IS_CLK_ENABLED   __HAL_RCC_TIM17_IS_CLK_ENABLED
 
#define __TIM17_IS_CLK_DISABLED   __HAL_RCC_TIM17_IS_CLK_DISABLED
 
#define __TIM18_IS_CLK_ENABLED   __HAL_RCC_TIM18_IS_CLK_ENABLED
 
#define __TIM18_IS_CLK_DISABLED   __HAL_RCC_TIM18_IS_CLK_DISABLED
 
#define __TIM19_IS_CLK_ENABLED   __HAL_RCC_TIM19_IS_CLK_ENABLED
 
#define __TIM19_IS_CLK_DISABLED   __HAL_RCC_TIM19_IS_CLK_DISABLED
 
#define __TIM20_IS_CLK_ENABLED   __HAL_RCC_TIM20_IS_CLK_ENABLED
 
#define __TIM20_IS_CLK_DISABLED   __HAL_RCC_TIM20_IS_CLK_DISABLED
 
#define __TSC_IS_CLK_ENABLED   __HAL_RCC_TSC_IS_CLK_ENABLED
 
#define __TSC_IS_CLK_DISABLED   __HAL_RCC_TSC_IS_CLK_DISABLED
 
#define __UART4_IS_CLK_ENABLED   __HAL_RCC_UART4_IS_CLK_ENABLED
 
#define __UART4_IS_CLK_DISABLED   __HAL_RCC_UART4_IS_CLK_DISABLED
 
#define __UART5_IS_CLK_ENABLED   __HAL_RCC_UART5_IS_CLK_ENABLED
 
#define __UART5_IS_CLK_DISABLED   __HAL_RCC_UART5_IS_CLK_DISABLED
 
#define __USART1_IS_CLK_ENABLED   __HAL_RCC_USART1_IS_CLK_ENABLED
 
#define __USART1_IS_CLK_DISABLED   __HAL_RCC_USART1_IS_CLK_DISABLED
 
#define __USART2_IS_CLK_ENABLED   __HAL_RCC_USART2_IS_CLK_ENABLED
 
#define __USART2_IS_CLK_DISABLED   __HAL_RCC_USART2_IS_CLK_DISABLED
 
#define __USART3_IS_CLK_ENABLED   __HAL_RCC_USART3_IS_CLK_ENABLED
 
#define __USART3_IS_CLK_DISABLED   __HAL_RCC_USART3_IS_CLK_DISABLED
 
#define __USB_IS_CLK_ENABLED   __HAL_RCC_USB_IS_CLK_ENABLED
 
#define __USB_IS_CLK_DISABLED   __HAL_RCC_USB_IS_CLK_DISABLED
 
#define __WWDG_IS_CLK_ENABLED   __HAL_RCC_WWDG_IS_CLK_ENABLED
 
#define __WWDG_IS_CLK_DISABLED   __HAL_RCC_WWDG_IS_CLK_DISABLED
 
#define __HAL_RCC_I2SCLK   __HAL_RCC_I2S_CONFIG
 
#define __HAL_RCC_I2SCLK_CONFIG   __HAL_RCC_I2S_CONFIG
 
#define __RCC_PLLSRC   RCC_GET_PLL_OSCSOURCE
 
#define IS_RCC_MSIRANGE   IS_RCC_MSI_CLOCK_RANGE
 
#define IS_RCC_RTCCLK_SOURCE   IS_RCC_RTCCLKSOURCE
 
#define IS_RCC_SYSCLK_DIV   IS_RCC_HCLK
 
#define IS_RCC_HCLK_DIV   IS_RCC_PCLK
 
#define IS_RCC_PERIPHCLK   IS_RCC_PERIPHCLOCK
 
#define RCC_IT_HSI14   RCC_IT_HSI14RDY
 
#define IS_RCC_MCOSOURCE   IS_RCC_MCO1SOURCE
 
#define __HAL_RCC_MCO_CONFIG   __HAL_RCC_MCO1_CONFIG
 
#define RCC_MCO_NODIV   RCC_MCODIV_1
 
#define RCC_MCO_DIV1   RCC_MCODIV_1
 
#define RCC_MCO_DIV2   RCC_MCODIV_2
 
#define RCC_MCO_DIV4   RCC_MCODIV_4
 
#define RCC_MCO_DIV8   RCC_MCODIV_8
 
#define RCC_MCO_DIV16   RCC_MCODIV_16
 
#define RCC_MCO_DIV32   RCC_MCODIV_32
 
#define RCC_MCO_DIV64   RCC_MCODIV_64
 
#define RCC_MCO_DIV128   RCC_MCODIV_128
 
#define RCC_MCOSOURCE_NONE   RCC_MCO1SOURCE_NOCLOCK
 
#define RCC_MCOSOURCE_LSI   RCC_MCO1SOURCE_LSI
 
#define RCC_MCOSOURCE_LSE   RCC_MCO1SOURCE_LSE
 
#define RCC_MCOSOURCE_SYSCLK   RCC_MCO1SOURCE_SYSCLK
 
#define RCC_MCOSOURCE_HSI   RCC_MCO1SOURCE_HSI
 
#define RCC_MCOSOURCE_HSI14   RCC_MCO1SOURCE_HSI14
 
#define RCC_MCOSOURCE_HSI48   RCC_MCO1SOURCE_HSI48
 
#define RCC_MCOSOURCE_HSE   RCC_MCO1SOURCE_HSE
 
#define RCC_MCOSOURCE_PLLCLK_DIV1   RCC_MCO1SOURCE_PLLCLK
 
#define RCC_MCOSOURCE_PLLCLK_NODIV   RCC_MCO1SOURCE_PLLCLK
 
#define RCC_MCOSOURCE_PLLCLK_DIV2   RCC_MCO1SOURCE_PLLCLK_DIV2
 
#define RCC_RTCCLKSOURCE_NONE   RCC_RTCCLKSOURCE_NO_CLK
 
#define RCC_USBCLK_PLLSAI1   RCC_USBCLKSOURCE_PLLSAI1
 
#define RCC_USBCLK_PLL   RCC_USBCLKSOURCE_PLL
 
#define RCC_USBCLK_MSI   RCC_USBCLKSOURCE_MSI
 
#define RCC_USBCLKSOURCE_PLLCLK   RCC_USBCLKSOURCE_PLL
 
#define RCC_USBPLLCLK_DIV1   RCC_USBCLKSOURCE_PLL
 
#define RCC_USBPLLCLK_DIV1_5   RCC_USBCLKSOURCE_PLL_DIV1_5
 
#define RCC_USBPLLCLK_DIV2   RCC_USBCLKSOURCE_PLL_DIV2
 
#define RCC_USBPLLCLK_DIV3   RCC_USBCLKSOURCE_PLL_DIV3
 
#define HSION_BitNumber   RCC_HSION_BIT_NUMBER
 
#define HSION_BITNUMBER   RCC_HSION_BIT_NUMBER
 
#define HSEON_BitNumber   RCC_HSEON_BIT_NUMBER
 
#define HSEON_BITNUMBER   RCC_HSEON_BIT_NUMBER
 
#define MSION_BITNUMBER   RCC_MSION_BIT_NUMBER
 
#define CSSON_BitNumber   RCC_CSSON_BIT_NUMBER
 
#define CSSON_BITNUMBER   RCC_CSSON_BIT_NUMBER
 
#define PLLON_BitNumber   RCC_PLLON_BIT_NUMBER
 
#define PLLON_BITNUMBER   RCC_PLLON_BIT_NUMBER
 
#define PLLI2SON_BitNumber   RCC_PLLI2SON_BIT_NUMBER
 
#define I2SSRC_BitNumber   RCC_I2SSRC_BIT_NUMBER
 
#define RTCEN_BitNumber   RCC_RTCEN_BIT_NUMBER
 
#define RTCEN_BITNUMBER   RCC_RTCEN_BIT_NUMBER
 
#define BDRST_BitNumber   RCC_BDRST_BIT_NUMBER
 
#define BDRST_BITNUMBER   RCC_BDRST_BIT_NUMBER
 
#define RTCRST_BITNUMBER   RCC_RTCRST_BIT_NUMBER
 
#define LSION_BitNumber   RCC_LSION_BIT_NUMBER
 
#define LSION_BITNUMBER   RCC_LSION_BIT_NUMBER
 
#define LSEON_BitNumber   RCC_LSEON_BIT_NUMBER
 
#define LSEON_BITNUMBER   RCC_LSEON_BIT_NUMBER
 
#define LSEBYP_BITNUMBER   RCC_LSEBYP_BIT_NUMBER
 
#define PLLSAION_BitNumber   RCC_PLLSAION_BIT_NUMBER
 
#define TIMPRE_BitNumber   RCC_TIMPRE_BIT_NUMBER
 
#define RMVF_BitNumber   RCC_RMVF_BIT_NUMBER
 
#define RMVF_BITNUMBER   RCC_RMVF_BIT_NUMBER
 
#define RCC_CR2_HSI14TRIM_BitNumber   RCC_HSI14TRIM_BIT_NUMBER
 
#define CR_BYTE2_ADDRESS   RCC_CR_BYTE2_ADDRESS
 
#define CIR_BYTE1_ADDRESS   RCC_CIR_BYTE1_ADDRESS
 
#define CIR_BYTE2_ADDRESS   RCC_CIR_BYTE2_ADDRESS
 
#define BDCR_BYTE0_ADDRESS   RCC_BDCR_BYTE0_ADDRESS
 
#define DBP_TIMEOUT_VALUE   RCC_DBP_TIMEOUT_VALUE
 
#define LSE_TIMEOUT_VALUE   RCC_LSE_TIMEOUT_VALUE
 
#define CR_HSION_BB   RCC_CR_HSION_BB
 
#define CR_CSSON_BB   RCC_CR_CSSON_BB
 
#define CR_PLLON_BB   RCC_CR_PLLON_BB
 
#define CR_PLLI2SON_BB   RCC_CR_PLLI2SON_BB
 
#define CR_MSION_BB   RCC_CR_MSION_BB
 
#define CSR_LSION_BB   RCC_CSR_LSION_BB
 
#define CSR_LSEON_BB   RCC_CSR_LSEON_BB
 
#define CSR_LSEBYP_BB   RCC_CSR_LSEBYP_BB
 
#define CSR_RTCEN_BB   RCC_CSR_RTCEN_BB
 
#define CSR_RTCRST_BB   RCC_CSR_RTCRST_BB
 
#define CFGR_I2SSRC_BB   RCC_CFGR_I2SSRC_BB
 
#define BDCR_RTCEN_BB   RCC_BDCR_RTCEN_BB
 
#define BDCR_BDRST_BB   RCC_BDCR_BDRST_BB
 
#define CR_HSEON_BB   RCC_CR_HSEON_BB
 
#define CSR_RMVF_BB   RCC_CSR_RMVF_BB
 
#define CR_PLLSAION_BB   RCC_CR_PLLSAION_BB
 
#define DCKCFGR_TIMPRE_BB   RCC_DCKCFGR_TIMPRE_BB
 
#define __HAL_RCC_CRS_ENABLE_FREQ_ERROR_COUNTER   __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE
 
#define __HAL_RCC_CRS_DISABLE_FREQ_ERROR_COUNTER   __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE
 
#define __HAL_RCC_CRS_ENABLE_AUTOMATIC_CALIB   __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE
 
#define __HAL_RCC_CRS_DISABLE_AUTOMATIC_CALIB   __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE
 
#define __HAL_RCC_CRS_CALCULATE_RELOADVALUE   __HAL_RCC_CRS_RELOADVALUE_CALCULATE
 
#define __HAL_RCC_GET_IT_SOURCE   __HAL_RCC_GET_IT
 
#define RCC_CRS_SYNCWARM   RCC_CRS_SYNCWARN
 
#define RCC_CRS_TRIMOV   RCC_CRS_TRIMOVF
 
#define RCC_PERIPHCLK_CK48   RCC_PERIPHCLK_CLK48
 
#define RCC_CK48CLKSOURCE_PLLQ   RCC_CLK48CLKSOURCE_PLLQ
 
#define RCC_CK48CLKSOURCE_PLLSAIP   RCC_CLK48CLKSOURCE_PLLSAIP
 
#define RCC_CK48CLKSOURCE_PLLI2SQ   RCC_CLK48CLKSOURCE_PLLI2SQ
 
#define IS_RCC_CK48CLKSOURCE   IS_RCC_CLK48CLKSOURCE
 
#define RCC_SDIOCLKSOURCE_CK48   RCC_SDIOCLKSOURCE_CLK48
 
#define __HAL_RCC_DFSDM_CLK_ENABLE   __HAL_RCC_DFSDM1_CLK_ENABLE
 
#define __HAL_RCC_DFSDM_CLK_DISABLE   __HAL_RCC_DFSDM1_CLK_DISABLE
 
#define __HAL_RCC_DFSDM_IS_CLK_ENABLED   __HAL_RCC_DFSDM1_IS_CLK_ENABLED
 
#define __HAL_RCC_DFSDM_IS_CLK_DISABLED   __HAL_RCC_DFSDM1_IS_CLK_DISABLED
 
#define __HAL_RCC_DFSDM_FORCE_RESET   __HAL_RCC_DFSDM1_FORCE_RESET
 
#define __HAL_RCC_DFSDM_RELEASE_RESET   __HAL_RCC_DFSDM1_RELEASE_RESET
 
#define __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE   __HAL_RCC_DFSDM1_CLK_SLEEP_ENABLE
 
#define __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE   __HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE
 
#define __HAL_RCC_DFSDM_IS_CLK_SLEEP_ENABLED   __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED
 
#define __HAL_RCC_DFSDM_IS_CLK_SLEEP_DISABLED   __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED
 
#define DfsdmClockSelection   Dfsdm1ClockSelection
 
#define RCC_PERIPHCLK_DFSDM   RCC_PERIPHCLK_DFSDM1
 
#define RCC_DFSDMCLKSOURCE_PCLK   RCC_DFSDM1CLKSOURCE_PCLK
 
#define RCC_DFSDMCLKSOURCE_SYSCLK   RCC_DFSDM1CLKSOURCE_SYSCLK
 
#define __HAL_RCC_DFSDM_CONFIG   __HAL_RCC_DFSDM1_CONFIG
 
#define __HAL_RCC_GET_DFSDM_SOURCE   __HAL_RCC_GET_DFSDM1_SOURCE
 

Detailed Description

Macro Definition Documentation

#define __ADC12_CLK_DISABLE   __HAL_RCC_ADC12_CLK_DISABLE

Definition at line 2432 of file stm32_hal_legacy.h.

#define __ADC12_CLK_DISABLE   __HAL_RCC_ADC12_CLK_DISABLE

Definition at line 2432 of file stm32_hal_legacy.h.

#define __ADC12_CLK_ENABLE   __HAL_RCC_ADC12_CLK_ENABLE

Definition at line 2431 of file stm32_hal_legacy.h.

#define __ADC12_CLK_ENABLE   __HAL_RCC_ADC12_CLK_ENABLE

Definition at line 2431 of file stm32_hal_legacy.h.

#define __ADC12_FORCE_RESET   __HAL_RCC_ADC12_FORCE_RESET

Definition at line 2454 of file stm32_hal_legacy.h.

#define __ADC12_FORCE_RESET   __HAL_RCC_ADC12_FORCE_RESET

Definition at line 2454 of file stm32_hal_legacy.h.

#define __ADC12_IS_CLK_DISABLED   __HAL_RCC_ADC12_IS_CLK_DISABLED

Definition at line 2476 of file stm32_hal_legacy.h.

#define __ADC12_IS_CLK_ENABLED   __HAL_RCC_ADC12_IS_CLK_ENABLED

Definition at line 2475 of file stm32_hal_legacy.h.

#define __ADC12_RELEASE_RESET   __HAL_RCC_ADC12_RELEASE_RESET

Definition at line 2455 of file stm32_hal_legacy.h.

#define __ADC12_RELEASE_RESET   __HAL_RCC_ADC12_RELEASE_RESET

Definition at line 2455 of file stm32_hal_legacy.h.

#define __ADC1_CLK_DISABLE   __HAL_RCC_ADC1_CLK_DISABLE

Definition at line 1779 of file stm32_hal_legacy.h.

#define __ADC1_CLK_ENABLE   __HAL_RCC_ADC1_CLK_ENABLE

Definition at line 1780 of file stm32_hal_legacy.h.

#define __ADC1_CLK_SLEEP_DISABLE   __HAL_RCC_ADC1_CLK_SLEEP_DISABLE

Definition at line 1784 of file stm32_hal_legacy.h.

#define __ADC1_CLK_SLEEP_ENABLE   __HAL_RCC_ADC1_CLK_SLEEP_ENABLE

Definition at line 1783 of file stm32_hal_legacy.h.

#define __ADC1_FORCE_RESET   __HAL_RCC_ADC1_FORCE_RESET

Definition at line 1781 of file stm32_hal_legacy.h.

#define __ADC1_IS_CLK_DISABLED   __HAL_RCC_ADC1_IS_CLK_DISABLED

Definition at line 2474 of file stm32_hal_legacy.h.

#define __ADC1_IS_CLK_ENABLED   __HAL_RCC_ADC1_IS_CLK_ENABLED

Definition at line 2473 of file stm32_hal_legacy.h.

#define __ADC1_RELEASE_RESET   __HAL_RCC_ADC1_RELEASE_RESET

Definition at line 1782 of file stm32_hal_legacy.h.

#define __ADC2_CLK_DISABLE   __HAL_RCC_ADC2_CLK_DISABLE

Definition at line 1785 of file stm32_hal_legacy.h.

#define __ADC2_CLK_ENABLE   __HAL_RCC_ADC2_CLK_ENABLE

Definition at line 1786 of file stm32_hal_legacy.h.

#define __ADC2_CLK_SLEEP_DISABLE   __HAL_RCC_ADC2_CLK_SLEEP_DISABLE

Definition at line 2405 of file stm32_hal_legacy.h.

#define __ADC2_CLK_SLEEP_ENABLE   __HAL_RCC_ADC2_CLK_SLEEP_ENABLE

Definition at line 2404 of file stm32_hal_legacy.h.

#define __ADC2_FORCE_RESET   __HAL_RCC_ADC2_FORCE_RESET

Definition at line 1787 of file stm32_hal_legacy.h.

#define __ADC2_RELEASE_RESET   __HAL_RCC_ADC2_RELEASE_RESET

Definition at line 1788 of file stm32_hal_legacy.h.

#define __ADC34_CLK_DISABLE   __HAL_RCC_ADC34_CLK_DISABLE

Definition at line 2430 of file stm32_hal_legacy.h.

#define __ADC34_CLK_ENABLE   __HAL_RCC_ADC34_CLK_ENABLE

Definition at line 2429 of file stm32_hal_legacy.h.

#define __ADC34_FORCE_RESET   __HAL_RCC_ADC34_FORCE_RESET

Definition at line 2452 of file stm32_hal_legacy.h.

#define __ADC34_IS_CLK_DISABLED   __HAL_RCC_ADC34_IS_CLK_DISABLED

Definition at line 2478 of file stm32_hal_legacy.h.

#define __ADC34_IS_CLK_ENABLED   __HAL_RCC_ADC34_IS_CLK_ENABLED

Definition at line 2477 of file stm32_hal_legacy.h.

#define __ADC34_RELEASE_RESET   __HAL_RCC_ADC34_RELEASE_RESET

Definition at line 2453 of file stm32_hal_legacy.h.

#define __ADC3_CLK_DISABLE   __HAL_RCC_ADC3_CLK_DISABLE

Definition at line 1789 of file stm32_hal_legacy.h.

#define __ADC3_CLK_ENABLE   __HAL_RCC_ADC3_CLK_ENABLE

Definition at line 1790 of file stm32_hal_legacy.h.

#define __ADC3_CLK_SLEEP_DISABLE   __HAL_RCC_ADC3_CLK_SLEEP_DISABLE

Definition at line 2407 of file stm32_hal_legacy.h.

#define __ADC3_CLK_SLEEP_ENABLE   __HAL_RCC_ADC3_CLK_SLEEP_ENABLE

Definition at line 2406 of file stm32_hal_legacy.h.

#define __ADC3_FORCE_RESET   __HAL_RCC_ADC3_FORCE_RESET

Definition at line 1791 of file stm32_hal_legacy.h.

#define __ADC3_RELEASE_RESET   __HAL_RCC_ADC3_RELEASE_RESET

Definition at line 1792 of file stm32_hal_legacy.h.

#define __ADC_CLK_DISABLE   __HAL_RCC_ADC_CLK_DISABLE

Definition at line 1773 of file stm32_hal_legacy.h.

#define __ADC_CLK_ENABLE   __HAL_RCC_ADC_CLK_ENABLE

Definition at line 1774 of file stm32_hal_legacy.h.

#define __ADC_CLK_SLEEP_DISABLE   __HAL_RCC_ADC_CLK_SLEEP_DISABLE

Definition at line 1775 of file stm32_hal_legacy.h.

#define __ADC_CLK_SLEEP_ENABLE   __HAL_RCC_ADC_CLK_SLEEP_ENABLE

Definition at line 1776 of file stm32_hal_legacy.h.

#define __ADC_FORCE_RESET   __HAL_RCC_ADC_FORCE_RESET

Definition at line 1777 of file stm32_hal_legacy.h.

#define __ADC_RELEASE_RESET   __HAL_RCC_ADC_RELEASE_RESET

Definition at line 1778 of file stm32_hal_legacy.h.

#define __AES_CLK_DISABLE   __HAL_RCC_AES_CLK_DISABLE

Definition at line 1793 of file stm32_hal_legacy.h.

#define __AES_CLK_ENABLE   __HAL_RCC_AES_CLK_ENABLE

Definition at line 1794 of file stm32_hal_legacy.h.

#define __AES_CLK_SLEEP_DISABLE   __HAL_RCC_AES_CLK_SLEEP_DISABLE

Definition at line 1795 of file stm32_hal_legacy.h.

#define __AES_CLK_SLEEP_ENABLE   __HAL_RCC_AES_CLK_SLEEP_ENABLE

Definition at line 1796 of file stm32_hal_legacy.h.

#define __AES_FORCE_RESET   __HAL_RCC_AES_FORCE_RESET

Definition at line 1797 of file stm32_hal_legacy.h.

#define __AES_RELEASE_RESET   __HAL_RCC_AES_RELEASE_RESET

Definition at line 1798 of file stm32_hal_legacy.h.

#define __AFIO_CLK_DISABLE   __HAL_RCC_AFIO_CLK_DISABLE

Definition at line 1805 of file stm32_hal_legacy.h.

#define __AFIO_CLK_ENABLE   __HAL_RCC_AFIO_CLK_ENABLE

Definition at line 1806 of file stm32_hal_legacy.h.

#define __AFIO_FORCE_RESET   __HAL_RCC_AFIO_FORCE_RESET

Definition at line 1807 of file stm32_hal_legacy.h.

#define __AFIO_RELEASE_RESET   __HAL_RCC_AFIO_RELEASE_RESET

Definition at line 1808 of file stm32_hal_legacy.h.

#define __AHB1_FORCE_RESET   __HAL_RCC_AHB1_FORCE_RESET

Definition at line 1811 of file stm32_hal_legacy.h.

#define __AHB1_RELEASE_RESET   __HAL_RCC_AHB1_RELEASE_RESET

Definition at line 1812 of file stm32_hal_legacy.h.

#define __AHB2_FORCE_RESET   __HAL_RCC_AHB2_FORCE_RESET

Definition at line 1813 of file stm32_hal_legacy.h.

#define __AHB2_RELEASE_RESET   __HAL_RCC_AHB2_RELEASE_RESET

Definition at line 1814 of file stm32_hal_legacy.h.

#define __AHB3_FORCE_RESET   __HAL_RCC_AHB3_FORCE_RESET

Definition at line 1815 of file stm32_hal_legacy.h.

#define __AHB3_RELEASE_RESET   __HAL_RCC_AHB3_RELEASE_RESET

Definition at line 1816 of file stm32_hal_legacy.h.

#define __AHB_FORCE_RESET   __HAL_RCC_AHB_FORCE_RESET

Definition at line 1809 of file stm32_hal_legacy.h.

#define __AHB_RELEASE_RESET   __HAL_RCC_AHB_RELEASE_RESET

Definition at line 1810 of file stm32_hal_legacy.h.

#define __APB1_FORCE_RESET   __HAL_RCC_APB1_FORCE_RESET

Definition at line 1817 of file stm32_hal_legacy.h.

#define __APB1_RELEASE_RESET   __HAL_RCC_APB1_RELEASE_RESET

Definition at line 1818 of file stm32_hal_legacy.h.

#define __APB2_FORCE_RESET   __HAL_RCC_APB2_FORCE_RESET

Definition at line 1819 of file stm32_hal_legacy.h.

#define __APB2_RELEASE_RESET   __HAL_RCC_APB2_RELEASE_RESET

Definition at line 1820 of file stm32_hal_legacy.h.

#define __BKP_CLK_DISABLE   __HAL_RCC_BKP_CLK_DISABLE

Definition at line 1821 of file stm32_hal_legacy.h.

#define __BKP_CLK_ENABLE   __HAL_RCC_BKP_CLK_ENABLE

Definition at line 1822 of file stm32_hal_legacy.h.

#define __BKP_FORCE_RESET   __HAL_RCC_BKP_FORCE_RESET

Definition at line 1823 of file stm32_hal_legacy.h.

#define __BKP_RELEASE_RESET   __HAL_RCC_BKP_RELEASE_RESET

Definition at line 1824 of file stm32_hal_legacy.h.

#define __BKPSRAM_CLK_DISABLE   __HAL_RCC_BKPSRAM_CLK_DISABLE

Definition at line 2328 of file stm32_hal_legacy.h.

#define __BKPSRAM_CLK_ENABLE   __HAL_RCC_BKPSRAM_CLK_ENABLE

Definition at line 2327 of file stm32_hal_legacy.h.

#define __BKPSRAM_CLK_SLEEP_DISABLE   __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE

Definition at line 2330 of file stm32_hal_legacy.h.

#define __BKPSRAM_CLK_SLEEP_ENABLE   __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE

Definition at line 2329 of file stm32_hal_legacy.h.

#define __CAN1_CLK_DISABLE   __HAL_RCC_CAN1_CLK_DISABLE

Definition at line 1825 of file stm32_hal_legacy.h.

#define __CAN1_CLK_ENABLE   __HAL_RCC_CAN1_CLK_ENABLE

Definition at line 1826 of file stm32_hal_legacy.h.

#define __CAN1_CLK_SLEEP_DISABLE   __HAL_RCC_CAN1_CLK_SLEEP_DISABLE

Definition at line 1827 of file stm32_hal_legacy.h.

#define __CAN1_CLK_SLEEP_ENABLE   __HAL_RCC_CAN1_CLK_SLEEP_ENABLE

Definition at line 1828 of file stm32_hal_legacy.h.

#define __CAN1_FORCE_RESET   __HAL_RCC_CAN1_FORCE_RESET

Definition at line 1829 of file stm32_hal_legacy.h.

#define __CAN1_RELEASE_RESET   __HAL_RCC_CAN1_RELEASE_RESET

Definition at line 1830 of file stm32_hal_legacy.h.

#define __CAN2_CLK_DISABLE   __HAL_RCC_CAN2_CLK_DISABLE

Definition at line 1835 of file stm32_hal_legacy.h.

#define __CAN2_CLK_ENABLE   __HAL_RCC_CAN2_CLK_ENABLE

Definition at line 1836 of file stm32_hal_legacy.h.

#define __CAN2_CLK_SLEEP_DISABLE   __HAL_RCC_CAN2_CLK_SLEEP_DISABLE

Definition at line 2401 of file stm32_hal_legacy.h.

#define __CAN2_CLK_SLEEP_ENABLE   __HAL_RCC_CAN2_CLK_SLEEP_ENABLE

Definition at line 2400 of file stm32_hal_legacy.h.

#define __CAN2_FORCE_RESET   __HAL_RCC_CAN2_FORCE_RESET

Definition at line 1837 of file stm32_hal_legacy.h.

#define __CAN2_RELEASE_RESET   __HAL_RCC_CAN2_RELEASE_RESET

Definition at line 1838 of file stm32_hal_legacy.h.

#define __CAN_CLK_DISABLE   __HAL_RCC_CAN1_CLK_DISABLE

Definition at line 1831 of file stm32_hal_legacy.h.

#define __CAN_CLK_ENABLE   __HAL_RCC_CAN1_CLK_ENABLE

Definition at line 1832 of file stm32_hal_legacy.h.

#define __CAN_FORCE_RESET   __HAL_RCC_CAN1_FORCE_RESET

Definition at line 1833 of file stm32_hal_legacy.h.

#define __CAN_RELEASE_RESET   __HAL_RCC_CAN1_RELEASE_RESET

Definition at line 1834 of file stm32_hal_legacy.h.

#define __CCMDATARAMEN_CLK_DISABLE   __HAL_RCC_CCMDATARAMEN_CLK_DISABLE

Definition at line 2332 of file stm32_hal_legacy.h.

#define __CCMDATARAMEN_CLK_ENABLE   __HAL_RCC_CCMDATARAMEN_CLK_ENABLE

Definition at line 2331 of file stm32_hal_legacy.h.

#define __CEC_CLK_DISABLE   __HAL_RCC_CEC_CLK_DISABLE

Definition at line 1839 of file stm32_hal_legacy.h.

#define __CEC_CLK_ENABLE   __HAL_RCC_CEC_CLK_ENABLE

Definition at line 1840 of file stm32_hal_legacy.h.

#define __CEC_FORCE_RESET   __HAL_RCC_CEC_FORCE_RESET

Definition at line 1847 of file stm32_hal_legacy.h.

#define __CEC_IS_CLK_DISABLED   __HAL_RCC_CEC_IS_CLK_DISABLED

Definition at line 2480 of file stm32_hal_legacy.h.

#define __CEC_IS_CLK_ENABLED   __HAL_RCC_CEC_IS_CLK_ENABLED

Definition at line 2479 of file stm32_hal_legacy.h.

#define __CEC_RELEASE_RESET   __HAL_RCC_CEC_RELEASE_RESET

Definition at line 1848 of file stm32_hal_legacy.h.

#define __COMP_CLK_DISABLE   __HAL_RCC_COMP_CLK_DISABLE

Definition at line 1841 of file stm32_hal_legacy.h.

#define __COMP_CLK_ENABLE   __HAL_RCC_COMP_CLK_ENABLE

Definition at line 1842 of file stm32_hal_legacy.h.

#define __COMP_CLK_SLEEP_DISABLE   __HAL_RCC_COMP_CLK_SLEEP_DISABLE

Definition at line 1846 of file stm32_hal_legacy.h.

#define __COMP_CLK_SLEEP_ENABLE   __HAL_RCC_COMP_CLK_SLEEP_ENABLE

Definition at line 1845 of file stm32_hal_legacy.h.

#define __COMP_FORCE_RESET   __HAL_RCC_COMP_FORCE_RESET

Definition at line 1843 of file stm32_hal_legacy.h.

#define __COMP_RELEASE_RESET   __HAL_RCC_COMP_RELEASE_RESET

Definition at line 1844 of file stm32_hal_legacy.h.

#define __CRC_CLK_DISABLE   __HAL_RCC_CRC_CLK_DISABLE

Definition at line 1849 of file stm32_hal_legacy.h.

#define __CRC_CLK_ENABLE   __HAL_RCC_CRC_CLK_ENABLE

Definition at line 1850 of file stm32_hal_legacy.h.

#define __CRC_CLK_SLEEP_DISABLE   __HAL_RCC_CRC_CLK_SLEEP_DISABLE

Definition at line 1851 of file stm32_hal_legacy.h.

#define __CRC_CLK_SLEEP_ENABLE   __HAL_RCC_CRC_CLK_SLEEP_ENABLE

Definition at line 1852 of file stm32_hal_legacy.h.

#define __CRC_FORCE_RESET   __HAL_RCC_CRC_FORCE_RESET

Definition at line 1853 of file stm32_hal_legacy.h.

#define __CRC_IS_CLK_DISABLED   __HAL_RCC_CRC_IS_CLK_DISABLED

Definition at line 2482 of file stm32_hal_legacy.h.

#define __CRC_IS_CLK_ENABLED   __HAL_RCC_CRC_IS_CLK_ENABLED

Definition at line 2481 of file stm32_hal_legacy.h.

#define __CRC_RELEASE_RESET   __HAL_RCC_CRC_RELEASE_RESET

Definition at line 1854 of file stm32_hal_legacy.h.

#define __CRS_CLK_DISABLE   __HAL_RCC_CRS_CLK_DISABLE

Definition at line 2265 of file stm32_hal_legacy.h.

#define __CRS_CLK_ENABLE   __HAL_RCC_CRS_CLK_ENABLE

Definition at line 2266 of file stm32_hal_legacy.h.

#define __CRS_CLK_SLEEP_DISABLE   __HAL_RCC_CRS_CLK_SLEEP_DISABLE

Definition at line 2267 of file stm32_hal_legacy.h.

#define __CRS_CLK_SLEEP_ENABLE   __HAL_RCC_CRS_CLK_SLEEP_ENABLE

Definition at line 2268 of file stm32_hal_legacy.h.

#define __CRS_FORCE_RESET   __HAL_RCC_CRS_FORCE_RESET

Definition at line 2269 of file stm32_hal_legacy.h.

#define __CRS_RELEASE_RESET   __HAL_RCC_CRS_RELEASE_RESET

Definition at line 2270 of file stm32_hal_legacy.h.

#define __CRYP_CLK_DISABLE   __HAL_RCC_CRYP_CLK_DISABLE

Definition at line 1802 of file stm32_hal_legacy.h.

#define __CRYP_CLK_ENABLE   __HAL_RCC_CRYP_CLK_ENABLE

Definition at line 1801 of file stm32_hal_legacy.h.

#define __CRYP_CLK_SLEEP_DISABLE   __HAL_RCC_CRYP_CLK_SLEEP_DISABLE

Definition at line 1800 of file stm32_hal_legacy.h.

#define __CRYP_CLK_SLEEP_ENABLE   __HAL_RCC_CRYP_CLK_SLEEP_ENABLE

Definition at line 1799 of file stm32_hal_legacy.h.

#define __CRYP_FORCE_RESET   __HAL_RCC_CRYP_FORCE_RESET

Definition at line 2398 of file stm32_hal_legacy.h.

#define __CRYP_FORCE_RESET   __HAL_RCC_CRYP_FORCE_RESET

Definition at line 2398 of file stm32_hal_legacy.h.

#define __CRYP_RELEASE_RESET   __HAL_RCC_CRYP_RELEASE_RESET

Definition at line 1804 of file stm32_hal_legacy.h.

#define __DAC1_CLK_DISABLE   __HAL_RCC_DAC1_CLK_DISABLE

Definition at line 1859 of file stm32_hal_legacy.h.

#define __DAC1_CLK_ENABLE   __HAL_RCC_DAC1_CLK_ENABLE

Definition at line 1860 of file stm32_hal_legacy.h.

#define __DAC1_CLK_SLEEP_DISABLE   __HAL_RCC_DAC1_CLK_SLEEP_DISABLE

Definition at line 1861 of file stm32_hal_legacy.h.

#define __DAC1_CLK_SLEEP_ENABLE   __HAL_RCC_DAC1_CLK_SLEEP_ENABLE

Definition at line 1862 of file stm32_hal_legacy.h.

#define __DAC1_FORCE_RESET   __HAL_RCC_DAC1_FORCE_RESET

Definition at line 1863 of file stm32_hal_legacy.h.

#define __DAC1_IS_CLK_DISABLED   __HAL_RCC_DAC1_IS_CLK_DISABLED

Definition at line 2484 of file stm32_hal_legacy.h.

#define __DAC1_IS_CLK_ENABLED   __HAL_RCC_DAC1_IS_CLK_ENABLED

Definition at line 2483 of file stm32_hal_legacy.h.

#define __DAC1_RELEASE_RESET   __HAL_RCC_DAC1_RELEASE_RESET

Definition at line 1864 of file stm32_hal_legacy.h.

#define __DAC2_CLK_DISABLE   __HAL_RCC_DAC2_CLK_DISABLE

Definition at line 2434 of file stm32_hal_legacy.h.

#define __DAC2_CLK_ENABLE   __HAL_RCC_DAC2_CLK_ENABLE

Definition at line 2433 of file stm32_hal_legacy.h.

#define __DAC2_FORCE_RESET   __HAL_RCC_DAC2_FORCE_RESET

Definition at line 2456 of file stm32_hal_legacy.h.

#define __DAC2_IS_CLK_DISABLED   __HAL_RCC_DAC2_IS_CLK_DISABLED

Definition at line 2486 of file stm32_hal_legacy.h.

#define __DAC2_IS_CLK_ENABLED   __HAL_RCC_DAC2_IS_CLK_ENABLED

Definition at line 2485 of file stm32_hal_legacy.h.

#define __DAC2_RELEASE_RESET   __HAL_RCC_DAC2_RELEASE_RESET

Definition at line 2457 of file stm32_hal_legacy.h.

#define __DAC_CLK_DISABLE   __HAL_RCC_DAC_CLK_DISABLE

Definition at line 1855 of file stm32_hal_legacy.h.

#define __DAC_CLK_ENABLE   __HAL_RCC_DAC_CLK_ENABLE

Definition at line 1856 of file stm32_hal_legacy.h.

#define __DAC_CLK_SLEEP_DISABLE   __HAL_RCC_DAC_CLK_SLEEP_DISABLE

Definition at line 2403 of file stm32_hal_legacy.h.

#define __DAC_CLK_SLEEP_ENABLE   __HAL_RCC_DAC_CLK_SLEEP_ENABLE

Definition at line 2402 of file stm32_hal_legacy.h.

#define __DAC_FORCE_RESET   __HAL_RCC_DAC_FORCE_RESET

Definition at line 1857 of file stm32_hal_legacy.h.

#define __DAC_RELEASE_RESET   __HAL_RCC_DAC_RELEASE_RESET

Definition at line 1858 of file stm32_hal_legacy.h.

#define __DBGMCU_CLK_DISABLE   __HAL_RCC_DBGMCU_CLK_DISABLE

Definition at line 1866 of file stm32_hal_legacy.h.

#define __DBGMCU_CLK_ENABLE   __HAL_RCC_DBGMCU_CLK_ENABLE

Definition at line 1865 of file stm32_hal_legacy.h.

#define __DBGMCU_FORCE_RESET   __HAL_RCC_DBGMCU_FORCE_RESET

Definition at line 1867 of file stm32_hal_legacy.h.

#define __DBGMCU_RELEASE_RESET   __HAL_RCC_DBGMCU_RELEASE_RESET

Definition at line 1868 of file stm32_hal_legacy.h.

#define __DCMI_CLK_DISABLE   __HAL_RCC_DCMI_CLK_DISABLE

Definition at line 2365 of file stm32_hal_legacy.h.

#define __DCMI_CLK_ENABLE   __HAL_RCC_DCMI_CLK_ENABLE

Definition at line 2364 of file stm32_hal_legacy.h.

#define __DCMI_CLK_SLEEP_DISABLE   __HAL_RCC_DCMI_CLK_SLEEP_DISABLE

Definition at line 2369 of file stm32_hal_legacy.h.

#define __DCMI_CLK_SLEEP_ENABLE   __HAL_RCC_DCMI_CLK_SLEEP_ENABLE

Definition at line 2368 of file stm32_hal_legacy.h.

#define __DCMI_FORCE_RESET   __HAL_RCC_DCMI_FORCE_RESET

Definition at line 2366 of file stm32_hal_legacy.h.

#define __DCMI_RELEASE_RESET   __HAL_RCC_DCMI_RELEASE_RESET

Definition at line 2367 of file stm32_hal_legacy.h.

#define __DFSDM_CLK_DISABLE   __HAL_RCC_DFSDM_CLK_DISABLE

Definition at line 1869 of file stm32_hal_legacy.h.

#define __DFSDM_CLK_ENABLE   __HAL_RCC_DFSDM_CLK_ENABLE

Definition at line 1870 of file stm32_hal_legacy.h.

#define __DFSDM_CLK_SLEEP_DISABLE   __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE

Definition at line 1871 of file stm32_hal_legacy.h.

#define __DFSDM_CLK_SLEEP_ENABLE   __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE

Definition at line 1872 of file stm32_hal_legacy.h.

#define __DFSDM_FORCE_RESET   __HAL_RCC_DFSDM_FORCE_RESET

Definition at line 1873 of file stm32_hal_legacy.h.

#define __DFSDM_RELEASE_RESET   __HAL_RCC_DFSDM_RELEASE_RESET

Definition at line 1874 of file stm32_hal_legacy.h.

#define __DMA1_CLK_DISABLE   __HAL_RCC_DMA1_CLK_DISABLE

Definition at line 1875 of file stm32_hal_legacy.h.

#define __DMA1_CLK_ENABLE   __HAL_RCC_DMA1_CLK_ENABLE

Definition at line 1876 of file stm32_hal_legacy.h.

#define __DMA1_CLK_SLEEP_DISABLE   __HAL_RCC_DMA1_CLK_SLEEP_DISABLE

Definition at line 1877 of file stm32_hal_legacy.h.

#define __DMA1_CLK_SLEEP_ENABLE   __HAL_RCC_DMA1_CLK_SLEEP_ENABLE

Definition at line 1878 of file stm32_hal_legacy.h.

#define __DMA1_FORCE_RESET   __HAL_RCC_DMA1_FORCE_RESET

Definition at line 1879 of file stm32_hal_legacy.h.

#define __DMA1_IS_CLK_DISABLED   __HAL_RCC_DMA1_IS_CLK_DISABLED

Definition at line 2488 of file stm32_hal_legacy.h.

#define __DMA1_IS_CLK_ENABLED   __HAL_RCC_DMA1_IS_CLK_ENABLED

Definition at line 2487 of file stm32_hal_legacy.h.

#define __DMA1_RELEASE_RESET   __HAL_RCC_DMA1_RELEASE_RESET

Definition at line 1880 of file stm32_hal_legacy.h.

#define __DMA2_CLK_DISABLE   __HAL_RCC_DMA2_CLK_DISABLE

Definition at line 1881 of file stm32_hal_legacy.h.

#define __DMA2_CLK_ENABLE   __HAL_RCC_DMA2_CLK_ENABLE

Definition at line 1882 of file stm32_hal_legacy.h.

#define __DMA2_CLK_SLEEP_DISABLE   __HAL_RCC_DMA2_CLK_SLEEP_DISABLE

Definition at line 1883 of file stm32_hal_legacy.h.

#define __DMA2_CLK_SLEEP_ENABLE   __HAL_RCC_DMA2_CLK_SLEEP_ENABLE

Definition at line 1884 of file stm32_hal_legacy.h.

#define __DMA2_FORCE_RESET   __HAL_RCC_DMA2_FORCE_RESET

Definition at line 1885 of file stm32_hal_legacy.h.

#define __DMA2_IS_CLK_DISABLED   __HAL_RCC_DMA2_IS_CLK_DISABLED

Definition at line 2490 of file stm32_hal_legacy.h.

#define __DMA2_IS_CLK_ENABLED   __HAL_RCC_DMA2_IS_CLK_ENABLED

Definition at line 2489 of file stm32_hal_legacy.h.

#define __DMA2_RELEASE_RESET   __HAL_RCC_DMA2_RELEASE_RESET

Definition at line 1886 of file stm32_hal_legacy.h.

#define __DMA2D_CLK_DISABLE   __HAL_RCC_DMA2D_CLK_DISABLE

Definition at line 2417 of file stm32_hal_legacy.h.

#define __DMA2D_CLK_ENABLE   __HAL_RCC_DMA2D_CLK_ENABLE

Definition at line 2416 of file stm32_hal_legacy.h.

#define __DMA2D_CLK_SLEEP_DISABLE   __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE

Definition at line 2421 of file stm32_hal_legacy.h.

#define __DMA2D_CLK_SLEEP_ENABLE   __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE

Definition at line 2420 of file stm32_hal_legacy.h.

#define __DMA2D_FORCE_RESET   __HAL_RCC_DMA2D_FORCE_RESET

Definition at line 2418 of file stm32_hal_legacy.h.

#define __DMA2D_RELEASE_RESET   __HAL_RCC_DMA2D_RELEASE_RESET

Definition at line 2419 of file stm32_hal_legacy.h.

#define __ETH_CLK_DISABLE   __HAL_RCC_ETH_CLK_DISABLE

Definition at line 2363 of file stm32_hal_legacy.h.

#define __ETH_CLK_ENABLE   __HAL_RCC_ETH_CLK_ENABLE

Definition at line 2362 of file stm32_hal_legacy.h.

#define __ETHMAC_CLK_DISABLE   __HAL_RCC_ETHMAC_CLK_DISABLE

Definition at line 1887 of file stm32_hal_legacy.h.

#define __ETHMAC_CLK_ENABLE   __HAL_RCC_ETHMAC_CLK_ENABLE

Definition at line 1888 of file stm32_hal_legacy.h.

#define __ETHMAC_CLK_SLEEP_DISABLE   __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE

Definition at line 2316 of file stm32_hal_legacy.h.

#define __ETHMAC_CLK_SLEEP_ENABLE   __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE

Definition at line 2315 of file stm32_hal_legacy.h.

#define __ETHMAC_FORCE_RESET   __HAL_RCC_ETHMAC_FORCE_RESET

Definition at line 1889 of file stm32_hal_legacy.h.

#define __ETHMAC_RELEASE_RESET   __HAL_RCC_ETHMAC_RELEASE_RESET

Definition at line 1890 of file stm32_hal_legacy.h.

#define __ETHMACPTP_CLK_DISABLE   __HAL_RCC_ETHMACPTP_CLK_DISABLE

Definition at line 2291 of file stm32_hal_legacy.h.

#define __ETHMACPTP_CLK_ENABLE   __HAL_RCC_ETHMACPTP_CLK_ENABLE

Definition at line 2290 of file stm32_hal_legacy.h.

#define __ETHMACPTP_CLK_SLEEP_DISABLE   __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE

Definition at line 2289 of file stm32_hal_legacy.h.

#define __ETHMACPTP_CLK_SLEEP_ENABLE   __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE

Definition at line 2288 of file stm32_hal_legacy.h.

#define __ETHMACRX_CLK_DISABLE   __HAL_RCC_ETHMACRX_CLK_DISABLE

Definition at line 1891 of file stm32_hal_legacy.h.

#define __ETHMACRX_CLK_ENABLE   __HAL_RCC_ETHMACRX_CLK_ENABLE

Definition at line 1892 of file stm32_hal_legacy.h.

#define __ETHMACRX_CLK_SLEEP_DISABLE   __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE

Definition at line 2320 of file stm32_hal_legacy.h.

#define __ETHMACRX_CLK_SLEEP_ENABLE   __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE

Definition at line 2319 of file stm32_hal_legacy.h.

#define __ETHMACTX_CLK_DISABLE   __HAL_RCC_ETHMACTX_CLK_DISABLE

Definition at line 1893 of file stm32_hal_legacy.h.

#define __ETHMACTX_CLK_ENABLE   __HAL_RCC_ETHMACTX_CLK_ENABLE

Definition at line 1894 of file stm32_hal_legacy.h.

#define __ETHMACTX_CLK_SLEEP_DISABLE   __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE

Definition at line 2318 of file stm32_hal_legacy.h.

#define __ETHMACTX_CLK_SLEEP_ENABLE   __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE

Definition at line 2317 of file stm32_hal_legacy.h.

#define __FIREWALL_CLK_DISABLE   __HAL_RCC_FIREWALL_CLK_DISABLE

Definition at line 1895 of file stm32_hal_legacy.h.

#define __FIREWALL_CLK_ENABLE   __HAL_RCC_FIREWALL_CLK_ENABLE

Definition at line 1896 of file stm32_hal_legacy.h.

#define __FLASH_CLK_DISABLE   __HAL_RCC_FLASH_CLK_DISABLE

Definition at line 1897 of file stm32_hal_legacy.h.

#define __FLASH_CLK_ENABLE   __HAL_RCC_FLASH_CLK_ENABLE

Definition at line 1898 of file stm32_hal_legacy.h.

#define __FLASH_CLK_SLEEP_DISABLE   __HAL_RCC_FLASH_CLK_SLEEP_DISABLE

Definition at line 1899 of file stm32_hal_legacy.h.

#define __FLASH_CLK_SLEEP_ENABLE   __HAL_RCC_FLASH_CLK_SLEEP_ENABLE

Definition at line 1900 of file stm32_hal_legacy.h.

#define __FLASH_FORCE_RESET   __HAL_RCC_FLASH_FORCE_RESET

Definition at line 1901 of file stm32_hal_legacy.h.

#define __FLASH_RELEASE_RESET   __HAL_RCC_FLASH_RELEASE_RESET

Definition at line 1902 of file stm32_hal_legacy.h.

#define __FLITF_CLK_DISABLE   __HAL_RCC_FLITF_CLK_DISABLE

Definition at line 1903 of file stm32_hal_legacy.h.

#define __FLITF_CLK_ENABLE   __HAL_RCC_FLITF_CLK_ENABLE

Definition at line 1904 of file stm32_hal_legacy.h.

#define __FLITF_CLK_SLEEP_DISABLE   __HAL_RCC_FLITF_CLK_SLEEP_DISABLE

Definition at line 1908 of file stm32_hal_legacy.h.

#define __FLITF_CLK_SLEEP_ENABLE   __HAL_RCC_FLITF_CLK_SLEEP_ENABLE

Definition at line 1907 of file stm32_hal_legacy.h.

#define __FLITF_FORCE_RESET   __HAL_RCC_FLITF_FORCE_RESET

Definition at line 1905 of file stm32_hal_legacy.h.

#define __FLITF_IS_CLK_DISABLED   __HAL_RCC_FLITF_IS_CLK_DISABLED

Definition at line 2492 of file stm32_hal_legacy.h.

#define __FLITF_IS_CLK_ENABLED   __HAL_RCC_FLITF_IS_CLK_ENABLED

Definition at line 2491 of file stm32_hal_legacy.h.

#define __FLITF_RELEASE_RESET   __HAL_RCC_FLITF_RELEASE_RESET

Definition at line 1906 of file stm32_hal_legacy.h.

#define __FMC_CLK_DISABLE   __HAL_RCC_FMC_CLK_DISABLE

Definition at line 1909 of file stm32_hal_legacy.h.

#define __FMC_CLK_ENABLE   __HAL_RCC_FMC_CLK_ENABLE

Definition at line 1910 of file stm32_hal_legacy.h.

#define __FMC_CLK_SLEEP_DISABLE   __HAL_RCC_FMC_CLK_SLEEP_DISABLE

Definition at line 1911 of file stm32_hal_legacy.h.

#define __FMC_CLK_SLEEP_ENABLE   __HAL_RCC_FMC_CLK_SLEEP_ENABLE

Definition at line 1912 of file stm32_hal_legacy.h.

#define __FMC_FORCE_RESET   __HAL_RCC_FMC_FORCE_RESET

Definition at line 1913 of file stm32_hal_legacy.h.

#define __FMC_IS_CLK_DISABLED   __HAL_RCC_FMC_IS_CLK_DISABLED

Definition at line 2494 of file stm32_hal_legacy.h.

#define __FMC_IS_CLK_ENABLED   __HAL_RCC_FMC_IS_CLK_ENABLED

Definition at line 2493 of file stm32_hal_legacy.h.

#define __FMC_RELEASE_RESET   __HAL_RCC_FMC_RELEASE_RESET

Definition at line 1914 of file stm32_hal_legacy.h.

#define __FSMC_CLK_DISABLE   __HAL_RCC_FSMC_CLK_DISABLE

Definition at line 1915 of file stm32_hal_legacy.h.

#define __FSMC_CLK_ENABLE   __HAL_RCC_FSMC_CLK_ENABLE

Definition at line 1916 of file stm32_hal_legacy.h.

#define __FSMC_CLK_SLEEP_DISABLE   __HAL_RCC_FSMC_CLK_SLEEP_DISABLE

Definition at line 2411 of file stm32_hal_legacy.h.

#define __FSMC_CLK_SLEEP_ENABLE   __HAL_RCC_FSMC_CLK_SLEEP_ENABLE

Definition at line 2410 of file stm32_hal_legacy.h.

#define __FSMC_FORCE_RESET   __HAL_RCC_FSMC_FORCE_RESET

Definition at line 2408 of file stm32_hal_legacy.h.

#define __FSMC_RELEASE_RESET   __HAL_RCC_FSMC_RELEASE_RESET

Definition at line 2409 of file stm32_hal_legacy.h.

#define __GPIOA_CLK_DISABLE   __HAL_RCC_GPIOA_CLK_DISABLE

Definition at line 1917 of file stm32_hal_legacy.h.

#define __GPIOA_CLK_ENABLE   __HAL_RCC_GPIOA_CLK_ENABLE

Definition at line 1918 of file stm32_hal_legacy.h.

#define __GPIOA_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE

Definition at line 1919 of file stm32_hal_legacy.h.

#define __GPIOA_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE

Definition at line 1920 of file stm32_hal_legacy.h.

#define __GPIOA_FORCE_RESET   __HAL_RCC_GPIOA_FORCE_RESET

Definition at line 1921 of file stm32_hal_legacy.h.

#define __GPIOA_IS_CLK_DISABLED   __HAL_RCC_GPIOA_IS_CLK_DISABLED

Definition at line 2496 of file stm32_hal_legacy.h.

#define __GPIOA_IS_CLK_ENABLED   __HAL_RCC_GPIOA_IS_CLK_ENABLED

Definition at line 2495 of file stm32_hal_legacy.h.

#define __GPIOA_RELEASE_RESET   __HAL_RCC_GPIOA_RELEASE_RESET

Definition at line 1922 of file stm32_hal_legacy.h.

#define __GPIOB_CLK_DISABLE   __HAL_RCC_GPIOB_CLK_DISABLE

Definition at line 1923 of file stm32_hal_legacy.h.

#define __GPIOB_CLK_ENABLE   __HAL_RCC_GPIOB_CLK_ENABLE

Definition at line 1924 of file stm32_hal_legacy.h.

#define __GPIOB_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE

Definition at line 1925 of file stm32_hal_legacy.h.

#define __GPIOB_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE

Definition at line 1926 of file stm32_hal_legacy.h.

#define __GPIOB_FORCE_RESET   __HAL_RCC_GPIOB_FORCE_RESET

Definition at line 1927 of file stm32_hal_legacy.h.

#define __GPIOB_IS_CLK_DISABLED   __HAL_RCC_GPIOB_IS_CLK_DISABLED

Definition at line 2498 of file stm32_hal_legacy.h.

#define __GPIOB_IS_CLK_ENABLED   __HAL_RCC_GPIOB_IS_CLK_ENABLED

Definition at line 2497 of file stm32_hal_legacy.h.

#define __GPIOB_RELEASE_RESET   __HAL_RCC_GPIOB_RELEASE_RESET

Definition at line 1928 of file stm32_hal_legacy.h.

#define __GPIOC_CLK_DISABLE   __HAL_RCC_GPIOC_CLK_DISABLE

Definition at line 1929 of file stm32_hal_legacy.h.

#define __GPIOC_CLK_ENABLE   __HAL_RCC_GPIOC_CLK_ENABLE

Definition at line 1930 of file stm32_hal_legacy.h.

#define __GPIOC_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE

Definition at line 1931 of file stm32_hal_legacy.h.

#define __GPIOC_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE

Definition at line 1932 of file stm32_hal_legacy.h.

#define __GPIOC_FORCE_RESET   __HAL_RCC_GPIOC_FORCE_RESET

Definition at line 1933 of file stm32_hal_legacy.h.

#define __GPIOC_IS_CLK_DISABLED   __HAL_RCC_GPIOC_IS_CLK_DISABLED

Definition at line 2500 of file stm32_hal_legacy.h.

#define __GPIOC_IS_CLK_ENABLED   __HAL_RCC_GPIOC_IS_CLK_ENABLED

Definition at line 2499 of file stm32_hal_legacy.h.

#define __GPIOC_RELEASE_RESET   __HAL_RCC_GPIOC_RELEASE_RESET

Definition at line 1934 of file stm32_hal_legacy.h.

#define __GPIOD_CLK_DISABLE   __HAL_RCC_GPIOD_CLK_DISABLE

Definition at line 1935 of file stm32_hal_legacy.h.

#define __GPIOD_CLK_ENABLE   __HAL_RCC_GPIOD_CLK_ENABLE

Definition at line 1936 of file stm32_hal_legacy.h.

#define __GPIOD_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE

Definition at line 1937 of file stm32_hal_legacy.h.

#define __GPIOD_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE

Definition at line 1938 of file stm32_hal_legacy.h.

#define __GPIOD_FORCE_RESET   __HAL_RCC_GPIOD_FORCE_RESET

Definition at line 1939 of file stm32_hal_legacy.h.

#define __GPIOD_IS_CLK_DISABLED   __HAL_RCC_GPIOD_IS_CLK_DISABLED

Definition at line 2502 of file stm32_hal_legacy.h.

#define __GPIOD_IS_CLK_ENABLED   __HAL_RCC_GPIOD_IS_CLK_ENABLED

Definition at line 2501 of file stm32_hal_legacy.h.

#define __GPIOD_RELEASE_RESET   __HAL_RCC_GPIOD_RELEASE_RESET

Definition at line 1940 of file stm32_hal_legacy.h.

#define __GPIOE_CLK_DISABLE   __HAL_RCC_GPIOE_CLK_DISABLE

Definition at line 1941 of file stm32_hal_legacy.h.

#define __GPIOE_CLK_ENABLE   __HAL_RCC_GPIOE_CLK_ENABLE

Definition at line 1942 of file stm32_hal_legacy.h.

#define __GPIOE_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE

Definition at line 1943 of file stm32_hal_legacy.h.

#define __GPIOE_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE

Definition at line 1944 of file stm32_hal_legacy.h.

#define __GPIOE_FORCE_RESET   __HAL_RCC_GPIOE_FORCE_RESET

Definition at line 1945 of file stm32_hal_legacy.h.

#define __GPIOE_IS_CLK_DISABLED   __HAL_RCC_GPIOE_IS_CLK_DISABLED

Definition at line 2504 of file stm32_hal_legacy.h.

#define __GPIOE_IS_CLK_ENABLED   __HAL_RCC_GPIOE_IS_CLK_ENABLED

Definition at line 2503 of file stm32_hal_legacy.h.

#define __GPIOE_RELEASE_RESET   __HAL_RCC_GPIOE_RELEASE_RESET

Definition at line 1946 of file stm32_hal_legacy.h.

#define __GPIOF_CLK_DISABLE   __HAL_RCC_GPIOF_CLK_DISABLE

Definition at line 1947 of file stm32_hal_legacy.h.

#define __GPIOF_CLK_ENABLE   __HAL_RCC_GPIOF_CLK_ENABLE

Definition at line 1948 of file stm32_hal_legacy.h.

#define __GPIOF_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE

Definition at line 1949 of file stm32_hal_legacy.h.

#define __GPIOF_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE

Definition at line 1950 of file stm32_hal_legacy.h.

#define __GPIOF_FORCE_RESET   __HAL_RCC_GPIOF_FORCE_RESET

Definition at line 1951 of file stm32_hal_legacy.h.

#define __GPIOF_IS_CLK_DISABLED   __HAL_RCC_GPIOF_IS_CLK_DISABLED

Definition at line 2506 of file stm32_hal_legacy.h.

#define __GPIOF_IS_CLK_ENABLED   __HAL_RCC_GPIOF_IS_CLK_ENABLED

Definition at line 2505 of file stm32_hal_legacy.h.

#define __GPIOF_RELEASE_RESET   __HAL_RCC_GPIOF_RELEASE_RESET

Definition at line 1952 of file stm32_hal_legacy.h.

#define __GPIOG_CLK_DISABLE   __HAL_RCC_GPIOG_CLK_DISABLE

Definition at line 1953 of file stm32_hal_legacy.h.

#define __GPIOG_CLK_ENABLE   __HAL_RCC_GPIOG_CLK_ENABLE

Definition at line 1954 of file stm32_hal_legacy.h.

#define __GPIOG_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE

Definition at line 1955 of file stm32_hal_legacy.h.

#define __GPIOG_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE

Definition at line 1956 of file stm32_hal_legacy.h.

#define __GPIOG_FORCE_RESET   __HAL_RCC_GPIOG_FORCE_RESET

Definition at line 1957 of file stm32_hal_legacy.h.

#define __GPIOG_IS_CLK_DISABLED   __HAL_RCC_GPIOG_IS_CLK_DISABLED

Definition at line 2508 of file stm32_hal_legacy.h.

#define __GPIOG_IS_CLK_ENABLED   __HAL_RCC_GPIOG_IS_CLK_ENABLED

Definition at line 2507 of file stm32_hal_legacy.h.

#define __GPIOG_RELEASE_RESET   __HAL_RCC_GPIOG_RELEASE_RESET

Definition at line 1958 of file stm32_hal_legacy.h.

#define __GPIOH_CLK_DISABLE   __HAL_RCC_GPIOH_CLK_DISABLE

Definition at line 1959 of file stm32_hal_legacy.h.

#define __GPIOH_CLK_ENABLE   __HAL_RCC_GPIOH_CLK_ENABLE

Definition at line 1960 of file stm32_hal_legacy.h.

#define __GPIOH_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE

Definition at line 1961 of file stm32_hal_legacy.h.

#define __GPIOH_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE

Definition at line 1962 of file stm32_hal_legacy.h.

#define __GPIOH_FORCE_RESET   __HAL_RCC_GPIOH_FORCE_RESET

Definition at line 1963 of file stm32_hal_legacy.h.

#define __GPIOH_IS_CLK_DISABLED   __HAL_RCC_GPIOH_IS_CLK_DISABLED

Definition at line 2510 of file stm32_hal_legacy.h.

#define __GPIOH_IS_CLK_ENABLED   __HAL_RCC_GPIOH_IS_CLK_ENABLED

Definition at line 2509 of file stm32_hal_legacy.h.

#define __GPIOH_RELEASE_RESET   __HAL_RCC_GPIOH_RELEASE_RESET

Definition at line 1964 of file stm32_hal_legacy.h.

#define __GPIOI_CLK_DISABLE   __HAL_RCC_GPIOI_CLK_DISABLE

Definition at line 2346 of file stm32_hal_legacy.h.

#define __GPIOI_CLK_ENABLE   __HAL_RCC_GPIOI_CLK_ENABLE

Definition at line 2345 of file stm32_hal_legacy.h.

#define __GPIOI_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE

Definition at line 2350 of file stm32_hal_legacy.h.

#define __GPIOI_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE

Definition at line 2349 of file stm32_hal_legacy.h.

#define __GPIOI_FORCE_RESET   __HAL_RCC_GPIOI_FORCE_RESET

Definition at line 2347 of file stm32_hal_legacy.h.

#define __GPIOI_RELEASE_RESET   __HAL_RCC_GPIOI_RELEASE_RESET

Definition at line 2348 of file stm32_hal_legacy.h.

#define __GPIOJ_CLK_DISABLE   __HAL_RCC_GPIOJ_CLK_DISABLE

Definition at line 2352 of file stm32_hal_legacy.h.

#define __GPIOJ_CLK_ENABLE   __HAL_RCC_GPIOJ_CLK_ENABLE

Definition at line 2351 of file stm32_hal_legacy.h.

#define __GPIOJ_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE

Definition at line 2356 of file stm32_hal_legacy.h.

#define __GPIOJ_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE

Definition at line 2355 of file stm32_hal_legacy.h.

#define __GPIOJ_FORCE_RESET   __HAL_RCC_GPIOJ_FORCE_RESET

Definition at line 2353 of file stm32_hal_legacy.h.

#define __GPIOJ_RELEASE_RESET   __HAL_RCC_GPIOJ_RELEASE_RESET

Definition at line 2354 of file stm32_hal_legacy.h.

#define __GPIOK_CLK_DISABLE   __HAL_RCC_GPIOK_CLK_DISABLE

Definition at line 2358 of file stm32_hal_legacy.h.

#define __GPIOK_CLK_ENABLE   __HAL_RCC_GPIOK_CLK_ENABLE

Definition at line 2357 of file stm32_hal_legacy.h.

#define __GPIOK_CLK_SLEEP_DISABLE   __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE

Definition at line 2361 of file stm32_hal_legacy.h.

#define __GPIOK_CLK_SLEEP_ENABLE   __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE

Definition at line 2360 of file stm32_hal_legacy.h.

#define __GPIOK_RELEASE_RESET   __HAL_RCC_GPIOK_RELEASE_RESET

Definition at line 2359 of file stm32_hal_legacy.h.

#define __HAL_RCC_CRS_CALCULATE_RELOADVALUE   __HAL_RCC_CRS_RELOADVALUE_CALCULATE

Definition at line 2734 of file stm32_hal_legacy.h.

#define __HAL_RCC_CRS_DISABLE_AUTOMATIC_CALIB   __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE

Definition at line 2733 of file stm32_hal_legacy.h.

#define __HAL_RCC_CRS_DISABLE_FREQ_ERROR_COUNTER   __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE

Definition at line 2731 of file stm32_hal_legacy.h.

#define __HAL_RCC_CRS_ENABLE_AUTOMATIC_CALIB   __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE

Definition at line 2732 of file stm32_hal_legacy.h.

#define __HAL_RCC_CRS_ENABLE_FREQ_ERROR_COUNTER   __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE

Definition at line 2730 of file stm32_hal_legacy.h.

#define __HAL_RCC_DFSDM_CLK_DISABLE   __HAL_RCC_DFSDM1_CLK_DISABLE

Definition at line 2749 of file stm32_hal_legacy.h.

#define __HAL_RCC_DFSDM_CLK_ENABLE   __HAL_RCC_DFSDM1_CLK_ENABLE

Definition at line 2748 of file stm32_hal_legacy.h.

#define __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE   __HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE

Definition at line 2755 of file stm32_hal_legacy.h.

#define __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE   __HAL_RCC_DFSDM1_CLK_SLEEP_ENABLE

Definition at line 2754 of file stm32_hal_legacy.h.

#define __HAL_RCC_DFSDM_CONFIG   __HAL_RCC_DFSDM1_CONFIG

Definition at line 2762 of file stm32_hal_legacy.h.

#define __HAL_RCC_DFSDM_FORCE_RESET   __HAL_RCC_DFSDM1_FORCE_RESET

Definition at line 2752 of file stm32_hal_legacy.h.

#define __HAL_RCC_DFSDM_IS_CLK_DISABLED   __HAL_RCC_DFSDM1_IS_CLK_DISABLED

Definition at line 2751 of file stm32_hal_legacy.h.

#define __HAL_RCC_DFSDM_IS_CLK_ENABLED   __HAL_RCC_DFSDM1_IS_CLK_ENABLED

Definition at line 2750 of file stm32_hal_legacy.h.

#define __HAL_RCC_DFSDM_IS_CLK_SLEEP_DISABLED   __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED

Definition at line 2757 of file stm32_hal_legacy.h.

#define __HAL_RCC_DFSDM_IS_CLK_SLEEP_ENABLED   __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED

Definition at line 2756 of file stm32_hal_legacy.h.

#define __HAL_RCC_DFSDM_RELEASE_RESET   __HAL_RCC_DFSDM1_RELEASE_RESET

Definition at line 2753 of file stm32_hal_legacy.h.

#define __HAL_RCC_GET_DFSDM_SOURCE   __HAL_RCC_GET_DFSDM1_SOURCE

Definition at line 2763 of file stm32_hal_legacy.h.

#define __HAL_RCC_GET_IT_SOURCE   __HAL_RCC_GET_IT

Definition at line 2736 of file stm32_hal_legacy.h.

#define __HAL_RCC_I2SCLK   __HAL_RCC_I2S_CONFIG

Definition at line 2627 of file stm32_hal_legacy.h.

#define __HAL_RCC_I2SCLK_CONFIG   __HAL_RCC_I2S_CONFIG

Definition at line 2628 of file stm32_hal_legacy.h.

#define __HAL_RCC_MCO_CONFIG   __HAL_RCC_MCO1_CONFIG

Definition at line 2646 of file stm32_hal_legacy.h.

#define __HAL_RCC_OTGFS_FORCE_RESET   __HAL_RCC_USB_OTG_FS_FORCE_RESET

Definition at line 2424 of file stm32_hal_legacy.h.

#define __HAL_RCC_OTGFS_RELEASE_RESET   __HAL_RCC_USB_OTG_FS_RELEASE_RESET

Definition at line 2425 of file stm32_hal_legacy.h.

#define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE   __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE

Definition at line 2389 of file stm32_hal_legacy.h.

#define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE   __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE

Definition at line 2388 of file stm32_hal_legacy.h.

#define __HAL_RCC_OTGHS_FORCE_RESET   __HAL_RCC_USB_OTG_HS_FORCE_RESET

Definition at line 2392 of file stm32_hal_legacy.h.

#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED   __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED

Definition at line 2391 of file stm32_hal_legacy.h.

#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED   __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED

Definition at line 2390 of file stm32_hal_legacy.h.

#define __HAL_RCC_OTGHS_RELEASE_RESET   __HAL_RCC_USB_OTG_HS_RELEASE_RESET

Definition at line 2393 of file stm32_hal_legacy.h.

#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE   __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE

Definition at line 2395 of file stm32_hal_legacy.h.

#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE   __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE

Definition at line 2394 of file stm32_hal_legacy.h.

#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED   __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED

Definition at line 2397 of file stm32_hal_legacy.h.

#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED   __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED

Definition at line 2396 of file stm32_hal_legacy.h.

#define __HASH_CLK_DISABLE   __HAL_RCC_HASH_CLK_DISABLE

Definition at line 2297 of file stm32_hal_legacy.h.

#define __HASH_CLK_ENABLE   __HAL_RCC_HASH_CLK_ENABLE

Definition at line 2292 of file stm32_hal_legacy.h.

#define __HASH_CLK_SLEEP_DISABLE   __HAL_RCC_HASH_CLK_SLEEP_DISABLE

Definition at line 2296 of file stm32_hal_legacy.h.

#define __HASH_CLK_SLEEP_ENABLE   __HAL_RCC_HASH_CLK_SLEEP_ENABLE

Definition at line 2295 of file stm32_hal_legacy.h.

#define __HASH_FORCE_RESET   __HAL_RCC_HASH_FORCE_RESET

Definition at line 2293 of file stm32_hal_legacy.h.

#define __HASH_RELEASE_RESET   __HAL_RCC_HASH_RELEASE_RESET

Definition at line 2294 of file stm32_hal_legacy.h.

#define __HRTIM1_CLK_DISABLE   __HAL_RCC_HRTIM1_CLK_DISABLE

Definition at line 2442 of file stm32_hal_legacy.h.

#define __HRTIM1_CLK_ENABLE   __HAL_RCC_HRTIM1_CLK_ENABLE

Definition at line 2441 of file stm32_hal_legacy.h.

#define __HRTIM1_FORCE_RESET   __HAL_RCC_HRTIM1_FORCE_RESET

Definition at line 2464 of file stm32_hal_legacy.h.

#define __HRTIM1_IS_CLK_DISABLED   __HAL_RCC_HRTIM1_IS_CLK_DISABLED

Definition at line 2512 of file stm32_hal_legacy.h.

#define __HRTIM1_IS_CLK_ENABLED   __HAL_RCC_HRTIM1_IS_CLK_ENABLED

Definition at line 2511 of file stm32_hal_legacy.h.

#define __HRTIM1_RELEASE_RESET   __HAL_RCC_HRTIM1_RELEASE_RESET

Definition at line 2465 of file stm32_hal_legacy.h.

#define __I2C1_CLK_DISABLE   __HAL_RCC_I2C1_CLK_DISABLE

Definition at line 1965 of file stm32_hal_legacy.h.

#define __I2C1_CLK_ENABLE   __HAL_RCC_I2C1_CLK_ENABLE

Definition at line 1966 of file stm32_hal_legacy.h.

#define __I2C1_CLK_SLEEP_DISABLE   __HAL_RCC_I2C1_CLK_SLEEP_DISABLE

Definition at line 1967 of file stm32_hal_legacy.h.

#define __I2C1_CLK_SLEEP_ENABLE   __HAL_RCC_I2C1_CLK_SLEEP_ENABLE

Definition at line 1968 of file stm32_hal_legacy.h.

#define __I2C1_FORCE_RESET   __HAL_RCC_I2C1_FORCE_RESET

Definition at line 1969 of file stm32_hal_legacy.h.

#define __I2C1_IS_CLK_DISABLED   __HAL_RCC_I2C1_IS_CLK_DISABLED

Definition at line 2514 of file stm32_hal_legacy.h.

#define __I2C1_IS_CLK_ENABLED   __HAL_RCC_I2C1_IS_CLK_ENABLED

Definition at line 2513 of file stm32_hal_legacy.h.

#define __I2C1_RELEASE_RESET   __HAL_RCC_I2C1_RELEASE_RESET

Definition at line 1970 of file stm32_hal_legacy.h.

#define __I2C2_CLK_DISABLE   __HAL_RCC_I2C2_CLK_DISABLE

Definition at line 1971 of file stm32_hal_legacy.h.

#define __I2C2_CLK_ENABLE   __HAL_RCC_I2C2_CLK_ENABLE

Definition at line 1972 of file stm32_hal_legacy.h.

#define __I2C2_CLK_SLEEP_DISABLE   __HAL_RCC_I2C2_CLK_SLEEP_DISABLE

Definition at line 1973 of file stm32_hal_legacy.h.

#define __I2C2_CLK_SLEEP_ENABLE   __HAL_RCC_I2C2_CLK_SLEEP_ENABLE

Definition at line 1974 of file stm32_hal_legacy.h.

#define __I2C2_FORCE_RESET   __HAL_RCC_I2C2_FORCE_RESET

Definition at line 1975 of file stm32_hal_legacy.h.

#define __I2C2_IS_CLK_DISABLED   __HAL_RCC_I2C2_IS_CLK_DISABLED

Definition at line 2516 of file stm32_hal_legacy.h.

#define __I2C2_IS_CLK_ENABLED   __HAL_RCC_I2C2_IS_CLK_ENABLED

Definition at line 2515 of file stm32_hal_legacy.h.

#define __I2C2_RELEASE_RESET   __HAL_RCC_I2C2_RELEASE_RESET

Definition at line 1976 of file stm32_hal_legacy.h.

#define __I2C3_CLK_DISABLE   __HAL_RCC_I2C3_CLK_DISABLE

Definition at line 1977 of file stm32_hal_legacy.h.

#define __I2C3_CLK_ENABLE   __HAL_RCC_I2C3_CLK_ENABLE

Definition at line 1978 of file stm32_hal_legacy.h.

#define __I2C3_CLK_SLEEP_DISABLE   __HAL_RCC_I2C3_CLK_SLEEP_DISABLE

Definition at line 1979 of file stm32_hal_legacy.h.

#define __I2C3_CLK_SLEEP_ENABLE   __HAL_RCC_I2C3_CLK_SLEEP_ENABLE

Definition at line 1980 of file stm32_hal_legacy.h.

#define __I2C3_FORCE_RESET   __HAL_RCC_I2C3_FORCE_RESET

Definition at line 1981 of file stm32_hal_legacy.h.

#define __I2C3_IS_CLK_DISABLED   __HAL_RCC_I2C3_IS_CLK_DISABLED

Definition at line 2518 of file stm32_hal_legacy.h.

#define __I2C3_IS_CLK_ENABLED   __HAL_RCC_I2C3_IS_CLK_ENABLED

Definition at line 2517 of file stm32_hal_legacy.h.

#define __I2C3_RELEASE_RESET   __HAL_RCC_I2C3_RELEASE_RESET

Definition at line 1982 of file stm32_hal_legacy.h.

#define __LCD_CLK_DISABLE   __HAL_RCC_LCD_CLK_DISABLE

Definition at line 1983 of file stm32_hal_legacy.h.

#define __LCD_CLK_ENABLE   __HAL_RCC_LCD_CLK_ENABLE

Definition at line 1984 of file stm32_hal_legacy.h.

#define __LCD_CLK_SLEEP_DISABLE   __HAL_RCC_LCD_CLK_SLEEP_DISABLE

Definition at line 1985 of file stm32_hal_legacy.h.

#define __LCD_CLK_SLEEP_ENABLE   __HAL_RCC_LCD_CLK_SLEEP_ENABLE

Definition at line 1986 of file stm32_hal_legacy.h.

#define __LCD_FORCE_RESET   __HAL_RCC_LCD_FORCE_RESET

Definition at line 1987 of file stm32_hal_legacy.h.

#define __LCD_RELEASE_RESET   __HAL_RCC_LCD_RELEASE_RESET

Definition at line 1988 of file stm32_hal_legacy.h.

#define __LPTIM1_CLK_DISABLE   __HAL_RCC_LPTIM1_CLK_DISABLE

Definition at line 1989 of file stm32_hal_legacy.h.

#define __LPTIM1_CLK_ENABLE   __HAL_RCC_LPTIM1_CLK_ENABLE

Definition at line 1990 of file stm32_hal_legacy.h.

#define __LPTIM1_CLK_SLEEP_DISABLE   __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE

Definition at line 1991 of file stm32_hal_legacy.h.

#define __LPTIM1_CLK_SLEEP_ENABLE   __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE

Definition at line 1992 of file stm32_hal_legacy.h.

#define __LPTIM1_FORCE_RESET   __HAL_RCC_LPTIM1_FORCE_RESET

Definition at line 1993 of file stm32_hal_legacy.h.

#define __LPTIM1_RELEASE_RESET   __HAL_RCC_LPTIM1_RELEASE_RESET

Definition at line 1994 of file stm32_hal_legacy.h.

#define __LPTIM2_CLK_DISABLE   __HAL_RCC_LPTIM2_CLK_DISABLE

Definition at line 1995 of file stm32_hal_legacy.h.

#define __LPTIM2_CLK_ENABLE   __HAL_RCC_LPTIM2_CLK_ENABLE

Definition at line 1996 of file stm32_hal_legacy.h.

#define __LPTIM2_CLK_SLEEP_DISABLE   __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE

Definition at line 1997 of file stm32_hal_legacy.h.

#define __LPTIM2_CLK_SLEEP_ENABLE   __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE

Definition at line 1998 of file stm32_hal_legacy.h.

#define __LPTIM2_FORCE_RESET   __HAL_RCC_LPTIM2_FORCE_RESET

Definition at line 1999 of file stm32_hal_legacy.h.

#define __LPTIM2_RELEASE_RESET   __HAL_RCC_LPTIM2_RELEASE_RESET

Definition at line 2000 of file stm32_hal_legacy.h.

#define __LPUART1_CLK_DISABLE   __HAL_RCC_LPUART1_CLK_DISABLE

Definition at line 2001 of file stm32_hal_legacy.h.

#define __LPUART1_CLK_ENABLE   __HAL_RCC_LPUART1_CLK_ENABLE

Definition at line 2002 of file stm32_hal_legacy.h.

#define __LPUART1_CLK_SLEEP_DISABLE   __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE

Definition at line 2003 of file stm32_hal_legacy.h.

#define __LPUART1_CLK_SLEEP_ENABLE   __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE

Definition at line 2004 of file stm32_hal_legacy.h.

#define __LPUART1_FORCE_RESET   __HAL_RCC_LPUART1_FORCE_RESET

Definition at line 2005 of file stm32_hal_legacy.h.

#define __LPUART1_RELEASE_RESET   __HAL_RCC_LPUART1_RELEASE_RESET

Definition at line 2006 of file stm32_hal_legacy.h.

#define __LTDC_CLK_DISABLE   __HAL_RCC_LTDC_CLK_DISABLE

Definition at line 2311 of file stm32_hal_legacy.h.

#define __LTDC_CLK_ENABLE   __HAL_RCC_LTDC_CLK_ENABLE

Definition at line 2310 of file stm32_hal_legacy.h.

#define __LTDC_CLK_SLEEP_ENABLE   __HAL_RCC_LTDC_CLK_SLEEP_ENABLE

Definition at line 2314 of file stm32_hal_legacy.h.

#define __LTDC_FORCE_RESET   __HAL_RCC_LTDC_FORCE_RESET

Definition at line 2312 of file stm32_hal_legacy.h.

#define __LTDC_RELEASE_RESET   __HAL_RCC_LTDC_RELEASE_RESET

Definition at line 2313 of file stm32_hal_legacy.h.

#define __OPAMP_CLK_DISABLE   __HAL_RCC_OPAMP_CLK_DISABLE

Definition at line 2007 of file stm32_hal_legacy.h.

#define __OPAMP_CLK_ENABLE   __HAL_RCC_OPAMP_CLK_ENABLE

Definition at line 2008 of file stm32_hal_legacy.h.

#define __OPAMP_CLK_SLEEP_DISABLE   __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE

Definition at line 2009 of file stm32_hal_legacy.h.

#define __OPAMP_CLK_SLEEP_ENABLE   __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE

Definition at line 2010 of file stm32_hal_legacy.h.

#define __OPAMP_FORCE_RESET   __HAL_RCC_OPAMP_FORCE_RESET

Definition at line 2011 of file stm32_hal_legacy.h.

#define __OPAMP_RELEASE_RESET   __HAL_RCC_OPAMP_RELEASE_RESET

Definition at line 2012 of file stm32_hal_legacy.h.

#define __OTGFS_CLK_DISABLE   __HAL_RCC_OTGFS_CLK_DISABLE

Definition at line 2013 of file stm32_hal_legacy.h.

#define __OTGFS_CLK_ENABLE   __HAL_RCC_OTGFS_CLK_ENABLE

Definition at line 2014 of file stm32_hal_legacy.h.

#define __OTGFS_CLK_SLEEP_DISABLE   __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE

Definition at line 2015 of file stm32_hal_legacy.h.

#define __OTGFS_CLK_SLEEP_ENABLE   __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE

Definition at line 2016 of file stm32_hal_legacy.h.

#define __OTGFS_FORCE_RESET   __HAL_RCC_OTGFS_FORCE_RESET

Definition at line 2017 of file stm32_hal_legacy.h.

#define __OTGFS_RELEASE_RESET   __HAL_RCC_OTGFS_RELEASE_RESET

Definition at line 2018 of file stm32_hal_legacy.h.

#define __OTGHS_CLK_SLEEP_DISABLE   __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE

Definition at line 2383 of file stm32_hal_legacy.h.

#define __OTGHS_CLK_SLEEP_ENABLE   __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE

Definition at line 2382 of file stm32_hal_legacy.h.

#define __OTGHS_FORCE_RESET   __HAL_RCC_USB_OTG_HS_FORCE_RESET

Definition at line 2384 of file stm32_hal_legacy.h.

#define __OTGHS_RELEASE_RESET   __HAL_RCC_USB_OTG_HS_RELEASE_RESET

Definition at line 2385 of file stm32_hal_legacy.h.

#define __OTGHSULPI_CLK_SLEEP_DISABLE   __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE

Definition at line 2387 of file stm32_hal_legacy.h.

#define __OTGHSULPI_CLK_SLEEP_ENABLE   __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE

Definition at line 2386 of file stm32_hal_legacy.h.

#define __PWR_CLK_DISABLE   __HAL_RCC_PWR_CLK_DISABLE

Definition at line 2019 of file stm32_hal_legacy.h.

#define __PWR_CLK_ENABLE   __HAL_RCC_PWR_CLK_ENABLE

Definition at line 2020 of file stm32_hal_legacy.h.

#define __PWR_CLK_SLEEP_DISABLE   __HAL_RCC_PWR_CLK_SLEEP_DISABLE

Definition at line 2021 of file stm32_hal_legacy.h.

#define __PWR_CLK_SLEEP_ENABLE   __HAL_RCC_PWR_CLK_SLEEP_ENABLE

Definition at line 2022 of file stm32_hal_legacy.h.

#define __PWR_FORCE_RESET   __HAL_RCC_PWR_FORCE_RESET

Definition at line 2023 of file stm32_hal_legacy.h.

#define __PWR_IS_CLK_DISABLED   __HAL_RCC_PWR_IS_CLK_DISABLED

Definition at line 2520 of file stm32_hal_legacy.h.

#define __PWR_IS_CLK_ENABLED   __HAL_RCC_PWR_IS_CLK_ENABLED

Definition at line 2519 of file stm32_hal_legacy.h.

#define __PWR_RELEASE_RESET   __HAL_RCC_PWR_RELEASE_RESET

Definition at line 2024 of file stm32_hal_legacy.h.

#define __QSPI_CLK_DISABLE   __HAL_RCC_QSPI_CLK_DISABLE

Definition at line 2025 of file stm32_hal_legacy.h.

#define __QSPI_CLK_ENABLE   __HAL_RCC_QSPI_CLK_ENABLE

Definition at line 2026 of file stm32_hal_legacy.h.

#define __QSPI_CLK_SLEEP_DISABLE   __HAL_RCC_QSPI_CLK_SLEEP_DISABLE

Definition at line 2027 of file stm32_hal_legacy.h.

#define __QSPI_CLK_SLEEP_ENABLE   __HAL_RCC_QSPI_CLK_SLEEP_ENABLE

Definition at line 2028 of file stm32_hal_legacy.h.

#define __QSPI_FORCE_RESET   __HAL_RCC_QSPI_FORCE_RESET

Definition at line 2029 of file stm32_hal_legacy.h.

#define __QSPI_RELEASE_RESET   __HAL_RCC_QSPI_RELEASE_RESET

Definition at line 2030 of file stm32_hal_legacy.h.

#define __RCC_BACKUPRESET_FORCE   __HAL_RCC_BACKUPRESET_FORCE

Definition at line 2271 of file stm32_hal_legacy.h.

#define __RCC_BACKUPRESET_RELEASE   __HAL_RCC_BACKUPRESET_RELEASE

Definition at line 2272 of file stm32_hal_legacy.h.

#define __RCC_PLLSRC   RCC_GET_PLL_OSCSOURCE

Definition at line 2630 of file stm32_hal_legacy.h.

#define __RNG_CLK_DISABLE   __HAL_RCC_RNG_CLK_DISABLE

Definition at line 2031 of file stm32_hal_legacy.h.

#define __RNG_CLK_ENABLE   __HAL_RCC_RNG_CLK_ENABLE

Definition at line 2032 of file stm32_hal_legacy.h.

#define __RNG_CLK_SLEEP_DISABLE   __HAL_RCC_RNG_CLK_SLEEP_DISABLE

Definition at line 2033 of file stm32_hal_legacy.h.

#define __RNG_CLK_SLEEP_ENABLE   __HAL_RCC_RNG_CLK_SLEEP_ENABLE

Definition at line 2034 of file stm32_hal_legacy.h.

#define __RNG_FORCE_RESET   __HAL_RCC_RNG_FORCE_RESET

Definition at line 2035 of file stm32_hal_legacy.h.

#define __RNG_RELEASE_RESET   __HAL_RCC_RNG_RELEASE_RESET

Definition at line 2036 of file stm32_hal_legacy.h.

#define __SAI1_CLK_DISABLE   __HAL_RCC_SAI1_CLK_DISABLE

Definition at line 2037 of file stm32_hal_legacy.h.

#define __SAI1_CLK_ENABLE   __HAL_RCC_SAI1_CLK_ENABLE

Definition at line 2038 of file stm32_hal_legacy.h.

#define __SAI1_CLK_SLEEP_DISABLE   __HAL_RCC_SAI1_CLK_SLEEP_DISABLE

Definition at line 2039 of file stm32_hal_legacy.h.

#define __SAI1_CLK_SLEEP_ENABLE   __HAL_RCC_SAI1_CLK_SLEEP_ENABLE

Definition at line 2040 of file stm32_hal_legacy.h.

#define __SAI1_FORCE_RESET   __HAL_RCC_SAI1_FORCE_RESET

Definition at line 2041 of file stm32_hal_legacy.h.

#define __SAI1_RELEASE_RESET   __HAL_RCC_SAI1_RELEASE_RESET

Definition at line 2042 of file stm32_hal_legacy.h.

#define __SAI2_CLK_DISABLE   __HAL_RCC_SAI2_CLK_DISABLE

Definition at line 2043 of file stm32_hal_legacy.h.

#define __SAI2_CLK_ENABLE   __HAL_RCC_SAI2_CLK_ENABLE

Definition at line 2044 of file stm32_hal_legacy.h.

#define __SAI2_CLK_SLEEP_DISABLE   __HAL_RCC_SAI2_CLK_SLEEP_DISABLE

Definition at line 2045 of file stm32_hal_legacy.h.

#define __SAI2_CLK_SLEEP_ENABLE   __HAL_RCC_SAI2_CLK_SLEEP_ENABLE

Definition at line 2046 of file stm32_hal_legacy.h.

#define __SAI2_FORCE_RESET   __HAL_RCC_SAI2_FORCE_RESET

Definition at line 2047 of file stm32_hal_legacy.h.

#define __SAI2_RELEASE_RESET   __HAL_RCC_SAI2_RELEASE_RESET

Definition at line 2048 of file stm32_hal_legacy.h.

#define __SDADC1_CLK_DISABLE   __HAL_RCC_SDADC1_CLK_DISABLE

Definition at line 2446 of file stm32_hal_legacy.h.

#define __SDADC1_CLK_ENABLE   __HAL_RCC_SDADC1_CLK_ENABLE

Definition at line 2443 of file stm32_hal_legacy.h.

#define __SDADC1_FORCE_RESET   __HAL_RCC_SDADC1_FORCE_RESET

Definition at line 2466 of file stm32_hal_legacy.h.

#define __SDADC1_IS_CLK_DISABLED   __HAL_RCC_SDADC1_IS_CLK_DISABLED

Definition at line 2532 of file stm32_hal_legacy.h.

#define __SDADC1_IS_CLK_ENABLED   __HAL_RCC_SDADC1_IS_CLK_ENABLED

Definition at line 2531 of file stm32_hal_legacy.h.

#define __SDADC1_RELEASE_RESET   __HAL_RCC_SDADC1_RELEASE_RESET

Definition at line 2469 of file stm32_hal_legacy.h.

#define __SDADC2_CLK_DISABLE   __HAL_RCC_SDADC2_CLK_DISABLE

Definition at line 2447 of file stm32_hal_legacy.h.

#define __SDADC2_CLK_ENABLE   __HAL_RCC_SDADC2_CLK_ENABLE

Definition at line 2444 of file stm32_hal_legacy.h.

#define __SDADC2_FORCE_RESET   __HAL_RCC_SDADC2_FORCE_RESET

Definition at line 2467 of file stm32_hal_legacy.h.

#define __SDADC2_IS_CLK_DISABLED   __HAL_RCC_SDADC2_IS_CLK_DISABLED

Definition at line 2534 of file stm32_hal_legacy.h.

#define __SDADC2_IS_CLK_ENABLED   __HAL_RCC_SDADC2_IS_CLK_ENABLED

Definition at line 2533 of file stm32_hal_legacy.h.

#define __SDADC2_RELEASE_RESET   __HAL_RCC_SDADC2_RELEASE_RESET

Definition at line 2470 of file stm32_hal_legacy.h.

#define __SDADC3_CLK_DISABLE   __HAL_RCC_SDADC3_CLK_DISABLE

Definition at line 2448 of file stm32_hal_legacy.h.

#define __SDADC3_CLK_ENABLE   __HAL_RCC_SDADC3_CLK_ENABLE

Definition at line 2445 of file stm32_hal_legacy.h.

#define __SDADC3_FORCE_RESET   __HAL_RCC_SDADC3_FORCE_RESET

Definition at line 2468 of file stm32_hal_legacy.h.

#define __SDADC3_IS_CLK_DISABLED   __HAL_RCC_SDADC3_IS_CLK_DISABLED

Definition at line 2536 of file stm32_hal_legacy.h.

#define __SDADC3_IS_CLK_ENABLED   __HAL_RCC_SDADC3_IS_CLK_ENABLED

Definition at line 2535 of file stm32_hal_legacy.h.

#define __SDADC3_RELEASE_RESET   __HAL_RCC_SDADC3_RELEASE_RESET

Definition at line 2471 of file stm32_hal_legacy.h.

#define __SDIO_CLK_DISABLE   __HAL_RCC_SDIO_CLK_DISABLE

Definition at line 2049 of file stm32_hal_legacy.h.

#define __SDIO_CLK_ENABLE   __HAL_RCC_SDIO_CLK_ENABLE

Definition at line 2050 of file stm32_hal_legacy.h.

#define __SDIO_CLK_SLEEP_DISABLE   __HAL_RCC_SDIO_CLK_SLEEP_DISABLE

Definition at line 2414 of file stm32_hal_legacy.h.

#define __SDIO_CLK_SLEEP_ENABLE   __HAL_RCC_SDIO_CLK_SLEEP_ENABLE

Definition at line 2415 of file stm32_hal_legacy.h.

#define __SDIO_FORCE_RESET   __HAL_RCC_SDIO_FORCE_RESET

Definition at line 2412 of file stm32_hal_legacy.h.

#define __SDIO_RELEASE_RESET   __HAL_RCC_SDIO_RELEASE_RESET

Definition at line 2413 of file stm32_hal_legacy.h.

#define __SDMMC_CLK_DISABLE   __HAL_RCC_SDMMC_CLK_DISABLE

Definition at line 2051 of file stm32_hal_legacy.h.

#define __SDMMC_CLK_ENABLE   __HAL_RCC_SDMMC_CLK_ENABLE

Definition at line 2052 of file stm32_hal_legacy.h.

#define __SDMMC_CLK_SLEEP_DISABLE   __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE

Definition at line 2053 of file stm32_hal_legacy.h.

#define __SDMMC_CLK_SLEEP_ENABLE   __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE

Definition at line 2054 of file stm32_hal_legacy.h.

#define __SDMMC_FORCE_RESET   __HAL_RCC_SDMMC_FORCE_RESET

Definition at line 2055 of file stm32_hal_legacy.h.

#define __SDMMC_RELEASE_RESET   __HAL_RCC_SDMMC_RELEASE_RESET

Definition at line 2056 of file stm32_hal_legacy.h.

#define __SPI1_CLK_DISABLE   __HAL_RCC_SPI1_CLK_DISABLE

Definition at line 2057 of file stm32_hal_legacy.h.

#define __SPI1_CLK_ENABLE   __HAL_RCC_SPI1_CLK_ENABLE

Definition at line 2058 of file stm32_hal_legacy.h.

#define __SPI1_CLK_SLEEP_DISABLE   __HAL_RCC_SPI1_CLK_SLEEP_DISABLE

Definition at line 2059 of file stm32_hal_legacy.h.

#define __SPI1_CLK_SLEEP_ENABLE   __HAL_RCC_SPI1_CLK_SLEEP_ENABLE

Definition at line 2060 of file stm32_hal_legacy.h.

#define __SPI1_FORCE_RESET   __HAL_RCC_SPI1_FORCE_RESET

Definition at line 2061 of file stm32_hal_legacy.h.

#define __SPI1_IS_CLK_DISABLED   __HAL_RCC_SPI1_IS_CLK_DISABLED

Definition at line 2524 of file stm32_hal_legacy.h.

#define __SPI1_IS_CLK_ENABLED   __HAL_RCC_SPI1_IS_CLK_ENABLED

Definition at line 2523 of file stm32_hal_legacy.h.

#define __SPI1_RELEASE_RESET   __HAL_RCC_SPI1_RELEASE_RESET

Definition at line 2062 of file stm32_hal_legacy.h.

#define __SPI2_CLK_DISABLE   __HAL_RCC_SPI2_CLK_DISABLE

Definition at line 2063 of file stm32_hal_legacy.h.

#define __SPI2_CLK_ENABLE   __HAL_RCC_SPI2_CLK_ENABLE

Definition at line 2064 of file stm32_hal_legacy.h.

#define __SPI2_CLK_SLEEP_DISABLE   __HAL_RCC_SPI2_CLK_SLEEP_DISABLE

Definition at line 2065 of file stm32_hal_legacy.h.

#define __SPI2_CLK_SLEEP_ENABLE   __HAL_RCC_SPI2_CLK_SLEEP_ENABLE

Definition at line 2066 of file stm32_hal_legacy.h.

#define __SPI2_FORCE_RESET   __HAL_RCC_SPI2_FORCE_RESET

Definition at line 2067 of file stm32_hal_legacy.h.

#define __SPI2_IS_CLK_DISABLED   __HAL_RCC_SPI2_IS_CLK_DISABLED

Definition at line 2526 of file stm32_hal_legacy.h.

#define __SPI2_IS_CLK_ENABLED   __HAL_RCC_SPI2_IS_CLK_ENABLED

Definition at line 2525 of file stm32_hal_legacy.h.

#define __SPI2_RELEASE_RESET   __HAL_RCC_SPI2_RELEASE_RESET

Definition at line 2068 of file stm32_hal_legacy.h.

#define __SPI3_CLK_DISABLE   __HAL_RCC_SPI3_CLK_DISABLE

Definition at line 2069 of file stm32_hal_legacy.h.

#define __SPI3_CLK_ENABLE   __HAL_RCC_SPI3_CLK_ENABLE

Definition at line 2070 of file stm32_hal_legacy.h.

#define __SPI3_CLK_SLEEP_DISABLE   __HAL_RCC_SPI3_CLK_SLEEP_DISABLE

Definition at line 2071 of file stm32_hal_legacy.h.

#define __SPI3_CLK_SLEEP_ENABLE   __HAL_RCC_SPI3_CLK_SLEEP_ENABLE

Definition at line 2072 of file stm32_hal_legacy.h.

#define __SPI3_FORCE_RESET   __HAL_RCC_SPI3_FORCE_RESET

Definition at line 2073 of file stm32_hal_legacy.h.

#define __SPI3_IS_CLK_DISABLED   __HAL_RCC_SPI3_IS_CLK_DISABLED

Definition at line 2528 of file stm32_hal_legacy.h.

#define __SPI3_IS_CLK_ENABLED   __HAL_RCC_SPI3_IS_CLK_ENABLED

Definition at line 2527 of file stm32_hal_legacy.h.

#define __SPI3_RELEASE_RESET   __HAL_RCC_SPI3_RELEASE_RESET

Definition at line 2074 of file stm32_hal_legacy.h.

#define __SPI4_CLK_DISABLE   __HAL_RCC_SPI4_CLK_DISABLE

Definition at line 2340 of file stm32_hal_legacy.h.

#define __SPI4_CLK_ENABLE   __HAL_RCC_SPI4_CLK_ENABLE

Definition at line 2339 of file stm32_hal_legacy.h.

#define __SPI4_CLK_SLEEP_DISABLE   __HAL_RCC_SPI4_CLK_SLEEP_DISABLE

Definition at line 2344 of file stm32_hal_legacy.h.

#define __SPI4_CLK_SLEEP_ENABLE   __HAL_RCC_SPI4_CLK_SLEEP_ENABLE

Definition at line 2343 of file stm32_hal_legacy.h.

#define __SPI4_FORCE_RESET   __HAL_RCC_SPI4_FORCE_RESET

Definition at line 2341 of file stm32_hal_legacy.h.

#define __SPI4_IS_CLK_DISABLED   __HAL_RCC_SPI4_IS_CLK_DISABLED

Definition at line 2530 of file stm32_hal_legacy.h.

#define __SPI4_IS_CLK_ENABLED   __HAL_RCC_SPI4_IS_CLK_ENABLED

Definition at line 2529 of file stm32_hal_legacy.h.

#define __SPI4_RELEASE_RESET   __HAL_RCC_SPI4_RELEASE_RESET

Definition at line 2342 of file stm32_hal_legacy.h.

#define __SPI5_CLK_DISABLE   __HAL_RCC_SPI5_CLK_DISABLE

Definition at line 2299 of file stm32_hal_legacy.h.

#define __SPI5_CLK_ENABLE   __HAL_RCC_SPI5_CLK_ENABLE

Definition at line 2298 of file stm32_hal_legacy.h.

#define __SPI5_CLK_SLEEP_DISABLE   __HAL_RCC_SPI5_CLK_SLEEP_DISABLE

Definition at line 2303 of file stm32_hal_legacy.h.

#define __SPI5_CLK_SLEEP_ENABLE   __HAL_RCC_SPI5_CLK_SLEEP_ENABLE

Definition at line 2302 of file stm32_hal_legacy.h.

#define __SPI5_FORCE_RESET   __HAL_RCC_SPI5_FORCE_RESET

Definition at line 2300 of file stm32_hal_legacy.h.

#define __SPI5_RELEASE_RESET   __HAL_RCC_SPI5_RELEASE_RESET

Definition at line 2301 of file stm32_hal_legacy.h.

#define __SPI6_CLK_DISABLE   __HAL_RCC_SPI6_CLK_DISABLE

Definition at line 2305 of file stm32_hal_legacy.h.

#define __SPI6_CLK_ENABLE   __HAL_RCC_SPI6_CLK_ENABLE

Definition at line 2304 of file stm32_hal_legacy.h.

#define __SPI6_CLK_SLEEP_DISABLE   __HAL_RCC_SPI6_CLK_SLEEP_DISABLE

Definition at line 2309 of file stm32_hal_legacy.h.

#define __SPI6_CLK_SLEEP_ENABLE   __HAL_RCC_SPI6_CLK_SLEEP_ENABLE

Definition at line 2308 of file stm32_hal_legacy.h.

#define __SPI6_FORCE_RESET   __HAL_RCC_SPI6_FORCE_RESET

Definition at line 2306 of file stm32_hal_legacy.h.

#define __SPI6_RELEASE_RESET   __HAL_RCC_SPI6_RELEASE_RESET

Definition at line 2307 of file stm32_hal_legacy.h.

#define __SRAM1_CLK_SLEEP_DISABLE   __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE

Definition at line 2077 of file stm32_hal_legacy.h.

#define __SRAM1_CLK_SLEEP_ENABLE   __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE

Definition at line 2078 of file stm32_hal_legacy.h.

#define __SRAM2_CLK_SLEEP_DISABLE   __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE

Definition at line 2079 of file stm32_hal_legacy.h.

#define __SRAM2_CLK_SLEEP_ENABLE   __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE

Definition at line 2080 of file stm32_hal_legacy.h.

#define __SRAM3_CLK_SLEEP_ENABLE   __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE

Definition at line 2399 of file stm32_hal_legacy.h.

#define __SRAM_CLK_DISABLE   __HAL_RCC_SRAM_CLK_DISABLE

Definition at line 2075 of file stm32_hal_legacy.h.

#define __SRAM_CLK_ENABLE   __HAL_RCC_SRAM_CLK_ENABLE

Definition at line 2076 of file stm32_hal_legacy.h.

#define __SRAM_IS_CLK_DISABLED   __HAL_RCC_SRAM_IS_CLK_DISABLED

Definition at line 2538 of file stm32_hal_legacy.h.

#define __SRAM_IS_CLK_ENABLED   __HAL_RCC_SRAM_IS_CLK_ENABLED

Definition at line 2537 of file stm32_hal_legacy.h.

#define __SWPMI1_CLK_DISABLE   __HAL_RCC_SWPMI1_CLK_DISABLE

Definition at line 2081 of file stm32_hal_legacy.h.

#define __SWPMI1_CLK_ENABLE   __HAL_RCC_SWPMI1_CLK_ENABLE

Definition at line 2082 of file stm32_hal_legacy.h.

#define __SWPMI1_CLK_SLEEP_DISABLE   __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE

Definition at line 2083 of file stm32_hal_legacy.h.

#define __SWPMI1_CLK_SLEEP_ENABLE   __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE

Definition at line 2084 of file stm32_hal_legacy.h.

#define __SWPMI1_FORCE_RESET   __HAL_RCC_SWPMI1_FORCE_RESET

Definition at line 2085 of file stm32_hal_legacy.h.

#define __SWPMI1_RELEASE_RESET   __HAL_RCC_SWPMI1_RELEASE_RESET

Definition at line 2086 of file stm32_hal_legacy.h.

#define __SYSCFG_CLK_DISABLE   __HAL_RCC_SYSCFG_CLK_DISABLE

Definition at line 2087 of file stm32_hal_legacy.h.

#define __SYSCFG_CLK_ENABLE   __HAL_RCC_SYSCFG_CLK_ENABLE

Definition at line 2088 of file stm32_hal_legacy.h.

#define __SYSCFG_CLK_SLEEP_DISABLE   __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE

Definition at line 2089 of file stm32_hal_legacy.h.

#define __SYSCFG_CLK_SLEEP_ENABLE   __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE

Definition at line 2090 of file stm32_hal_legacy.h.

#define __SYSCFG_FORCE_RESET   __HAL_RCC_SYSCFG_FORCE_RESET

Definition at line 2091 of file stm32_hal_legacy.h.

#define __SYSCFG_IS_CLK_DISABLED   __HAL_RCC_SYSCFG_IS_CLK_DISABLED

Definition at line 2522 of file stm32_hal_legacy.h.

#define __SYSCFG_IS_CLK_ENABLED   __HAL_RCC_SYSCFG_IS_CLK_ENABLED

Definition at line 2521 of file stm32_hal_legacy.h.

#define __SYSCFG_RELEASE_RESET   __HAL_RCC_SYSCFG_RELEASE_RESET

Definition at line 2092 of file stm32_hal_legacy.h.

#define __TIM10_CLK_DISABLE   __HAL_RCC_TIM10_CLK_DISABLE

Definition at line 2099 of file stm32_hal_legacy.h.

#define __TIM10_CLK_ENABLE   __HAL_RCC_TIM10_CLK_ENABLE

Definition at line 2100 of file stm32_hal_legacy.h.

#define __TIM10_CLK_SLEEP_DISABLE   __HAL_RCC_TIM10_CLK_SLEEP_DISABLE

Definition at line 2285 of file stm32_hal_legacy.h.

#define __TIM10_CLK_SLEEP_ENABLE   __HAL_RCC_TIM10_CLK_SLEEP_ENABLE

Definition at line 2284 of file stm32_hal_legacy.h.

#define __TIM10_FORCE_RESET   __HAL_RCC_TIM10_FORCE_RESET

Definition at line 2101 of file stm32_hal_legacy.h.

#define __TIM10_RELEASE_RESET   __HAL_RCC_TIM10_RELEASE_RESET

Definition at line 2102 of file stm32_hal_legacy.h.

#define __TIM11_CLK_DISABLE   __HAL_RCC_TIM11_CLK_DISABLE

Definition at line 2103 of file stm32_hal_legacy.h.

#define __TIM11_CLK_ENABLE   __HAL_RCC_TIM11_CLK_ENABLE

Definition at line 2104 of file stm32_hal_legacy.h.

#define __TIM11_CLK_SLEEP_DISABLE   __HAL_RCC_TIM11_CLK_SLEEP_DISABLE

Definition at line 2287 of file stm32_hal_legacy.h.

#define __TIM11_CLK_SLEEP_ENABLE   __HAL_RCC_TIM11_CLK_SLEEP_ENABLE

Definition at line 2286 of file stm32_hal_legacy.h.

#define __TIM11_FORCE_RESET   __HAL_RCC_TIM11_FORCE_RESET

Definition at line 2105 of file stm32_hal_legacy.h.

#define __TIM11_RELEASE_RESET   __HAL_RCC_TIM11_RELEASE_RESET

Definition at line 2106 of file stm32_hal_legacy.h.

#define __TIM12_CLK_DISABLE   __HAL_RCC_TIM12_CLK_DISABLE

Definition at line 2107 of file stm32_hal_legacy.h.

#define __TIM12_CLK_ENABLE   __HAL_RCC_TIM12_CLK_ENABLE

Definition at line 2108 of file stm32_hal_legacy.h.

#define __TIM12_CLK_SLEEP_DISABLE   __HAL_RCC_TIM12_CLK_SLEEP_DISABLE

Definition at line 2322 of file stm32_hal_legacy.h.

#define __TIM12_CLK_SLEEP_ENABLE   __HAL_RCC_TIM12_CLK_SLEEP_ENABLE

Definition at line 2321 of file stm32_hal_legacy.h.

#define __TIM12_FORCE_RESET   __HAL_RCC_TIM12_FORCE_RESET

Definition at line 2109 of file stm32_hal_legacy.h.

#define __TIM12_IS_CLK_DISABLED   __HAL_RCC_TIM12_IS_CLK_DISABLED

Definition at line 2556 of file stm32_hal_legacy.h.

#define __TIM12_IS_CLK_ENABLED   __HAL_RCC_TIM12_IS_CLK_ENABLED

Definition at line 2555 of file stm32_hal_legacy.h.

#define __TIM12_RELEASE_RESET   __HAL_RCC_TIM12_RELEASE_RESET

Definition at line 2110 of file stm32_hal_legacy.h.

#define __TIM13_CLK_DISABLE   __HAL_RCC_TIM13_CLK_DISABLE

Definition at line 2111 of file stm32_hal_legacy.h.

#define __TIM13_CLK_ENABLE   __HAL_RCC_TIM13_CLK_ENABLE

Definition at line 2112 of file stm32_hal_legacy.h.

#define __TIM13_CLK_SLEEP_DISABLE   __HAL_RCC_TIM13_CLK_SLEEP_DISABLE

Definition at line 2324 of file stm32_hal_legacy.h.

#define __TIM13_CLK_SLEEP_ENABLE   __HAL_RCC_TIM13_CLK_SLEEP_ENABLE

Definition at line 2323 of file stm32_hal_legacy.h.

#define __TIM13_FORCE_RESET   __HAL_RCC_TIM13_FORCE_RESET

Definition at line 2113 of file stm32_hal_legacy.h.

#define __TIM13_IS_CLK_DISABLED   __HAL_RCC_TIM13_IS_CLK_DISABLED

Definition at line 2558 of file stm32_hal_legacy.h.

#define __TIM13_IS_CLK_ENABLED   __HAL_RCC_TIM13_IS_CLK_ENABLED

Definition at line 2557 of file stm32_hal_legacy.h.

#define __TIM13_RELEASE_RESET   __HAL_RCC_TIM13_RELEASE_RESET

Definition at line 2114 of file stm32_hal_legacy.h.

#define __TIM14_CLK_DISABLE   __HAL_RCC_TIM14_CLK_DISABLE

Definition at line 2115 of file stm32_hal_legacy.h.

#define __TIM14_CLK_ENABLE   __HAL_RCC_TIM14_CLK_ENABLE

Definition at line 2116 of file stm32_hal_legacy.h.

#define __TIM14_CLK_SLEEP_DISABLE   __HAL_RCC_TIM14_CLK_SLEEP_DISABLE

Definition at line 2326 of file stm32_hal_legacy.h.

#define __TIM14_CLK_SLEEP_ENABLE   __HAL_RCC_TIM14_CLK_SLEEP_ENABLE

Definition at line 2325 of file stm32_hal_legacy.h.

#define __TIM14_FORCE_RESET   __HAL_RCC_TIM14_FORCE_RESET

Definition at line 2117 of file stm32_hal_legacy.h.

#define __TIM14_IS_CLK_DISABLED   __HAL_RCC_TIM14_IS_CLK_DISABLED

Definition at line 2560 of file stm32_hal_legacy.h.

#define __TIM14_IS_CLK_ENABLED   __HAL_RCC_TIM14_IS_CLK_ENABLED

Definition at line 2559 of file stm32_hal_legacy.h.

#define __TIM14_RELEASE_RESET   __HAL_RCC_TIM14_RELEASE_RESET

Definition at line 2118 of file stm32_hal_legacy.h.

#define __TIM15_CLK_DISABLE   __HAL_RCC_TIM15_CLK_DISABLE

Definition at line 2119 of file stm32_hal_legacy.h.

#define __TIM15_CLK_ENABLE   __HAL_RCC_TIM15_CLK_ENABLE

Definition at line 2120 of file stm32_hal_legacy.h.

#define __TIM15_CLK_SLEEP_DISABLE   __HAL_RCC_TIM15_CLK_SLEEP_DISABLE

Definition at line 2121 of file stm32_hal_legacy.h.

#define __TIM15_CLK_SLEEP_ENABLE   __HAL_RCC_TIM15_CLK_SLEEP_ENABLE

Definition at line 2122 of file stm32_hal_legacy.h.

#define __TIM15_FORCE_RESET   __HAL_RCC_TIM15_FORCE_RESET

Definition at line 2123 of file stm32_hal_legacy.h.

#define __TIM15_IS_CLK_DISABLED   __HAL_RCC_TIM15_IS_CLK_DISABLED

Definition at line 2562 of file stm32_hal_legacy.h.

#define __TIM15_IS_CLK_ENABLED   __HAL_RCC_TIM15_IS_CLK_ENABLED

Definition at line 2561 of file stm32_hal_legacy.h.

#define __TIM15_RELEASE_RESET   __HAL_RCC_TIM15_RELEASE_RESET

Definition at line 2124 of file stm32_hal_legacy.h.

#define __TIM16_CLK_DISABLE   __HAL_RCC_TIM16_CLK_DISABLE

Definition at line 2125 of file stm32_hal_legacy.h.

#define __TIM16_CLK_ENABLE   __HAL_RCC_TIM16_CLK_ENABLE

Definition at line 2126 of file stm32_hal_legacy.h.

#define __TIM16_CLK_SLEEP_DISABLE   __HAL_RCC_TIM16_CLK_SLEEP_DISABLE

Definition at line 2127 of file stm32_hal_legacy.h.

#define __TIM16_CLK_SLEEP_ENABLE   __HAL_RCC_TIM16_CLK_SLEEP_ENABLE

Definition at line 2128 of file stm32_hal_legacy.h.

#define __TIM16_FORCE_RESET   __HAL_RCC_TIM16_FORCE_RESET

Definition at line 2129 of file stm32_hal_legacy.h.

#define __TIM16_IS_CLK_DISABLED   __HAL_RCC_TIM16_IS_CLK_DISABLED

Definition at line 2564 of file stm32_hal_legacy.h.

#define __TIM16_IS_CLK_ENABLED   __HAL_RCC_TIM16_IS_CLK_ENABLED

Definition at line 2563 of file stm32_hal_legacy.h.

#define __TIM16_RELEASE_RESET   __HAL_RCC_TIM16_RELEASE_RESET

Definition at line 2130 of file stm32_hal_legacy.h.

#define __TIM17_CLK_DISABLE   __HAL_RCC_TIM17_CLK_DISABLE

Definition at line 2131 of file stm32_hal_legacy.h.

#define __TIM17_CLK_ENABLE   __HAL_RCC_TIM17_CLK_ENABLE

Definition at line 2132 of file stm32_hal_legacy.h.

#define __TIM17_CLK_SLEEP_DISABLE   __HAL_RCC_TIM17_CLK_SLEEP_DISABLE

Definition at line 2133 of file stm32_hal_legacy.h.

#define __TIM17_CLK_SLEEP_ENABLE   __HAL_RCC_TIM17_CLK_SLEEP_ENABLE

Definition at line 2134 of file stm32_hal_legacy.h.

#define __TIM17_FORCE_RESET   __HAL_RCC_TIM17_FORCE_RESET

Definition at line 2135 of file stm32_hal_legacy.h.

#define __TIM17_IS_CLK_DISABLED   __HAL_RCC_TIM17_IS_CLK_DISABLED

Definition at line 2566 of file stm32_hal_legacy.h.

#define __TIM17_IS_CLK_ENABLED   __HAL_RCC_TIM17_IS_CLK_ENABLED

Definition at line 2565 of file stm32_hal_legacy.h.

#define __TIM17_RELEASE_RESET   __HAL_RCC_TIM17_RELEASE_RESET

Definition at line 2136 of file stm32_hal_legacy.h.

#define __TIM18_CLK_DISABLE   __HAL_RCC_TIM18_CLK_DISABLE

Definition at line 2436 of file stm32_hal_legacy.h.

#define __TIM18_CLK_ENABLE   __HAL_RCC_TIM18_CLK_ENABLE

Definition at line 2435 of file stm32_hal_legacy.h.

#define __TIM18_FORCE_RESET   __HAL_RCC_TIM18_FORCE_RESET

Definition at line 2458 of file stm32_hal_legacy.h.

#define __TIM18_IS_CLK_DISABLED   __HAL_RCC_TIM18_IS_CLK_DISABLED

Definition at line 2568 of file stm32_hal_legacy.h.

#define __TIM18_IS_CLK_ENABLED   __HAL_RCC_TIM18_IS_CLK_ENABLED

Definition at line 2567 of file stm32_hal_legacy.h.

#define __TIM18_RELEASE_RESET   __HAL_RCC_TIM18_RELEASE_RESET

Definition at line 2459 of file stm32_hal_legacy.h.

#define __TIM19_CLK_DISABLE   __HAL_RCC_TIM19_CLK_DISABLE

Definition at line 2438 of file stm32_hal_legacy.h.

#define __TIM19_CLK_ENABLE   __HAL_RCC_TIM19_CLK_ENABLE

Definition at line 2437 of file stm32_hal_legacy.h.

#define __TIM19_FORCE_RESET   __HAL_RCC_TIM19_FORCE_RESET

Definition at line 2460 of file stm32_hal_legacy.h.

#define __TIM19_IS_CLK_DISABLED   __HAL_RCC_TIM19_IS_CLK_DISABLED

Definition at line 2570 of file stm32_hal_legacy.h.

#define __TIM19_IS_CLK_ENABLED   __HAL_RCC_TIM19_IS_CLK_ENABLED

Definition at line 2569 of file stm32_hal_legacy.h.

#define __TIM19_RELEASE_RESET   __HAL_RCC_TIM19_RELEASE_RESET

Definition at line 2461 of file stm32_hal_legacy.h.

#define __TIM1_CLK_DISABLE   __HAL_RCC_TIM1_CLK_DISABLE

Definition at line 2093 of file stm32_hal_legacy.h.

#define __TIM1_CLK_ENABLE   __HAL_RCC_TIM1_CLK_ENABLE

Definition at line 2094 of file stm32_hal_legacy.h.

#define __TIM1_CLK_SLEEP_DISABLE   __HAL_RCC_TIM1_CLK_SLEEP_DISABLE

Definition at line 2095 of file stm32_hal_legacy.h.

#define __TIM1_CLK_SLEEP_ENABLE   __HAL_RCC_TIM1_CLK_SLEEP_ENABLE

Definition at line 2096 of file stm32_hal_legacy.h.

#define __TIM1_FORCE_RESET   __HAL_RCC_TIM1_FORCE_RESET

Definition at line 2097 of file stm32_hal_legacy.h.

#define __TIM1_IS_CLK_DISABLED   __HAL_RCC_TIM1_IS_CLK_DISABLED

Definition at line 2540 of file stm32_hal_legacy.h.

#define __TIM1_IS_CLK_ENABLED   __HAL_RCC_TIM1_IS_CLK_ENABLED

Definition at line 2539 of file stm32_hal_legacy.h.

#define __TIM1_RELEASE_RESET   __HAL_RCC_TIM1_RELEASE_RESET

Definition at line 2098 of file stm32_hal_legacy.h.

#define __TIM20_CLK_DISABLE   __HAL_RCC_TIM20_CLK_DISABLE

Definition at line 2440 of file stm32_hal_legacy.h.

#define __TIM20_CLK_ENABLE   __HAL_RCC_TIM20_CLK_ENABLE

Definition at line 2439 of file stm32_hal_legacy.h.

#define __TIM20_FORCE_RESET   __HAL_RCC_TIM20_FORCE_RESET

Definition at line 2462 of file stm32_hal_legacy.h.

#define __TIM20_IS_CLK_DISABLED   __HAL_RCC_TIM20_IS_CLK_DISABLED

Definition at line 2572 of file stm32_hal_legacy.h.

#define __TIM20_IS_CLK_ENABLED   __HAL_RCC_TIM20_IS_CLK_ENABLED

Definition at line 2571 of file stm32_hal_legacy.h.

#define __TIM20_RELEASE_RESET   __HAL_RCC_TIM20_RELEASE_RESET

Definition at line 2463 of file stm32_hal_legacy.h.

#define __TIM21_CLK_DISABLE   __HAL_RCC_TIM21_CLK_DISABLE

Definition at line 2254 of file stm32_hal_legacy.h.

#define __TIM21_CLK_ENABLE   __HAL_RCC_TIM21_CLK_ENABLE

Definition at line 2253 of file stm32_hal_legacy.h.

#define __TIM21_CLK_SLEEP_DISABLE   __HAL_RCC_TIM21_CLK_SLEEP_DISABLE

Definition at line 2258 of file stm32_hal_legacy.h.

#define __TIM21_CLK_SLEEP_ENABLE   __HAL_RCC_TIM21_CLK_SLEEP_ENABLE

Definition at line 2257 of file stm32_hal_legacy.h.

#define __TIM21_FORCE_RESET   __HAL_RCC_TIM21_FORCE_RESET

Definition at line 2255 of file stm32_hal_legacy.h.

#define __TIM21_RELEASE_RESET   __HAL_RCC_TIM21_RELEASE_RESET

Definition at line 2256 of file stm32_hal_legacy.h.

#define __TIM22_CLK_DISABLE   __HAL_RCC_TIM22_CLK_DISABLE

Definition at line 2260 of file stm32_hal_legacy.h.

#define __TIM22_CLK_ENABLE   __HAL_RCC_TIM22_CLK_ENABLE

Definition at line 2259 of file stm32_hal_legacy.h.

#define __TIM22_CLK_SLEEP_DISABLE   __HAL_RCC_TIM22_CLK_SLEEP_DISABLE

Definition at line 2264 of file stm32_hal_legacy.h.

#define __TIM22_CLK_SLEEP_ENABLE   __HAL_RCC_TIM22_CLK_SLEEP_ENABLE

Definition at line 2263 of file stm32_hal_legacy.h.

#define __TIM22_FORCE_RESET   __HAL_RCC_TIM22_FORCE_RESET

Definition at line 2261 of file stm32_hal_legacy.h.

#define __TIM22_RELEASE_RESET   __HAL_RCC_TIM22_RELEASE_RESET

Definition at line 2262 of file stm32_hal_legacy.h.

#define __TIM2_CLK_DISABLE   __HAL_RCC_TIM2_CLK_DISABLE

Definition at line 2137 of file stm32_hal_legacy.h.

#define __TIM2_CLK_ENABLE   __HAL_RCC_TIM2_CLK_ENABLE

Definition at line 2138 of file stm32_hal_legacy.h.

#define __TIM2_CLK_SLEEP_DISABLE   __HAL_RCC_TIM2_CLK_SLEEP_DISABLE

Definition at line 2139 of file stm32_hal_legacy.h.

#define __TIM2_CLK_SLEEP_ENABLE   __HAL_RCC_TIM2_CLK_SLEEP_ENABLE

Definition at line 2140 of file stm32_hal_legacy.h.

#define __TIM2_FORCE_RESET   __HAL_RCC_TIM2_FORCE_RESET

Definition at line 2141 of file stm32_hal_legacy.h.

#define __TIM2_IS_CLK_DISABLED   __HAL_RCC_TIM2_IS_CLK_DISABLED

Definition at line 2542 of file stm32_hal_legacy.h.

#define __TIM2_IS_CLK_ENABLED   __HAL_RCC_TIM2_IS_CLK_ENABLED

Definition at line 2541 of file stm32_hal_legacy.h.

#define __TIM2_RELEASE_RESET   __HAL_RCC_TIM2_RELEASE_RESET

Definition at line 2142 of file stm32_hal_legacy.h.

#define __TIM3_CLK_DISABLE   __HAL_RCC_TIM3_CLK_DISABLE

Definition at line 2143 of file stm32_hal_legacy.h.

#define __TIM3_CLK_ENABLE   __HAL_RCC_TIM3_CLK_ENABLE

Definition at line 2144 of file stm32_hal_legacy.h.

#define __TIM3_CLK_SLEEP_DISABLE   __HAL_RCC_TIM3_CLK_SLEEP_DISABLE

Definition at line 2145 of file stm32_hal_legacy.h.

#define __TIM3_CLK_SLEEP_ENABLE   __HAL_RCC_TIM3_CLK_SLEEP_ENABLE

Definition at line 2146 of file stm32_hal_legacy.h.

#define __TIM3_FORCE_RESET   __HAL_RCC_TIM3_FORCE_RESET

Definition at line 2147 of file stm32_hal_legacy.h.

#define __TIM3_IS_CLK_DISABLED   __HAL_RCC_TIM3_IS_CLK_DISABLED

Definition at line 2544 of file stm32_hal_legacy.h.

#define __TIM3_IS_CLK_ENABLED   __HAL_RCC_TIM3_IS_CLK_ENABLED

Definition at line 2543 of file stm32_hal_legacy.h.

#define __TIM3_RELEASE_RESET   __HAL_RCC_TIM3_RELEASE_RESET

Definition at line 2148 of file stm32_hal_legacy.h.

#define __TIM4_CLK_DISABLE   __HAL_RCC_TIM4_CLK_DISABLE

Definition at line 2149 of file stm32_hal_legacy.h.

#define __TIM4_CLK_ENABLE   __HAL_RCC_TIM4_CLK_ENABLE

Definition at line 2150 of file stm32_hal_legacy.h.

#define __TIM4_CLK_SLEEP_DISABLE   __HAL_RCC_TIM4_CLK_SLEEP_DISABLE

Definition at line 2151 of file stm32_hal_legacy.h.

#define __TIM4_CLK_SLEEP_ENABLE   __HAL_RCC_TIM4_CLK_SLEEP_ENABLE

Definition at line 2152 of file stm32_hal_legacy.h.

#define __TIM4_FORCE_RESET   __HAL_RCC_TIM4_FORCE_RESET

Definition at line 2153 of file stm32_hal_legacy.h.

#define __TIM4_IS_CLK_DISABLED   __HAL_RCC_TIM4_IS_CLK_DISABLED

Definition at line 2546 of file stm32_hal_legacy.h.

#define __TIM4_IS_CLK_ENABLED   __HAL_RCC_TIM4_IS_CLK_ENABLED

Definition at line 2545 of file stm32_hal_legacy.h.

#define __TIM4_RELEASE_RESET   __HAL_RCC_TIM4_RELEASE_RESET

Definition at line 2154 of file stm32_hal_legacy.h.

#define __TIM5_CLK_DISABLE   __HAL_RCC_TIM5_CLK_DISABLE

Definition at line 2155 of file stm32_hal_legacy.h.

#define __TIM5_CLK_ENABLE   __HAL_RCC_TIM5_CLK_ENABLE

Definition at line 2156 of file stm32_hal_legacy.h.

#define __TIM5_CLK_SLEEP_DISABLE   __HAL_RCC_TIM5_CLK_SLEEP_DISABLE

Definition at line 2157 of file stm32_hal_legacy.h.

#define __TIM5_CLK_SLEEP_ENABLE   __HAL_RCC_TIM5_CLK_SLEEP_ENABLE

Definition at line 2158 of file stm32_hal_legacy.h.

#define __TIM5_FORCE_RESET   __HAL_RCC_TIM5_FORCE_RESET

Definition at line 2159 of file stm32_hal_legacy.h.

#define __TIM5_IS_CLK_DISABLED   __HAL_RCC_TIM5_IS_CLK_DISABLED

Definition at line 2548 of file stm32_hal_legacy.h.

#define __TIM5_IS_CLK_ENABLED   __HAL_RCC_TIM5_IS_CLK_ENABLED

Definition at line 2547 of file stm32_hal_legacy.h.

#define __TIM5_RELEASE_RESET   __HAL_RCC_TIM5_RELEASE_RESET

Definition at line 2160 of file stm32_hal_legacy.h.

#define __TIM6_CLK_DISABLE   __HAL_RCC_TIM6_CLK_DISABLE

Definition at line 2161 of file stm32_hal_legacy.h.

#define __TIM6_CLK_ENABLE   __HAL_RCC_TIM6_CLK_ENABLE

Definition at line 2162 of file stm32_hal_legacy.h.

#define __TIM6_CLK_SLEEP_DISABLE   __HAL_RCC_TIM6_CLK_SLEEP_DISABLE

Definition at line 2163 of file stm32_hal_legacy.h.

#define __TIM6_CLK_SLEEP_ENABLE   __HAL_RCC_TIM6_CLK_SLEEP_ENABLE

Definition at line 2164 of file stm32_hal_legacy.h.

#define __TIM6_FORCE_RESET   __HAL_RCC_TIM6_FORCE_RESET

Definition at line 2165 of file stm32_hal_legacy.h.

#define __TIM6_IS_CLK_DISABLED   __HAL_RCC_TIM6_IS_CLK_DISABLED

Definition at line 2550 of file stm32_hal_legacy.h.

#define __TIM6_IS_CLK_ENABLED   __HAL_RCC_TIM6_IS_CLK_ENABLED

Definition at line 2549 of file stm32_hal_legacy.h.

#define __TIM6_RELEASE_RESET   __HAL_RCC_TIM6_RELEASE_RESET

Definition at line 2166 of file stm32_hal_legacy.h.

#define __TIM7_CLK_DISABLE   __HAL_RCC_TIM7_CLK_DISABLE

Definition at line 2167 of file stm32_hal_legacy.h.

#define __TIM7_CLK_ENABLE   __HAL_RCC_TIM7_CLK_ENABLE

Definition at line 2168 of file stm32_hal_legacy.h.

#define __TIM7_CLK_SLEEP_DISABLE   __HAL_RCC_TIM7_CLK_SLEEP_DISABLE

Definition at line 2169 of file stm32_hal_legacy.h.

#define __TIM7_CLK_SLEEP_ENABLE   __HAL_RCC_TIM7_CLK_SLEEP_ENABLE

Definition at line 2170 of file stm32_hal_legacy.h.

#define __TIM7_FORCE_RESET   __HAL_RCC_TIM7_FORCE_RESET

Definition at line 2171 of file stm32_hal_legacy.h.

#define __TIM7_IS_CLK_DISABLED   __HAL_RCC_TIM7_IS_CLK_DISABLED

Definition at line 2552 of file stm32_hal_legacy.h.

#define __TIM7_IS_CLK_ENABLED   __HAL_RCC_TIM7_IS_CLK_ENABLED

Definition at line 2551 of file stm32_hal_legacy.h.

#define __TIM7_RELEASE_RESET   __HAL_RCC_TIM7_RELEASE_RESET

Definition at line 2172 of file stm32_hal_legacy.h.

#define __TIM8_CLK_DISABLE   __HAL_RCC_TIM8_CLK_DISABLE

Definition at line 2173 of file stm32_hal_legacy.h.

#define __TIM8_CLK_ENABLE   __HAL_RCC_TIM8_CLK_ENABLE

Definition at line 2174 of file stm32_hal_legacy.h.

#define __TIM8_CLK_SLEEP_DISABLE   __HAL_RCC_TIM8_CLK_SLEEP_DISABLE

Definition at line 2175 of file stm32_hal_legacy.h.

#define __TIM8_CLK_SLEEP_ENABLE   __HAL_RCC_TIM8_CLK_SLEEP_ENABLE

Definition at line 2176 of file stm32_hal_legacy.h.

#define __TIM8_FORCE_RESET   __HAL_RCC_TIM8_FORCE_RESET

Definition at line 2177 of file stm32_hal_legacy.h.

#define __TIM8_IS_CLK_DISABLED   __HAL_RCC_TIM8_IS_CLK_DISABLED

Definition at line 2554 of file stm32_hal_legacy.h.

#define __TIM8_IS_CLK_ENABLED   __HAL_RCC_TIM8_IS_CLK_ENABLED

Definition at line 2553 of file stm32_hal_legacy.h.

#define __TIM8_RELEASE_RESET   __HAL_RCC_TIM8_RELEASE_RESET

Definition at line 2178 of file stm32_hal_legacy.h.

#define __TIM9_CLK_DISABLE   __HAL_RCC_TIM9_CLK_DISABLE

Definition at line 2179 of file stm32_hal_legacy.h.

#define __TIM9_CLK_ENABLE   __HAL_RCC_TIM9_CLK_ENABLE

Definition at line 2180 of file stm32_hal_legacy.h.

#define __TIM9_CLK_SLEEP_DISABLE   __HAL_RCC_TIM9_CLK_SLEEP_DISABLE

Definition at line 2283 of file stm32_hal_legacy.h.

#define __TIM9_CLK_SLEEP_ENABLE   __HAL_RCC_TIM9_CLK_SLEEP_ENABLE

Definition at line 2282 of file stm32_hal_legacy.h.

#define __TIM9_FORCE_RESET   __HAL_RCC_TIM9_FORCE_RESET

Definition at line 2181 of file stm32_hal_legacy.h.

#define __TIM9_RELEASE_RESET   __HAL_RCC_TIM9_RELEASE_RESET

Definition at line 2182 of file stm32_hal_legacy.h.

#define __TSC_CLK_DISABLE   __HAL_RCC_TSC_CLK_DISABLE

Definition at line 2183 of file stm32_hal_legacy.h.

#define __TSC_CLK_ENABLE   __HAL_RCC_TSC_CLK_ENABLE

Definition at line 2184 of file stm32_hal_legacy.h.

#define __TSC_CLK_SLEEP_DISABLE   __HAL_RCC_TSC_CLK_SLEEP_DISABLE

Definition at line 2185 of file stm32_hal_legacy.h.

#define __TSC_CLK_SLEEP_ENABLE   __HAL_RCC_TSC_CLK_SLEEP_ENABLE

Definition at line 2186 of file stm32_hal_legacy.h.

#define __TSC_FORCE_RESET   __HAL_RCC_TSC_FORCE_RESET

Definition at line 2187 of file stm32_hal_legacy.h.

#define __TSC_IS_CLK_DISABLED   __HAL_RCC_TSC_IS_CLK_DISABLED

Definition at line 2574 of file stm32_hal_legacy.h.

#define __TSC_IS_CLK_ENABLED   __HAL_RCC_TSC_IS_CLK_ENABLED

Definition at line 2573 of file stm32_hal_legacy.h.

#define __TSC_RELEASE_RESET   __HAL_RCC_TSC_RELEASE_RESET

Definition at line 2188 of file stm32_hal_legacy.h.

#define __UART4_CLK_DISABLE   __HAL_RCC_UART4_CLK_DISABLE

Definition at line 2189 of file stm32_hal_legacy.h.

#define __UART4_CLK_ENABLE   __HAL_RCC_UART4_CLK_ENABLE

Definition at line 2190 of file stm32_hal_legacy.h.

#define __UART4_CLK_SLEEP_DISABLE   __HAL_RCC_UART4_CLK_SLEEP_DISABLE

Definition at line 2191 of file stm32_hal_legacy.h.

#define __UART4_CLK_SLEEP_ENABLE   __HAL_RCC_UART4_CLK_SLEEP_ENABLE

Definition at line 2192 of file stm32_hal_legacy.h.

#define __UART4_FORCE_RESET   __HAL_RCC_UART4_FORCE_RESET

Definition at line 2193 of file stm32_hal_legacy.h.

#define __UART4_IS_CLK_DISABLED   __HAL_RCC_UART4_IS_CLK_DISABLED

Definition at line 2576 of file stm32_hal_legacy.h.

#define __UART4_IS_CLK_ENABLED   __HAL_RCC_UART4_IS_CLK_ENABLED

Definition at line 2575 of file stm32_hal_legacy.h.

#define __UART4_RELEASE_RESET   __HAL_RCC_UART4_RELEASE_RESET

Definition at line 2194 of file stm32_hal_legacy.h.

#define __UART5_CLK_DISABLE   __HAL_RCC_UART5_CLK_DISABLE

Definition at line 2195 of file stm32_hal_legacy.h.

#define __UART5_CLK_ENABLE   __HAL_RCC_UART5_CLK_ENABLE

Definition at line 2196 of file stm32_hal_legacy.h.

#define __UART5_CLK_SLEEP_DISABLE   __HAL_RCC_UART5_CLK_SLEEP_DISABLE

Definition at line 2197 of file stm32_hal_legacy.h.

#define __UART5_CLK_SLEEP_ENABLE   __HAL_RCC_UART5_CLK_SLEEP_ENABLE

Definition at line 2198 of file stm32_hal_legacy.h.

#define __UART5_FORCE_RESET   __HAL_RCC_UART5_FORCE_RESET

Definition at line 2199 of file stm32_hal_legacy.h.

#define __UART5_IS_CLK_DISABLED   __HAL_RCC_UART5_IS_CLK_DISABLED

Definition at line 2578 of file stm32_hal_legacy.h.

#define __UART5_IS_CLK_ENABLED   __HAL_RCC_UART5_IS_CLK_ENABLED

Definition at line 2577 of file stm32_hal_legacy.h.

#define __UART5_RELEASE_RESET   __HAL_RCC_UART5_RELEASE_RESET

Definition at line 2200 of file stm32_hal_legacy.h.

#define __UART7_CLK_DISABLE   __HAL_RCC_UART7_CLK_DISABLE

Definition at line 2371 of file stm32_hal_legacy.h.

#define __UART7_CLK_ENABLE   __HAL_RCC_UART7_CLK_ENABLE

Definition at line 2370 of file stm32_hal_legacy.h.

#define __UART7_CLK_SLEEP_DISABLE   __HAL_RCC_UART7_CLK_SLEEP_DISABLE

Definition at line 2375 of file stm32_hal_legacy.h.

#define __UART7_CLK_SLEEP_ENABLE   __HAL_RCC_UART7_CLK_SLEEP_ENABLE

Definition at line 2374 of file stm32_hal_legacy.h.

#define __UART7_FORCE_RESET   __HAL_RCC_UART7_FORCE_RESET

Definition at line 2373 of file stm32_hal_legacy.h.

#define __UART7_RELEASE_RESET   __HAL_RCC_UART7_RELEASE_RESET

Definition at line 2372 of file stm32_hal_legacy.h.

#define __UART8_CLK_DISABLE   __HAL_RCC_UART8_CLK_DISABLE

Definition at line 2377 of file stm32_hal_legacy.h.

#define __UART8_CLK_ENABLE   __HAL_RCC_UART8_CLK_ENABLE

Definition at line 2376 of file stm32_hal_legacy.h.

#define __UART8_CLK_SLEEP_DISABLE   __HAL_RCC_UART8_CLK_SLEEP_DISABLE

Definition at line 2381 of file stm32_hal_legacy.h.

#define __UART8_CLK_SLEEP_ENABLE   __HAL_RCC_UART8_CLK_SLEEP_ENABLE

Definition at line 2380 of file stm32_hal_legacy.h.

#define __UART8_FORCE_RESET   __HAL_RCC_UART8_FORCE_RESET

Definition at line 2378 of file stm32_hal_legacy.h.

#define __UART8_RELEASE_RESET   __HAL_RCC_UART8_RELEASE_RESET

Definition at line 2379 of file stm32_hal_legacy.h.

#define __USART1_CLK_DISABLE   __HAL_RCC_USART1_CLK_DISABLE

Definition at line 2201 of file stm32_hal_legacy.h.

#define __USART1_CLK_ENABLE   __HAL_RCC_USART1_CLK_ENABLE

Definition at line 2202 of file stm32_hal_legacy.h.

#define __USART1_CLK_SLEEP_DISABLE   __HAL_RCC_USART1_CLK_SLEEP_DISABLE

Definition at line 2203 of file stm32_hal_legacy.h.

#define __USART1_CLK_SLEEP_ENABLE   __HAL_RCC_USART1_CLK_SLEEP_ENABLE

Definition at line 2204 of file stm32_hal_legacy.h.

#define __USART1_FORCE_RESET   __HAL_RCC_USART1_FORCE_RESET

Definition at line 2205 of file stm32_hal_legacy.h.

#define __USART1_IS_CLK_DISABLED   __HAL_RCC_USART1_IS_CLK_DISABLED

Definition at line 2580 of file stm32_hal_legacy.h.

#define __USART1_IS_CLK_ENABLED   __HAL_RCC_USART1_IS_CLK_ENABLED

Definition at line 2579 of file stm32_hal_legacy.h.

#define __USART1_RELEASE_RESET   __HAL_RCC_USART1_RELEASE_RESET

Definition at line 2206 of file stm32_hal_legacy.h.

#define __USART2_CLK_DISABLE   __HAL_RCC_USART2_CLK_DISABLE

Definition at line 2207 of file stm32_hal_legacy.h.

#define __USART2_CLK_ENABLE   __HAL_RCC_USART2_CLK_ENABLE

Definition at line 2208 of file stm32_hal_legacy.h.

#define __USART2_CLK_SLEEP_DISABLE   __HAL_RCC_USART2_CLK_SLEEP_DISABLE

Definition at line 2209 of file stm32_hal_legacy.h.

#define __USART2_CLK_SLEEP_ENABLE   __HAL_RCC_USART2_CLK_SLEEP_ENABLE

Definition at line 2210 of file stm32_hal_legacy.h.

#define __USART2_FORCE_RESET   __HAL_RCC_USART2_FORCE_RESET

Definition at line 2211 of file stm32_hal_legacy.h.

#define __USART2_IS_CLK_DISABLED   __HAL_RCC_USART2_IS_CLK_DISABLED

Definition at line 2582 of file stm32_hal_legacy.h.

#define __USART2_IS_CLK_ENABLED   __HAL_RCC_USART2_IS_CLK_ENABLED

Definition at line 2581 of file stm32_hal_legacy.h.

#define __USART2_RELEASE_RESET   __HAL_RCC_USART2_RELEASE_RESET

Definition at line 2212 of file stm32_hal_legacy.h.

#define __USART3_CLK_DISABLE   __HAL_RCC_USART3_CLK_DISABLE

Definition at line 2213 of file stm32_hal_legacy.h.

#define __USART3_CLK_ENABLE   __HAL_RCC_USART3_CLK_ENABLE

Definition at line 2214 of file stm32_hal_legacy.h.

#define __USART3_CLK_SLEEP_DISABLE   __HAL_RCC_USART3_CLK_SLEEP_DISABLE

Definition at line 2215 of file stm32_hal_legacy.h.

#define __USART3_CLK_SLEEP_ENABLE   __HAL_RCC_USART3_CLK_SLEEP_ENABLE

Definition at line 2216 of file stm32_hal_legacy.h.

#define __USART3_FORCE_RESET   __HAL_RCC_USART3_FORCE_RESET

Definition at line 2217 of file stm32_hal_legacy.h.

#define __USART3_IS_CLK_DISABLED   __HAL_RCC_USART3_IS_CLK_DISABLED

Definition at line 2584 of file stm32_hal_legacy.h.

#define __USART3_IS_CLK_ENABLED   __HAL_RCC_USART3_IS_CLK_ENABLED

Definition at line 2583 of file stm32_hal_legacy.h.

#define __USART3_RELEASE_RESET   __HAL_RCC_USART3_RELEASE_RESET

Definition at line 2218 of file stm32_hal_legacy.h.

#define __USART4_CLK_DISABLE   __HAL_RCC_USART4_CLK_DISABLE

Definition at line 2219 of file stm32_hal_legacy.h.

#define __USART4_CLK_ENABLE   __HAL_RCC_USART4_CLK_ENABLE

Definition at line 2220 of file stm32_hal_legacy.h.

#define __USART4_CLK_SLEEP_DISABLE   __HAL_RCC_USART4_CLK_SLEEP_DISABLE

Definition at line 2222 of file stm32_hal_legacy.h.

#define __USART4_CLK_SLEEP_ENABLE   __HAL_RCC_USART4_CLK_SLEEP_ENABLE

Definition at line 2221 of file stm32_hal_legacy.h.

#define __USART4_FORCE_RESET   __HAL_RCC_USART4_FORCE_RESET

Definition at line 2223 of file stm32_hal_legacy.h.

#define __USART4_RELEASE_RESET   __HAL_RCC_USART4_RELEASE_RESET

Definition at line 2224 of file stm32_hal_legacy.h.

#define __USART5_CLK_DISABLE   __HAL_RCC_USART5_CLK_DISABLE

Definition at line 2225 of file stm32_hal_legacy.h.

#define __USART5_CLK_ENABLE   __HAL_RCC_USART5_CLK_ENABLE

Definition at line 2226 of file stm32_hal_legacy.h.

#define __USART5_CLK_SLEEP_DISABLE   __HAL_RCC_USART5_CLK_SLEEP_DISABLE

Definition at line 2228 of file stm32_hal_legacy.h.

#define __USART5_CLK_SLEEP_ENABLE   __HAL_RCC_USART5_CLK_SLEEP_ENABLE

Definition at line 2227 of file stm32_hal_legacy.h.

#define __USART5_FORCE_RESET   __HAL_RCC_USART5_FORCE_RESET

Definition at line 2229 of file stm32_hal_legacy.h.

#define __USART5_RELEASE_RESET   __HAL_RCC_USART5_RELEASE_RESET

Definition at line 2230 of file stm32_hal_legacy.h.

#define __USART6_CLK_DISABLE   __HAL_RCC_USART6_CLK_DISABLE

Definition at line 2334 of file stm32_hal_legacy.h.

#define __USART6_CLK_ENABLE   __HAL_RCC_USART6_CLK_ENABLE

Definition at line 2333 of file stm32_hal_legacy.h.

#define __USART6_CLK_SLEEP_DISABLE   __HAL_RCC_USART6_CLK_SLEEP_DISABLE

Definition at line 2338 of file stm32_hal_legacy.h.

#define __USART6_CLK_SLEEP_ENABLE   __HAL_RCC_USART6_CLK_SLEEP_ENABLE

Definition at line 2337 of file stm32_hal_legacy.h.

#define __USART6_FORCE_RESET   __HAL_RCC_USART6_FORCE_RESET

Definition at line 2335 of file stm32_hal_legacy.h.

#define __USART6_RELEASE_RESET   __HAL_RCC_USART6_RELEASE_RESET

Definition at line 2336 of file stm32_hal_legacy.h.

#define __USART7_CLK_DISABLE   __HAL_RCC_USART7_CLK_DISABLE

Definition at line 2231 of file stm32_hal_legacy.h.

#define __USART7_CLK_ENABLE   __HAL_RCC_USART7_CLK_ENABLE

Definition at line 2232 of file stm32_hal_legacy.h.

#define __USART7_FORCE_RESET   __HAL_RCC_USART7_FORCE_RESET

Definition at line 2233 of file stm32_hal_legacy.h.

#define __USART7_RELEASE_RESET   __HAL_RCC_USART7_RELEASE_RESET

Definition at line 2234 of file stm32_hal_legacy.h.

#define __USART8_CLK_DISABLE   __HAL_RCC_USART8_CLK_DISABLE

Definition at line 2235 of file stm32_hal_legacy.h.

#define __USART8_CLK_ENABLE   __HAL_RCC_USART8_CLK_ENABLE

Definition at line 2236 of file stm32_hal_legacy.h.

#define __USART8_FORCE_RESET   __HAL_RCC_USART8_FORCE_RESET

Definition at line 2237 of file stm32_hal_legacy.h.

#define __USART8_RELEASE_RESET   __HAL_RCC_USART8_RELEASE_RESET

Definition at line 2238 of file stm32_hal_legacy.h.

#define __USB_CLK_DISABLE   __HAL_RCC_USB_CLK_DISABLE

Definition at line 2239 of file stm32_hal_legacy.h.

#define __USB_CLK_ENABLE   __HAL_RCC_USB_CLK_ENABLE

Definition at line 2240 of file stm32_hal_legacy.h.

#define __USB_CLK_SLEEP_DISABLE   __HAL_RCC_USB_CLK_SLEEP_DISABLE

Definition at line 2243 of file stm32_hal_legacy.h.

#define __USB_CLK_SLEEP_ENABLE   __HAL_RCC_USB_CLK_SLEEP_ENABLE

Definition at line 2242 of file stm32_hal_legacy.h.

#define __USB_FORCE_RESET   __HAL_RCC_USB_FORCE_RESET

Definition at line 2241 of file stm32_hal_legacy.h.

#define __USB_IS_CLK_DISABLED   __HAL_RCC_USB_IS_CLK_DISABLED

Definition at line 2586 of file stm32_hal_legacy.h.

#define __USB_IS_CLK_ENABLED   __HAL_RCC_USB_IS_CLK_ENABLED

Definition at line 2585 of file stm32_hal_legacy.h.

#define __USB_OTG_FS_CLK_DISABLE   __HAL_RCC_USB_OTG_FS_CLK_DISABLE

Definition at line 2244 of file stm32_hal_legacy.h.

#define __USB_OTG_FS_CLK_ENABLE   __HAL_RCC_USB_OTG_FS_CLK_ENABLE

Definition at line 2245 of file stm32_hal_legacy.h.

#define __USB_OTG_FS_CLK_SLEEP_DISABLE   __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE

Definition at line 2277 of file stm32_hal_legacy.h.

#define __USB_OTG_FS_CLK_SLEEP_ENABLE   __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE

Definition at line 2276 of file stm32_hal_legacy.h.

#define __USB_OTG_FS_FORCE_RESET   __HAL_RCC_USB_OTG_FS_FORCE_RESET

Definition at line 2274 of file stm32_hal_legacy.h.

#define __USB_OTG_FS_RELEASE_RESET   __HAL_RCC_USB_OTG_FS_RELEASE_RESET

Definition at line 2275 of file stm32_hal_legacy.h.

#define __USB_OTG_HS_CLK_DISABLE   __HAL_RCC_USB_OTG_HS_CLK_DISABLE

Definition at line 2278 of file stm32_hal_legacy.h.

#define __USB_OTG_HS_CLK_ENABLE   __HAL_RCC_USB_OTG_HS_CLK_ENABLE

Definition at line 2279 of file stm32_hal_legacy.h.

#define __USB_OTG_HS_ULPI_CLK_DISABLE   __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE

Definition at line 2281 of file stm32_hal_legacy.h.

#define __USB_OTG_HS_ULPI_CLK_ENABLE   __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE

Definition at line 2280 of file stm32_hal_legacy.h.

#define __USB_RELEASE_RESET   __HAL_RCC_USB_RELEASE_RESET

Definition at line 2246 of file stm32_hal_legacy.h.

#define __WWDG_CLK_DISABLE   __HAL_RCC_WWDG_CLK_DISABLE

Definition at line 2247 of file stm32_hal_legacy.h.

#define __WWDG_CLK_ENABLE   __HAL_RCC_WWDG_CLK_ENABLE

Definition at line 2248 of file stm32_hal_legacy.h.

#define __WWDG_CLK_SLEEP_DISABLE   __HAL_RCC_WWDG_CLK_SLEEP_DISABLE

Definition at line 2249 of file stm32_hal_legacy.h.

#define __WWDG_CLK_SLEEP_ENABLE   __HAL_RCC_WWDG_CLK_SLEEP_ENABLE

Definition at line 2250 of file stm32_hal_legacy.h.

#define __WWDG_FORCE_RESET   __HAL_RCC_WWDG_FORCE_RESET

Definition at line 2251 of file stm32_hal_legacy.h.

#define __WWDG_IS_CLK_DISABLED   __HAL_RCC_WWDG_IS_CLK_DISABLED

Definition at line 2588 of file stm32_hal_legacy.h.

#define __WWDG_IS_CLK_ENABLED   __HAL_RCC_WWDG_IS_CLK_ENABLED

Definition at line 2587 of file stm32_hal_legacy.h.

#define __WWDG_RELEASE_RESET   __HAL_RCC_WWDG_RELEASE_RESET

Definition at line 2252 of file stm32_hal_legacy.h.

#define BDCR_BDRST_BB   RCC_BDCR_BDRST_BB

Definition at line 2724 of file stm32_hal_legacy.h.

#define BDCR_BYTE0_ADDRESS   RCC_BDCR_BYTE0_ADDRESS

Definition at line 2708 of file stm32_hal_legacy.h.

#define BDCR_RTCEN_BB   RCC_BDCR_RTCEN_BB

Definition at line 2723 of file stm32_hal_legacy.h.

#define BDRST_BitNumber   RCC_BDRST_BIT_NUMBER

Definition at line 2692 of file stm32_hal_legacy.h.

#define BDRST_BITNUMBER   RCC_BDRST_BIT_NUMBER

Definition at line 2693 of file stm32_hal_legacy.h.

#define CFGR_I2SSRC_BB   RCC_CFGR_I2SSRC_BB

Definition at line 2722 of file stm32_hal_legacy.h.

#define CIR_BYTE1_ADDRESS   RCC_CIR_BYTE1_ADDRESS

Definition at line 2706 of file stm32_hal_legacy.h.

#define CIR_BYTE2_ADDRESS   RCC_CIR_BYTE2_ADDRESS

Definition at line 2707 of file stm32_hal_legacy.h.

#define CR_BYTE2_ADDRESS   RCC_CR_BYTE2_ADDRESS

Definition at line 2705 of file stm32_hal_legacy.h.

#define CR_CSSON_BB   RCC_CR_CSSON_BB

Definition at line 2713 of file stm32_hal_legacy.h.

#define CR_HSEON_BB   RCC_CR_HSEON_BB

Definition at line 2725 of file stm32_hal_legacy.h.

#define CR_HSION_BB   RCC_CR_HSION_BB

Definition at line 2712 of file stm32_hal_legacy.h.

#define CR_MSION_BB   RCC_CR_MSION_BB

Definition at line 2716 of file stm32_hal_legacy.h.

#define CR_PLLI2SON_BB   RCC_CR_PLLI2SON_BB

Definition at line 2715 of file stm32_hal_legacy.h.

#define CR_PLLON_BB   RCC_CR_PLLON_BB

Definition at line 2714 of file stm32_hal_legacy.h.

#define CR_PLLSAION_BB   RCC_CR_PLLSAION_BB

Definition at line 2727 of file stm32_hal_legacy.h.

#define CSR_LSEBYP_BB   RCC_CSR_LSEBYP_BB

Definition at line 2719 of file stm32_hal_legacy.h.

#define CSR_LSEON_BB   RCC_CSR_LSEON_BB

Definition at line 2718 of file stm32_hal_legacy.h.

#define CSR_LSION_BB   RCC_CSR_LSION_BB

Definition at line 2717 of file stm32_hal_legacy.h.

#define CSR_RMVF_BB   RCC_CSR_RMVF_BB

Definition at line 2726 of file stm32_hal_legacy.h.

#define CSR_RTCEN_BB   RCC_CSR_RTCEN_BB

Definition at line 2720 of file stm32_hal_legacy.h.

#define CSR_RTCRST_BB   RCC_CSR_RTCRST_BB

Definition at line 2721 of file stm32_hal_legacy.h.

#define CSSON_BitNumber   RCC_CSSON_BIT_NUMBER

Definition at line 2684 of file stm32_hal_legacy.h.

#define CSSON_BITNUMBER   RCC_CSSON_BIT_NUMBER

Definition at line 2685 of file stm32_hal_legacy.h.

#define DBP_TIMEOUT_VALUE   RCC_DBP_TIMEOUT_VALUE

Definition at line 2709 of file stm32_hal_legacy.h.

#define DCKCFGR_TIMPRE_BB   RCC_DCKCFGR_TIMPRE_BB

Definition at line 2728 of file stm32_hal_legacy.h.

#define DfsdmClockSelection   Dfsdm1ClockSelection

Definition at line 2758 of file stm32_hal_legacy.h.

#define HAL_RC48_EnableBuffer_Cmd (   cmd)    (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())

Definition at line 1771 of file stm32_hal_legacy.h.

#define HAL_RCC_CCSCallback   HAL_RCC_CSSCallback

Definition at line 1770 of file stm32_hal_legacy.h.

#define HSEON_BitNumber   RCC_HSEON_BIT_NUMBER

Definition at line 2681 of file stm32_hal_legacy.h.

#define HSEON_BITNUMBER   RCC_HSEON_BIT_NUMBER

Definition at line 2682 of file stm32_hal_legacy.h.

#define HSION_BitNumber   RCC_HSION_BIT_NUMBER

Definition at line 2679 of file stm32_hal_legacy.h.

#define HSION_BITNUMBER   RCC_HSION_BIT_NUMBER

Definition at line 2680 of file stm32_hal_legacy.h.

#define I2SSRC_BitNumber   RCC_I2SSRC_BIT_NUMBER

Definition at line 2689 of file stm32_hal_legacy.h.

#define IS_RCC_CK48CLKSOURCE   IS_RCC_CLK48CLKSOURCE

Definition at line 2745 of file stm32_hal_legacy.h.

#define IS_RCC_HCLK_DIV   IS_RCC_PCLK

Definition at line 2635 of file stm32_hal_legacy.h.

#define IS_RCC_MCOSOURCE   IS_RCC_MCO1SOURCE

Definition at line 2645 of file stm32_hal_legacy.h.

#define IS_RCC_MSIRANGE   IS_RCC_MSI_CLOCK_RANGE

Definition at line 2632 of file stm32_hal_legacy.h.

#define IS_RCC_PERIPHCLK   IS_RCC_PERIPHCLOCK

Definition at line 2636 of file stm32_hal_legacy.h.

#define IS_RCC_RTCCLK_SOURCE   IS_RCC_RTCCLKSOURCE

Definition at line 2633 of file stm32_hal_legacy.h.

#define IS_RCC_SYSCLK_DIV   IS_RCC_HCLK

Definition at line 2634 of file stm32_hal_legacy.h.

#define LSE_TIMEOUT_VALUE   RCC_LSE_TIMEOUT_VALUE

Definition at line 2710 of file stm32_hal_legacy.h.

#define LSEBYP_BITNUMBER   RCC_LSEBYP_BIT_NUMBER

Definition at line 2699 of file stm32_hal_legacy.h.

#define LSEON_BitNumber   RCC_LSEON_BIT_NUMBER

Definition at line 2697 of file stm32_hal_legacy.h.

#define LSEON_BITNUMBER   RCC_LSEON_BIT_NUMBER

Definition at line 2698 of file stm32_hal_legacy.h.

#define LSION_BitNumber   RCC_LSION_BIT_NUMBER

Definition at line 2695 of file stm32_hal_legacy.h.

#define LSION_BITNUMBER   RCC_LSION_BIT_NUMBER

Definition at line 2696 of file stm32_hal_legacy.h.

#define MSION_BITNUMBER   RCC_MSION_BIT_NUMBER

Definition at line 2683 of file stm32_hal_legacy.h.

#define PLLI2SON_BitNumber   RCC_PLLI2SON_BIT_NUMBER

Definition at line 2688 of file stm32_hal_legacy.h.

#define PLLON_BitNumber   RCC_PLLON_BIT_NUMBER

Definition at line 2686 of file stm32_hal_legacy.h.

#define PLLON_BITNUMBER   RCC_PLLON_BIT_NUMBER

Definition at line 2687 of file stm32_hal_legacy.h.

#define PLLSAION_BitNumber   RCC_PLLSAION_BIT_NUMBER

Definition at line 2700 of file stm32_hal_legacy.h.

#define RCC_CK48CLKSOURCE_PLLI2SQ   RCC_CLK48CLKSOURCE_PLLI2SQ

Definition at line 2744 of file stm32_hal_legacy.h.

#define RCC_CK48CLKSOURCE_PLLQ   RCC_CLK48CLKSOURCE_PLLQ

Definition at line 2742 of file stm32_hal_legacy.h.

#define RCC_CK48CLKSOURCE_PLLSAIP   RCC_CLK48CLKSOURCE_PLLSAIP

Definition at line 2743 of file stm32_hal_legacy.h.

#define RCC_CR2_HSI14TRIM_BitNumber   RCC_HSI14TRIM_BIT_NUMBER

Definition at line 2704 of file stm32_hal_legacy.h.

#define RCC_CRS_SYNCWARM   RCC_CRS_SYNCWARN

Definition at line 2738 of file stm32_hal_legacy.h.

#define RCC_CRS_TRIMOV   RCC_CRS_TRIMOVF

Definition at line 2739 of file stm32_hal_legacy.h.

#define RCC_DFSDMCLKSOURCE_PCLK   RCC_DFSDM1CLKSOURCE_PCLK

Definition at line 2760 of file stm32_hal_legacy.h.

#define RCC_DFSDMCLKSOURCE_SYSCLK   RCC_DFSDM1CLKSOURCE_SYSCLK

Definition at line 2761 of file stm32_hal_legacy.h.

#define RCC_IT_HSI14   RCC_IT_HSI14RDY

Definition at line 2638 of file stm32_hal_legacy.h.

#define RCC_MCO_DIV1   RCC_MCODIV_1

Definition at line 2648 of file stm32_hal_legacy.h.

#define RCC_MCO_DIV128   RCC_MCODIV_128

Definition at line 2655 of file stm32_hal_legacy.h.

#define RCC_MCO_DIV16   RCC_MCODIV_16

Definition at line 2652 of file stm32_hal_legacy.h.

#define RCC_MCO_DIV2   RCC_MCODIV_2

Definition at line 2649 of file stm32_hal_legacy.h.

#define RCC_MCO_DIV32   RCC_MCODIV_32

Definition at line 2653 of file stm32_hal_legacy.h.

#define RCC_MCO_DIV4   RCC_MCODIV_4

Definition at line 2650 of file stm32_hal_legacy.h.

#define RCC_MCO_DIV64   RCC_MCODIV_64

Definition at line 2654 of file stm32_hal_legacy.h.

#define RCC_MCO_DIV8   RCC_MCODIV_8

Definition at line 2651 of file stm32_hal_legacy.h.

#define RCC_MCO_NODIV   RCC_MCODIV_1

Definition at line 2647 of file stm32_hal_legacy.h.

#define RCC_MCOSOURCE_HSE   RCC_MCO1SOURCE_HSE

Definition at line 2663 of file stm32_hal_legacy.h.

#define RCC_MCOSOURCE_HSI   RCC_MCO1SOURCE_HSI

Definition at line 2660 of file stm32_hal_legacy.h.

#define RCC_MCOSOURCE_HSI14   RCC_MCO1SOURCE_HSI14

Definition at line 2661 of file stm32_hal_legacy.h.

#define RCC_MCOSOURCE_HSI48   RCC_MCO1SOURCE_HSI48

Definition at line 2662 of file stm32_hal_legacy.h.

#define RCC_MCOSOURCE_LSE   RCC_MCO1SOURCE_LSE

Definition at line 2658 of file stm32_hal_legacy.h.

#define RCC_MCOSOURCE_LSI   RCC_MCO1SOURCE_LSI

Definition at line 2657 of file stm32_hal_legacy.h.

#define RCC_MCOSOURCE_NONE   RCC_MCO1SOURCE_NOCLOCK

Definition at line 2656 of file stm32_hal_legacy.h.

#define RCC_MCOSOURCE_PLLCLK_DIV1   RCC_MCO1SOURCE_PLLCLK

Definition at line 2664 of file stm32_hal_legacy.h.

#define RCC_MCOSOURCE_PLLCLK_DIV2   RCC_MCO1SOURCE_PLLCLK_DIV2

Definition at line 2666 of file stm32_hal_legacy.h.

#define RCC_MCOSOURCE_PLLCLK_NODIV   RCC_MCO1SOURCE_PLLCLK

Definition at line 2665 of file stm32_hal_legacy.h.

#define RCC_MCOSOURCE_SYSCLK   RCC_MCO1SOURCE_SYSCLK

Definition at line 2659 of file stm32_hal_legacy.h.

#define RCC_PERIPHCLK_CK48   RCC_PERIPHCLK_CLK48

Definition at line 2741 of file stm32_hal_legacy.h.

#define RCC_PERIPHCLK_DFSDM   RCC_PERIPHCLK_DFSDM1

Definition at line 2759 of file stm32_hal_legacy.h.

#define RCC_RTCCLKSOURCE_NONE   RCC_RTCCLKSOURCE_NO_CLK

Definition at line 2668 of file stm32_hal_legacy.h.

#define RCC_SDIOCLKSOURCE_CK48   RCC_SDIOCLKSOURCE_CLK48

Definition at line 2746 of file stm32_hal_legacy.h.

#define RCC_StopWakeUpClock_HSI   RCC_STOP_WAKEUPCLOCK_HSI

Definition at line 1768 of file stm32_hal_legacy.h.

#define RCC_StopWakeUpClock_MSI   RCC_STOP_WAKEUPCLOCK_MSI

Definition at line 1767 of file stm32_hal_legacy.h.

#define RCC_USBCLK_MSI   RCC_USBCLKSOURCE_MSI

Definition at line 2672 of file stm32_hal_legacy.h.

#define RCC_USBCLK_PLL   RCC_USBCLKSOURCE_PLL

Definition at line 2671 of file stm32_hal_legacy.h.

#define RCC_USBCLK_PLLSAI1   RCC_USBCLKSOURCE_PLLSAI1

Definition at line 2670 of file stm32_hal_legacy.h.

#define RCC_USBCLKSOURCE_PLLCLK   RCC_USBCLKSOURCE_PLL

Definition at line 2673 of file stm32_hal_legacy.h.

#define RCC_USBPLLCLK_DIV1   RCC_USBCLKSOURCE_PLL

Definition at line 2674 of file stm32_hal_legacy.h.

#define RCC_USBPLLCLK_DIV1_5   RCC_USBCLKSOURCE_PLL_DIV1_5

Definition at line 2675 of file stm32_hal_legacy.h.

#define RCC_USBPLLCLK_DIV2   RCC_USBCLKSOURCE_PLL_DIV2

Definition at line 2676 of file stm32_hal_legacy.h.

#define RCC_USBPLLCLK_DIV3   RCC_USBCLKSOURCE_PLL_DIV3

Definition at line 2677 of file stm32_hal_legacy.h.

#define RMVF_BitNumber   RCC_RMVF_BIT_NUMBER

Definition at line 2702 of file stm32_hal_legacy.h.

#define RMVF_BITNUMBER   RCC_RMVF_BIT_NUMBER

Definition at line 2703 of file stm32_hal_legacy.h.

#define RTCEN_BitNumber   RCC_RTCEN_BIT_NUMBER

Definition at line 2690 of file stm32_hal_legacy.h.

#define RTCEN_BITNUMBER   RCC_RTCEN_BIT_NUMBER

Definition at line 2691 of file stm32_hal_legacy.h.

#define RTCRST_BITNUMBER   RCC_RTCRST_BIT_NUMBER

Definition at line 2694 of file stm32_hal_legacy.h.

#define TIMPRE_BitNumber   RCC_TIMPRE_BIT_NUMBER

Definition at line 2701 of file stm32_hal_legacy.h.

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