APB1 Peripheral Clock Enable Disable Status

Get the enable or disable status of the APB1 peripheral clock. More...

Macros
#define	__HAL_RCC_WWDG_IS_CLK_ENABLED()    ((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) != RESET)
#define	__HAL_RCC_PWR_IS_CLK_ENABLED()    ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) != RESET)
#define	__HAL_RCC_WWDG_IS_CLK_DISABLED()    ((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) == RESET)
#define	__HAL_RCC_PWR_IS_CLK_DISABLED()    ((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) == RESET)

Detailed Description

Get the enable or disable status of the APB1 peripheral clock.

Note

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Macro Definition Documentation

#define __HAL_RCC_PWR_IS_CLK_DISABLED

(

)

((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) == RESET)

Definition at line 525 of file stm32f7xx_hal_rcc.h.

#define __HAL_RCC_PWR_IS_CLK_ENABLED

(

)

((RCC->APB1ENR & (RCC_APB1ENR_PWREN)) != RESET)

Definition at line 522 of file stm32f7xx_hal_rcc.h.

#define __HAL_RCC_WWDG_IS_CLK_DISABLED

(

)

((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) == RESET)

Definition at line 524 of file stm32f7xx_hal_rcc.h.

#define __HAL_RCC_WWDG_IS_CLK_ENABLED

(

)

((RCC->APB1ENR & (RCC_APB1ENR_WWDGEN)) != RESET)

Definition at line 521 of file stm32f7xx_hal_rcc.h.