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STM32F769IDiscovery
1.00
uDANTE Audio Networking with STM32F7 DISCO board
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Modules | |
AHB1 Peripheral Clock Enable Disable | |
Enable or disable the AHB1 peripheral clock. | |
APB1 Peripheral Clock Enable Disable | |
Enable or disable the Low Speed APB (APB1) peripheral clock. | |
APB2 Peripheral Clock Enable Disable | |
Enable or disable the High Speed APB (APB2) peripheral clock. | |
AHB1 Peripheral Clock Enable Disable Status | |
Get the enable or disable status of the AHB1 peripheral clock. | |
APB1 Peripheral Clock Enable Disable Status | |
Get the enable or disable status of the APB1 peripheral clock. | |
APB2 Peripheral Clock Enable Disable Status | |
EGet the enable or disable status of the APB2 peripheral clock. | |
RCC Peripheral Clock Force Release | |
Force or release AHB peripheral reset. | |
APB1 Force Release Reset | |
Force or release APB1 peripheral reset. | |
APB2 Force Release Reset | |
Force or release APB2 peripheral reset. | |
RCC Peripheral Clock Sleep Enable Disable | |
AHB1 Peripheral Clock Sleep Enable Disable Status | |
Get the enable or disable status of the AHB1 peripheral clock during Low Power (Sleep) mode. | |
APB1 Peripheral Clock Sleep Enable Disable Status | |
Get the enable or disable status of the APB1 peripheral clock during Low Power (Sleep) mode. | |
APB2 Peripheral Clock Sleep Enable Disable Status | |
Get the enable or disable status of the APB2 peripheral clock during Low Power (Sleep) mode. | |
HSI Configuration | |
LSI Configuration | |
HSE Configuration | |
LSE Configuration | |
RTC Clock Configuration | |
PLL Configuration | |
PLL I2S Configuration | |
Get Clock source | |
RCC Extended MCOx Clock Config | |
Flags Interrupts Management | |
macros to manage the specified RCC Flags and interrupts. | |