APB2 Peripheral Clock Enable Disable Status

EGet the enable or disable status of the APB2 peripheral clock. More...

Macros
#define	__HAL_RCC_SYSCFG_IS_CLK_ENABLED()    ((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) != RESET)
#define	__HAL_RCC_SYSCFG_IS_CLK_DISABLED()    ((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) == RESET)

Detailed Description

EGet the enable or disable status of the APB2 peripheral clock.

Note

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Macro Definition Documentation

#define __HAL_RCC_SYSCFG_IS_CLK_DISABLED

(

)

((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) == RESET)

Definition at line 538 of file stm32f7xx_hal_rcc.h.

#define __HAL_RCC_SYSCFG_IS_CLK_ENABLED

(

)

((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) != RESET)

Definition at line 537 of file stm32f7xx_hal_rcc.h.