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STM32F769IDiscovery
1.00
uDANTE Audio Networking with STM32F7 DISCO board
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Get the enable or disable status of the APB1 peripheral clock during Low Power (Sleep) mode. More...
Macros | |
#define | __HAL_RCC_WWDG_IS_CLK_SLEEP_ENABLED() ((RCC->APB1LPENR & (RCC_APB1LPENR_WWDGLPEN)) != RESET) |
#define | __HAL_RCC_PWR_IS_CLK_SLEEP_ENABLED() ((RCC->APB1LPENR & (RCC_APB1LPENR_PWRLPEN)) != RESET) |
#define | __HAL_RCC_WWDG_IS_CLK_SLEEP_DISABLED() ((RCC->APB1LPENR & (RCC_APB1LPENR_WWDGLPEN)) == RESET) |
#define | __HAL_RCC_PWR_IS_CLK_SLEEP_DISABLED() ((RCC->APB1LPENR & (RCC_APB1LPENR_PWRLPEN)) == RESET) |
Get the enable or disable status of the APB1 peripheral clock during Low Power (Sleep) mode.
#define __HAL_RCC_PWR_IS_CLK_SLEEP_DISABLED | ( | ) | ((RCC->APB1LPENR & (RCC_APB1LPENR_PWRLPEN)) == RESET) |
Definition at line 654 of file stm32f7xx_hal_rcc.h.
#define __HAL_RCC_PWR_IS_CLK_SLEEP_ENABLED | ( | ) | ((RCC->APB1LPENR & (RCC_APB1LPENR_PWRLPEN)) != RESET) |
Definition at line 651 of file stm32f7xx_hal_rcc.h.
#define __HAL_RCC_WWDG_IS_CLK_SLEEP_DISABLED | ( | ) | ((RCC->APB1LPENR & (RCC_APB1LPENR_WWDGLPEN)) == RESET) |
Definition at line 653 of file stm32f7xx_hal_rcc.h.
#define __HAL_RCC_WWDG_IS_CLK_SLEEP_ENABLED | ( | ) | ((RCC->APB1LPENR & (RCC_APB1LPENR_WWDGLPEN)) != RESET) |
Definition at line 650 of file stm32f7xx_hal_rcc.h.