NVIC_Type Struct Reference

Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...

#include <core_cm0.h>

Data Fields
__IOM uint32_t	ISER [1U]
uint32_t	RESERVED0 [31U]
__IOM uint32_t	ICER [1U]
uint32_t	RSERVED1 [31U]
__IOM uint32_t	ISPR [1U]
uint32_t	RESERVED2 [31U]
__IOM uint32_t	ICPR [1U]
uint32_t	RESERVED3 [31U]
uint32_t	RESERVED4 [64U]
__IOM uint32_t	IP [8U]
__IOM uint32_t	IABR [8U]
__IOM uint8_t	IP [240U]
uint32_t	RESERVED5 [644U]
__OM uint32_t	STIR

Detailed Description

Structure type to access the Nested Vectored Interrupt Controller (NVIC).

Definition at line 362 of file core_cm0.h.

Field Documentation

__IOM uint32_t IABR

Offset: 0x200 (R/W) Interrupt Active bit Register

Definition at line 393 of file core_cm3.h.

__IOM uint32_t ICER

Offset: 0x080 (R/W) Interrupt Clear Enable Register

Definition at line 366 of file core_cm0.h.

__IOM uint32_t ICPR

Offset: 0x180 (R/W) Interrupt Clear Pending Register

Definition at line 370 of file core_cm0.h.

__IOM uint8_t IP

Offset: 0x300 (R/W) Interrupt Priority Register

Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide)

Definition at line 373 of file core_cm0.h.

__IOM uint8_t IP[240U]

Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide)

Definition at line 395 of file core_cm3.h.

__IOM uint32_t ISER

Offset: 0x000 (R/W) Interrupt Set Enable Register

Definition at line 364 of file core_cm0.h.

__IOM uint32_t ISPR

Offset: 0x100 (R/W) Interrupt Set Pending Register

Definition at line 368 of file core_cm0.h.

uint32_t RESERVED0

Definition at line 365 of file core_cm0.h.

uint32_t RESERVED2

Definition at line 369 of file core_cm0.h.

uint32_t RESERVED3

Definition at line 371 of file core_cm0.h.

uint32_t RESERVED4

Definition at line 372 of file core_cm0.h.

uint32_t RESERVED5

Definition at line 396 of file core_cm3.h.

uint32_t RSERVED1

Definition at line 367 of file core_cm0.h.

__OM uint32_t STIR

Offset: 0xE00 ( /W) Software Trigger Interrupt Register

Definition at line 397 of file core_cm3.h.

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The documentation for this struct was generated from the following files:

• C:/Users/Torsten/Documents/Eclipse_WS2/STM32F769IDiscovery/CMSIS/core/core_cm0.h
• C:/Users/Torsten/Documents/Eclipse_WS2/STM32F769IDiscovery/CMSIS/core/core_cm0plus.h
• C:/Users/Torsten/Documents/Eclipse_WS2/STM32F769IDiscovery/CMSIS/core/core_cm3.h
• C:/Users/Torsten/Documents/Eclipse_WS2/STM32F769IDiscovery/CMSIS/core/core_cm4.h
• C:/Users/Torsten/Documents/Eclipse_WS2/STM32F769IDiscovery/CMSIS/core/core_cm7.h
• C:/Users/Torsten/Documents/Eclipse_WS2/STM32F769IDiscovery/CMSIS/core/core_sc000.h
• C:/Users/Torsten/Documents/Eclipse_WS2/STM32F769IDiscovery/CMSIS/core/core_sc300.h