STM32F769IDiscovery  1.00
uDANTE Audio Networking with STM32F7 DISCO board
stm32f7xx_hal_cec.h
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1 
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F7xx_HAL_CEC_H
40 #define __STM32F7xx_HAL_CEC_H
41 
42 #ifdef __cplusplus
43  extern "C" {
44 #endif
45 
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f7xx_hal_def.h"
48 
57 /* Exported types ------------------------------------------------------------*/
65 typedef struct
66 {
67  uint32_t SignalFreeTime;
73  uint32_t Tolerance;
77  uint32_t BRERxStop;
81  uint32_t BREErrorBitGen;
86  uint32_t LBPEErrorBitGen;
111  uint32_t ListenMode;
121  uint16_t OwnAddress;
124  uint8_t *RxBuffer;
128 
168 typedef enum
169 {
184 
188 typedef struct
189 {
194  uint8_t *pTxBuffPtr;
196  uint16_t TxXferCount;
198  uint16_t RxXferSize;
202  HAL_CEC_StateTypeDef gState;
206  HAL_CEC_StateTypeDef RxState;
209  uint32_t ErrorCode;
216 /* Exported constants --------------------------------------------------------*/
224 #define HAL_CEC_ERROR_NONE (uint32_t) 0x0000U
225 #define HAL_CEC_ERROR_RXOVR CEC_ISR_RXOVR
226 #define HAL_CEC_ERROR_BRE CEC_ISR_BRE
227 #define HAL_CEC_ERROR_SBPE CEC_ISR_SBPE
228 #define HAL_CEC_ERROR_LBPE CEC_ISR_LBPE
229 #define HAL_CEC_ERROR_RXACKE CEC_ISR_RXACKE
230 #define HAL_CEC_ERROR_ARBLST CEC_ISR_ARBLST
231 #define HAL_CEC_ERROR_TXUDR CEC_ISR_TXUDR
232 #define HAL_CEC_ERROR_TXERR CEC_ISR_TXERR
233 #define HAL_CEC_ERROR_TXACKE CEC_ISR_TXACKE
241 #define CEC_DEFAULT_SFT ((uint32_t)0x00000000U)
242 #define CEC_0_5_BITPERIOD_SFT ((uint32_t)0x00000001U)
243 #define CEC_1_5_BITPERIOD_SFT ((uint32_t)0x00000002U)
244 #define CEC_2_5_BITPERIOD_SFT ((uint32_t)0x00000003U)
245 #define CEC_3_5_BITPERIOD_SFT ((uint32_t)0x00000004U)
246 #define CEC_4_5_BITPERIOD_SFT ((uint32_t)0x00000005U)
247 #define CEC_5_5_BITPERIOD_SFT ((uint32_t)0x00000006U)
248 #define CEC_6_5_BITPERIOD_SFT ((uint32_t)0x00000007U)
249 
256 #define CEC_STANDARD_TOLERANCE ((uint32_t)0x00000000U)
257 #define CEC_EXTENDED_TOLERANCE ((uint32_t)CEC_CFGR_RXTOL)
258 
265 #define CEC_NO_RX_STOP_ON_BRE ((uint32_t)0x00000000U)
266 #define CEC_RX_STOP_ON_BRE ((uint32_t)CEC_CFGR_BRESTP)
267 
274 #define CEC_BRE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000U)
275 #define CEC_BRE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BREGEN)
276 
283 #define CEC_LBPE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000U)
284 #define CEC_LBPE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_LBPEGEN)
285 
292 #define CEC_BROADCASTERROR_ERRORBIT_GENERATION ((uint32_t)0x00000000U)
293 #define CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BRDNOGEN)
294 
301 #define CEC_SFT_START_ON_TXSOM ((uint32_t)0x00000000U)
302 #define CEC_SFT_START_ON_TX_RX_END ((uint32_t)CEC_CFGR_SFTOPT)
303 
310 #define CEC_REDUCED_LISTENING_MODE ((uint32_t)0x00000000U)
311 #define CEC_FULL_LISTENING_MODE ((uint32_t)CEC_CFGR_LSTN)
312 
319 #define CEC_CFGR_OAR_LSB_POS ((uint32_t) 16U)
320 
327 #define CEC_INITIATOR_LSB_POS ((uint32_t) 4U)
328 
335 #define CEC_OWN_ADDRESS_NONE ((uint16_t) 0x0000U) /* Reset value */
336 #define CEC_OWN_ADDRESS_0 ((uint16_t) 0x0001U) /* Logical Address 0 */
337 #define CEC_OWN_ADDRESS_1 ((uint16_t) 0x0002U) /* Logical Address 1 */
338 #define CEC_OWN_ADDRESS_2 ((uint16_t) 0x0004U) /* Logical Address 2 */
339 #define CEC_OWN_ADDRESS_3 ((uint16_t) 0x0008U) /* Logical Address 3 */
340 #define CEC_OWN_ADDRESS_4 ((uint16_t) 0x0010U) /* Logical Address 4 */
341 #define CEC_OWN_ADDRESS_5 ((uint16_t) 0x0020U) /* Logical Address 5 */
342 #define CEC_OWN_ADDRESS_6 ((uint16_t) 0x0040U) /* Logical Address 6 */
343 #define CEC_OWN_ADDRESS_7 ((uint16_t) 0x0080U) /* Logical Address 7 */
344 #define CEC_OWN_ADDRESS_8 ((uint16_t) 0x0100U) /* Logical Address 9 */
345 #define CEC_OWN_ADDRESS_9 ((uint16_t) 0x0200U) /* Logical Address 10 */
346 #define CEC_OWN_ADDRESS_10 ((uint16_t) 0x0400U) /* Logical Address 11 */
347 #define CEC_OWN_ADDRESS_11 ((uint16_t) 0x0800U) /* Logical Address 12 */
348 #define CEC_OWN_ADDRESS_12 ((uint16_t) 0x1000U) /* Logical Address 13 */
349 #define CEC_OWN_ADDRESS_13 ((uint16_t) 0x2000U) /* Logical Address 14 */
350 #define CEC_OWN_ADDRESS_14 ((uint16_t) 0x4000U) /* Logical Address 15 */
351 
358 #define CEC_IT_TXACKE CEC_IER_TXACKEIE
359 #define CEC_IT_TXERR CEC_IER_TXERRIE
360 #define CEC_IT_TXUDR CEC_IER_TXUDRIE
361 #define CEC_IT_TXEND CEC_IER_TXENDIE
362 #define CEC_IT_TXBR CEC_IER_TXBRIE
363 #define CEC_IT_ARBLST CEC_IER_ARBLSTIE
364 #define CEC_IT_RXACKE CEC_IER_RXACKEIE
365 #define CEC_IT_LBPE CEC_IER_LBPEIE
366 #define CEC_IT_SBPE CEC_IER_SBPEIE
367 #define CEC_IT_BRE CEC_IER_BREIE
368 #define CEC_IT_RXOVR CEC_IER_RXOVRIE
369 #define CEC_IT_RXEND CEC_IER_RXENDIE
370 #define CEC_IT_RXBR CEC_IER_RXBRIE
371 
378 #define CEC_FLAG_TXACKE CEC_ISR_TXACKE
379 #define CEC_FLAG_TXERR CEC_ISR_TXERR
380 #define CEC_FLAG_TXUDR CEC_ISR_TXUDR
381 #define CEC_FLAG_TXEND CEC_ISR_TXEND
382 #define CEC_FLAG_TXBR CEC_ISR_TXBR
383 #define CEC_FLAG_ARBLST CEC_ISR_ARBLST
384 #define CEC_FLAG_RXACKE CEC_ISR_RXACKE
385 #define CEC_FLAG_LBPE CEC_ISR_LBPE
386 #define CEC_FLAG_SBPE CEC_ISR_SBPE
387 #define CEC_FLAG_BRE CEC_ISR_BRE
388 #define CEC_FLAG_RXOVR CEC_ISR_RXOVR
389 #define CEC_FLAG_RXEND CEC_ISR_RXEND
390 #define CEC_FLAG_RXBR CEC_ISR_RXBR
391 
398 #define CEC_ISR_ALL_ERROR ((uint32_t)CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|\
399  CEC_ISR_ARBLST|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)
400 
407 #define CEC_IER_RX_ALL_ERR ((uint32_t)CEC_IER_RXACKEIE|CEC_IER_LBPEIE|CEC_IER_SBPEIE|CEC_IER_BREIE|CEC_IER_RXOVRIE)
408 
415 #define CEC_IER_TX_ALL_ERR ((uint32_t)CEC_IER_TXACKEIE|CEC_IER_TXERRIE|CEC_IER_TXUDRIE|CEC_IER_ARBLSTIE)
416 
424 /* Exported macros -----------------------------------------------------------*/
433 #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{ \
434  (__HANDLE__)->gState = HAL_CEC_STATE_RESET; \
435  (__HANDLE__)->RxState = HAL_CEC_STATE_RESET; \
436  } while(0)
437 
456 #define __HAL_CEC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
457 
477 #define __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR |= (__FLAG__))
478 
498 #define __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
499 
519 #define __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
520 
540 #define __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__))
541 
546 #define __HAL_CEC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_CECEN)
547 
552 #define __HAL_CEC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~CEC_CR_CECEN)
553 
558 #define __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXSOM)
559 
565 #define __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXEOM)
566 
571 #define __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXSOM)
572 
577 #define __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXEOM)
578 
583 #define __HAL_CEC_CLEAR_OAR(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_OAR)
584 
591 #define __HAL_CEC_SET_OAR(__HANDLE__,__ADDRESS__) SET_BIT((__HANDLE__)->Instance->CFGR, (__ADDRESS__)<< CEC_CFGR_OAR_LSB_POS)
592 
597 /* Exported functions --------------------------------------------------------*/
605 /* Initialization and de-initialization functions ****************************/
608 HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress);
618 /* I/O operation functions ***************************************************/
619 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress,uint8_t DestinationAddress, uint8_t *pData, uint32_t Size);
621 void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer);
624 void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize);
633 /* Peripheral State functions ************************************************/
634 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec);
635 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec);
644 /* Private types -------------------------------------------------------------*/
653 /* Private variables ---------------------------------------------------------*/
662 /* Private constants ---------------------------------------------------------*/
671 /* Private macros ------------------------------------------------------------*/
676 #define IS_CEC_SIGNALFREETIME(__SFT__) ((__SFT__) <= CEC_CFGR_SFT)
677 
678 #define IS_CEC_TOLERANCE(__RXTOL__) (((__RXTOL__) == CEC_STANDARD_TOLERANCE) || \
679  ((__RXTOL__) == CEC_EXTENDED_TOLERANCE))
680 
681 #define IS_CEC_BRERXSTOP(__BRERXSTOP__) (((__BRERXSTOP__) == CEC_NO_RX_STOP_ON_BRE) || \
682  ((__BRERXSTOP__) == CEC_RX_STOP_ON_BRE))
683 
684 #define IS_CEC_BREERRORBITGEN(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_NO_GENERATION) || \
685  ((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_GENERATION))
686 
687 #define IS_CEC_LBPEERRORBITGEN(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_NO_GENERATION) || \
688  ((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_GENERATION))
689 
690 #define IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_BROADCASTERROR_ERRORBIT_GENERATION) || \
691  ((__ERRORBITGEN__) == CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION))
692 
693 #define IS_CEC_SFTOP(__SFTOP__) (((__SFTOP__) == CEC_SFT_START_ON_TXSOM) || \
694  ((__SFTOP__) == CEC_SFT_START_ON_TX_RX_END))
695 
696 #define IS_CEC_LISTENING_MODE(__MODE__) (((__MODE__) == CEC_REDUCED_LISTENING_MODE) || \
697  ((__MODE__) == CEC_FULL_LISTENING_MODE))
698 
706 #define IS_CEC_MSGSIZE(__SIZE__) ((__SIZE__) <= 0x10)
707 
713 #define IS_CEC_OWN_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x7FFF)
714 
720 #define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xF)
721 
724 /* Private functions ---------------------------------------------------------*/
741 #ifdef __cplusplus
742 }
743 #endif
744 
745 #endif /* __STM32F7xx_HAL_CEC_H */
746 
747 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize)
HAL_CEC_StateTypeDef
HAL CEC State structures definition.
HAL_LockTypeDef Lock
HDMI-CEC.
Definition: stm32f745xx.h:305
void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
CEC handle Structure definition.
HAL_LockTypeDef
HAL Lock structures definition.
CEC_InitTypeDef Init
HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size)
HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
HAL_CEC_StateTypeDef RxState
void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t *Rxbuffer)
HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec)
uint32_t LBPEErrorBitGen
CEC Init Structure definition.
uint32_t BroadcastMsgNoErrorBitGen
void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
uint32_t SignalFreeTimeOption
HAL_CEC_StateTypeDef gState
This file contains HAL common defines, enumeration, macros and structures definitions.
CEC_TypeDef * Instance
HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec)
void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
HAL_StatusTypeDef
HAL Status structures definition.
void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress)
uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec)