STM32F769IDiscovery  1.00
uDANTE Audio Networking with STM32F7 DISCO board
Macros
CEC Private Macros

Macros

#define IS_CEC_SIGNALFREETIME(__SFT__)    ((__SFT__) <= CEC_CFGR_SFT)
 
#define IS_CEC_TOLERANCE(__RXTOL__)
 
#define IS_CEC_BRERXSTOP(__BRERXSTOP__)
 
#define IS_CEC_BREERRORBITGEN(__ERRORBITGEN__)
 
#define IS_CEC_LBPEERRORBITGEN(__ERRORBITGEN__)
 
#define IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(__ERRORBITGEN__)
 
#define IS_CEC_SFTOP(__SFTOP__)
 
#define IS_CEC_LISTENING_MODE(__MODE__)
 
#define IS_CEC_MSGSIZE(__SIZE__)   ((__SIZE__) <= 0x10)
 Check CEC message size. The message size is the payload size: without counting the header, it varies from 0 byte (ping operation, one header only, no payload) to 15 bytes (1 opcode and up to 14 operands following the header). More...
 
#define IS_CEC_OWN_ADDRESS(__ADDRESS__)   ((__ADDRESS__) <= 0x7FFF)
 Check CEC device Own Address Register (OAR) setting. OAR address is written in a 15-bit field within CEC_CFGR register. More...
 
#define IS_CEC_ADDRESS(__ADDRESS__)   ((__ADDRESS__) <= 0xF)
 Check CEC initiator or destination logical address setting. Initiator and destination addresses are coded over 4 bits. More...
 

Detailed Description

Macro Definition Documentation

#define IS_CEC_ADDRESS (   __ADDRESS__)    ((__ADDRESS__) <= 0xF)

Check CEC initiator or destination logical address setting. Initiator and destination addresses are coded over 4 bits.

Parameters
<strong>ADDRESS</strong>CEC initiator or logical address.
Return values
Testresult (TRUE or FALSE).

Definition at line 720 of file stm32f7xx_hal_cec.h.

#define IS_CEC_BREERRORBITGEN (   __ERRORBITGEN__)
Value:
(((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_NO_GENERATION) || \
((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_GENERATION))
#define CEC_BRE_ERRORBIT_NO_GENERATION
#define CEC_BRE_ERRORBIT_GENERATION

Definition at line 684 of file stm32f7xx_hal_cec.h.

#define IS_CEC_BRERXSTOP (   __BRERXSTOP__)
Value:
(((__BRERXSTOP__) == CEC_NO_RX_STOP_ON_BRE) || \
((__BRERXSTOP__) == CEC_RX_STOP_ON_BRE))
#define CEC_NO_RX_STOP_ON_BRE
#define CEC_RX_STOP_ON_BRE

Definition at line 681 of file stm32f7xx_hal_cec.h.

#define IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION (   __ERRORBITGEN__)
Value:
(((__ERRORBITGEN__) == CEC_BROADCASTERROR_ERRORBIT_GENERATION) || \
#define CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION
#define CEC_BROADCASTERROR_ERRORBIT_GENERATION

Definition at line 690 of file stm32f7xx_hal_cec.h.

#define IS_CEC_LBPEERRORBITGEN (   __ERRORBITGEN__)
Value:
(((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_NO_GENERATION) || \
((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_GENERATION))
#define CEC_LBPE_ERRORBIT_GENERATION
#define CEC_LBPE_ERRORBIT_NO_GENERATION

Definition at line 687 of file stm32f7xx_hal_cec.h.

#define IS_CEC_LISTENING_MODE (   __MODE__)
Value:
(((__MODE__) == CEC_REDUCED_LISTENING_MODE) || \
((__MODE__) == CEC_FULL_LISTENING_MODE))
#define CEC_REDUCED_LISTENING_MODE
#define CEC_FULL_LISTENING_MODE

Definition at line 696 of file stm32f7xx_hal_cec.h.

#define IS_CEC_MSGSIZE (   __SIZE__)    ((__SIZE__) <= 0x10)

Check CEC message size. The message size is the payload size: without counting the header, it varies from 0 byte (ping operation, one header only, no payload) to 15 bytes (1 opcode and up to 14 operands following the header).

Parameters
<strong>SIZE</strong>CEC message size.
Return values
Testresult (TRUE or FALSE).

Definition at line 706 of file stm32f7xx_hal_cec.h.

#define IS_CEC_OWN_ADDRESS (   __ADDRESS__)    ((__ADDRESS__) <= 0x7FFF)

Check CEC device Own Address Register (OAR) setting. OAR address is written in a 15-bit field within CEC_CFGR register.

Parameters
<strong>ADDRESS</strong>CEC own address.
Return values
Testresult (TRUE or FALSE).

Definition at line 713 of file stm32f7xx_hal_cec.h.

#define IS_CEC_SFTOP (   __SFTOP__)
Value:
(((__SFTOP__) == CEC_SFT_START_ON_TXSOM) || \
((__SFTOP__) == CEC_SFT_START_ON_TX_RX_END))
#define CEC_SFT_START_ON_TXSOM
#define CEC_SFT_START_ON_TX_RX_END

Definition at line 693 of file stm32f7xx_hal_cec.h.

#define IS_CEC_SIGNALFREETIME (   __SFT__)    ((__SFT__) <= CEC_CFGR_SFT)

Definition at line 676 of file stm32f7xx_hal_cec.h.

#define IS_CEC_TOLERANCE (   __RXTOL__)
Value:
(((__RXTOL__) == CEC_STANDARD_TOLERANCE) || \
((__RXTOL__) == CEC_EXTENDED_TOLERANCE))
#define CEC_STANDARD_TOLERANCE
#define CEC_EXTENDED_TOLERANCE

Definition at line 678 of file stm32f7xx_hal_cec.h.