STM32F769IDiscovery  1.00
uDANTE Audio Networking with STM32F7 DISCO board
Data Fields
DSI_TypeDef Struct Reference

DSI Controller. More...

#include <stm32f769xx.h>

Data Fields

__IO uint32_t VR
 
__IO uint32_t CR
 
__IO uint32_t CCR
 
__IO uint32_t LVCIDR
 
__IO uint32_t LCOLCR
 
__IO uint32_t LPCR
 
__IO uint32_t LPMCR
 
uint32_t RESERVED0 [4]
 
__IO uint32_t PCR
 
__IO uint32_t GVCIDR
 
__IO uint32_t MCR
 
__IO uint32_t VMCR
 
__IO uint32_t VPCR
 
__IO uint32_t VCCR
 
__IO uint32_t VNPCR
 
__IO uint32_t VHSACR
 
__IO uint32_t VHBPCR
 
__IO uint32_t VLCR
 
__IO uint32_t VVSACR
 
__IO uint32_t VVBPCR
 
__IO uint32_t VVFPCR
 
__IO uint32_t VVACR
 
__IO uint32_t LCCR
 
__IO uint32_t CMCR
 
__IO uint32_t GHCR
 
__IO uint32_t GPDR
 
__IO uint32_t GPSR
 
__IO uint32_t TCCR [6]
 
__IO uint32_t TDCR
 
__IO uint32_t CLCR
 
__IO uint32_t CLTCR
 
__IO uint32_t DLTCR
 
__IO uint32_t PCTLR
 
__IO uint32_t PCONFR
 
__IO uint32_t PUCR
 
__IO uint32_t PTTCR
 
__IO uint32_t PSR
 
uint32_t RESERVED1 [2]
 
__IO uint32_t ISR [2]
 
__IO uint32_t IER [2]
 
uint32_t RESERVED2 [3]
 
__IO uint32_t FIR [2]
 
uint32_t RESERVED3 [8]
 
__IO uint32_t VSCR
 
uint32_t RESERVED4 [2]
 
__IO uint32_t LCVCIDR
 
__IO uint32_t LCCCR
 
uint32_t RESERVED5
 
__IO uint32_t LPMCCR
 
uint32_t RESERVED6 [7]
 
__IO uint32_t VMCCR
 
__IO uint32_t VPCCR
 
__IO uint32_t VCCCR
 
__IO uint32_t VNPCCR
 
__IO uint32_t VHSACCR
 
__IO uint32_t VHBPCCR
 
__IO uint32_t VLCCR
 
__IO uint32_t VVSACCR
 
__IO uint32_t VVBPCCR
 
__IO uint32_t VVFPCCR
 
__IO uint32_t VVACCR
 
uint32_t RESERVED7 [11]
 
__IO uint32_t TDCCR
 
uint32_t RESERVED8 [155]
 
__IO uint32_t WCFGR
 
__IO uint32_t WCR
 
__IO uint32_t WIER
 
__IO uint32_t WISR
 
__IO uint32_t WIFCR
 
uint32_t RESERVED9
 
__IO uint32_t WPCR [5]
 
uint32_t RESERVED10
 
__IO uint32_t WRPCR
 

Detailed Description

DSI Controller.

Definition at line 1313 of file stm32f769xx.h.

Field Documentation

__IO uint32_t CCR

DSI HOST Clock Control Register, Address offset: 0x08

Definition at line 1317 of file stm32f769xx.h.

__IO uint32_t CLCR

DSI Host Clock Lane Configuration Register, Address offset: 0x94

Definition at line 1344 of file stm32f769xx.h.

__IO uint32_t CLTCR

DSI Host Clock Lane Timer Configuration Register, Address offset: 0x98

Definition at line 1345 of file stm32f769xx.h.

__IO uint32_t CMCR

DSI Host Command Mode Configuration Register, Address offset: 0x68

Definition at line 1338 of file stm32f769xx.h.

__IO uint32_t CR

DSI Host Control Register, Address offset: 0x04

Definition at line 1316 of file stm32f769xx.h.

__IO uint32_t DLTCR

DSI Host Data Lane Timer Configuration Register, Address offset: 0x9C

Definition at line 1346 of file stm32f769xx.h.

__IO uint32_t FIR

DSI Host Force Interrupt Register, Address offset: 0xD8-0xDF

Definition at line 1356 of file stm32f769xx.h.

__IO uint32_t GHCR

DSI Host Generic Header Configuration Register, Address offset: 0x6C

Definition at line 1339 of file stm32f769xx.h.

__IO uint32_t GPDR

DSI Host Generic Payload Data Register, Address offset: 0x70

Definition at line 1340 of file stm32f769xx.h.

__IO uint32_t GPSR

DSI Host Generic Packet Status Register, Address offset: 0x74

Definition at line 1341 of file stm32f769xx.h.

__IO uint32_t GVCIDR

DSI Host Generic VCID Register, Address offset: 0x30

Definition at line 1324 of file stm32f769xx.h.

__IO uint32_t IER

DSI Host Interrupt Enable Register, Address offset: 0xC4-0xCB

Definition at line 1354 of file stm32f769xx.h.

__IO uint32_t ISR

DSI Host Interrupt & Status Register, Address offset: 0xBC-0xC3

Definition at line 1353 of file stm32f769xx.h.

__IO uint32_t LCCCR

DSI Host LTDC Current Color Coding Register, Address offset: 0x110

Definition at line 1361 of file stm32f769xx.h.

__IO uint32_t LCCR

DSI Host LTDC Command Configuration Register, Address offset: 0x64

Definition at line 1337 of file stm32f769xx.h.

__IO uint32_t LCOLCR

DSI Host LTDC Color Coding Register, Address offset: 0x10

Definition at line 1319 of file stm32f769xx.h.

__IO uint32_t LCVCIDR

DSI Host LTDC Current VCID Register, Address offset: 0x10C

Definition at line 1360 of file stm32f769xx.h.

__IO uint32_t LPCR

DSI Host LTDC Polarity Configuration Register, Address offset: 0x14

Definition at line 1320 of file stm32f769xx.h.

__IO uint32_t LPMCCR

DSI Host Low-power Mode Current Configuration Register, Address offset: 0x118

Definition at line 1363 of file stm32f769xx.h.

__IO uint32_t LPMCR

DSI Host Low-Power Mode Configuration Register, Address offset: 0x18

Definition at line 1321 of file stm32f769xx.h.

__IO uint32_t LVCIDR

DSI Host LTDC VCID Register, Address offset: 0x0C

Definition at line 1318 of file stm32f769xx.h.

__IO uint32_t MCR

DSI Host Mode Configuration Register, Address offset: 0x34

Definition at line 1325 of file stm32f769xx.h.

__IO uint32_t PCONFR

DSI Host PHY Configuration Register, Address offset: 0xA4

Definition at line 1348 of file stm32f769xx.h.

__IO uint32_t PCR

DSI Host Protocol Configuration Register, Address offset: 0x2C

Definition at line 1323 of file stm32f769xx.h.

__IO uint32_t PCTLR

DSI Host PHY Control Register, Address offset: 0xA0

Definition at line 1347 of file stm32f769xx.h.

__IO uint32_t PSR

DSI Host PHY Status Register, Address offset: 0xB0

Definition at line 1351 of file stm32f769xx.h.

__IO uint32_t PTTCR

DSI Host PHY TX Triggers Configuration Register, Address offset: 0xAC

Definition at line 1350 of file stm32f769xx.h.

__IO uint32_t PUCR

DSI Host PHY ULPS Control Register, Address offset: 0xA8

Definition at line 1349 of file stm32f769xx.h.

uint32_t RESERVED0

Reserved, 0x1C - 0x2B

Definition at line 1322 of file stm32f769xx.h.

uint32_t RESERVED1

Reserved, 0xB4 - 0xBB

Definition at line 1352 of file stm32f769xx.h.

uint32_t RESERVED10

Reserved, 0x42C

Definition at line 1386 of file stm32f769xx.h.

uint32_t RESERVED2

Reserved, 0xD0 - 0xD7

Definition at line 1355 of file stm32f769xx.h.

uint32_t RESERVED3

Reserved, 0xE0 - 0xFF

Definition at line 1357 of file stm32f769xx.h.

uint32_t RESERVED4

Reserved, 0x104 - 0x10B

Definition at line 1359 of file stm32f769xx.h.

uint32_t RESERVED5

Reserved, 0x114

Definition at line 1362 of file stm32f769xx.h.

uint32_t RESERVED6

Reserved, 0x11C - 0x137

Definition at line 1364 of file stm32f769xx.h.

uint32_t RESERVED7

Reserved, 0x164 - 0x18F

Definition at line 1376 of file stm32f769xx.h.

uint32_t RESERVED8

Reserved, 0x194 - 0x3FF

Definition at line 1378 of file stm32f769xx.h.

uint32_t RESERVED9

Reserved, 0x414

Definition at line 1384 of file stm32f769xx.h.

__IO uint32_t TCCR

DSI Host Timeout Counter Configuration Register, Address offset: 0x78-0x8F

Definition at line 1342 of file stm32f769xx.h.

__IO uint32_t TDCCR

DSI Host 3D Current Configuration Register, Address offset: 0x190

Definition at line 1377 of file stm32f769xx.h.

__IO uint32_t TDCR

DSI Host 3D Configuration Register, Address offset: 0x90

Definition at line 1343 of file stm32f769xx.h.

__IO uint32_t VCCCR

DSI Host Video Chuncks Current Configuration Register, Address offset: 0x140

Definition at line 1367 of file stm32f769xx.h.

__IO uint32_t VCCR

DSI Host Video Chunks Configuration Register, Address offset: 0x40

Definition at line 1328 of file stm32f769xx.h.

__IO uint32_t VHBPCCR

DSI Host Video HBP Current Configuration Register, Address offset: 0x14C

Definition at line 1370 of file stm32f769xx.h.

__IO uint32_t VHBPCR

DSI Host Video HBP Configuration Register, Address offset: 0x4C

Definition at line 1331 of file stm32f769xx.h.

__IO uint32_t VHSACCR

DSI Host Video HSA Current Configuration Register, Address offset: 0x148

Definition at line 1369 of file stm32f769xx.h.

__IO uint32_t VHSACR

DSI Host Video HSA Configuration Register, Address offset: 0x48

Definition at line 1330 of file stm32f769xx.h.

__IO uint32_t VLCCR

DSI Host Video Line Current Configuration Register, Address offset: 0x150

Definition at line 1371 of file stm32f769xx.h.

__IO uint32_t VLCR

DSI Host Video Line Configuration Register, Address offset: 0x50

Definition at line 1332 of file stm32f769xx.h.

__IO uint32_t VMCCR

DSI Host Video Mode Current Configuration Register, Address offset: 0x138

Definition at line 1365 of file stm32f769xx.h.

__IO uint32_t VMCR

DSI Host Video Mode Configuration Register, Address offset: 0x38

Definition at line 1326 of file stm32f769xx.h.

__IO uint32_t VNPCCR

DSI Host Video Null Packet Current Configuration Register, Address offset: 0x144

Definition at line 1368 of file stm32f769xx.h.

__IO uint32_t VNPCR

DSI Host Video Null Packet Configuration Register, Address offset: 0x44

Definition at line 1329 of file stm32f769xx.h.

__IO uint32_t VPCCR

DSI Host Video Packet Current Configuration Register, Address offset: 0x13C

Definition at line 1366 of file stm32f769xx.h.

__IO uint32_t VPCR

DSI Host Video Packet Configuration Register, Address offset: 0x3C

Definition at line 1327 of file stm32f769xx.h.

__IO uint32_t VR

DSI Host Version Register, Address offset: 0x00

Definition at line 1315 of file stm32f769xx.h.

__IO uint32_t VSCR

DSI Host Video Shadow Control Register, Address offset: 0x100

Definition at line 1358 of file stm32f769xx.h.

__IO uint32_t VVACCR

DSI Host Video VA Current Configuration Register, Address offset: 0x160

Definition at line 1375 of file stm32f769xx.h.

__IO uint32_t VVACR

DSI Host Video VA Configuration Register, Address offset: 0x60

Definition at line 1336 of file stm32f769xx.h.

__IO uint32_t VVBPCCR

DSI Host Video VBP Current Configuration Register, Address offset: 0x158

Definition at line 1373 of file stm32f769xx.h.

__IO uint32_t VVBPCR

DSI Host Video VBP Configuration Register, Address offset: 0x58

Definition at line 1334 of file stm32f769xx.h.

__IO uint32_t VVFPCCR

DSI Host Video VFP Current Configuration Register, Address offset: 0x15C

Definition at line 1374 of file stm32f769xx.h.

__IO uint32_t VVFPCR

DSI Host Video VFP Configuration Register, Address offset: 0x5C

Definition at line 1335 of file stm32f769xx.h.

__IO uint32_t VVSACCR

DSI Host Video VSA Current Configuration Register, Address offset: 0x154

Definition at line 1372 of file stm32f769xx.h.

__IO uint32_t VVSACR

DSI Host Video VSA Configuration Register, Address offset: 0x54

Definition at line 1333 of file stm32f769xx.h.

__IO uint32_t WCFGR

DSI Wrapper Configuration Register, Address offset: 0x400

Definition at line 1379 of file stm32f769xx.h.

__IO uint32_t WCR

DSI Wrapper Control Register, Address offset: 0x404

Definition at line 1380 of file stm32f769xx.h.

__IO uint32_t WIER

DSI Wrapper Interrupt Enable Register, Address offset: 0x408

Definition at line 1381 of file stm32f769xx.h.

__IO uint32_t WIFCR

DSI Wrapper Interrupt Flag Clear Register, Address offset: 0x410

Definition at line 1383 of file stm32f769xx.h.

__IO uint32_t WISR

DSI Wrapper Interrupt and Status Register, Address offset: 0x40C

Definition at line 1382 of file stm32f769xx.h.

__IO uint32_t WPCR

DSI Wrapper PHY Configuration Register, Address offset: 0x418-0x42B

Definition at line 1385 of file stm32f769xx.h.

__IO uint32_t WRPCR

DSI Wrapper Regulator and PLL Control Register, Address offset: 0x430

Definition at line 1387 of file stm32f769xx.h.


The documentation for this struct was generated from the following files: