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stm32f7xx_hal_spi.h
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1 
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F7xx_HAL_SPI_H
40 #define __STM32F7xx_HAL_SPI_H
41 
42 #ifdef __cplusplus
43  extern "C" {
44 #endif
45 
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f7xx_hal_def.h"
48 
57 /* Exported types ------------------------------------------------------------*/
65 typedef struct
66 {
67  uint32_t Mode;
70  uint32_t Direction;
73  uint32_t DataSize;
76  uint32_t CLKPolarity;
79  uint32_t CLKPhase;
82  uint32_t NSS;
86  uint32_t BaudRatePrescaler;
92  uint32_t FirstBit;
95  uint32_t TIMode;
98  uint32_t CRCCalculation;
101  uint32_t CRCPolynomial;
104  uint32_t CRCLength;
108  uint32_t NSSPMode;
115 
119 typedef enum
120 {
129 
133 typedef struct __SPI_HandleTypeDef
134 {
135  SPI_TypeDef *Instance; /* SPI registers base address */
136 
137  SPI_InitTypeDef Init; /* SPI communication parameters */
138 
139  uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
140 
141  uint16_t TxXferSize; /* SPI Tx Transfer size */
142 
143  uint16_t TxXferCount; /* SPI Tx Transfer Counter */
144 
145  uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
146 
147  uint16_t RxXferSize; /* SPI Rx Transfer size */
148 
149  uint16_t RxXferCount; /* SPI Rx Transfer Counter */
150 
151  uint32_t CRCSize; /* SPI CRC size used for the transfer */
152 
153  void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Rx IRQ handler */
154 
155  void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Tx IRQ handler */
156 
157  DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA Handle parameters */
158 
159  DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA Handle parameters */
160 
161  HAL_LockTypeDef Lock; /* Locking object */
162 
163  __IO HAL_SPI_StateTypeDef State; /* SPI communication state */
164 
165  __IO uint32_t ErrorCode; /* SPI Error code */
166 
168 
173 /* Exported constants --------------------------------------------------------*/
174 
182 #define HAL_SPI_ERROR_NONE ((uint32_t)0x00000000U)
183 #define HAL_SPI_ERROR_MODF ((uint32_t)0x00000001U)
184 #define HAL_SPI_ERROR_CRC ((uint32_t)0x00000002U)
185 #define HAL_SPI_ERROR_OVR ((uint32_t)0x00000004U)
186 #define HAL_SPI_ERROR_FRE ((uint32_t)0x00000008U)
187 #define HAL_SPI_ERROR_DMA ((uint32_t)0x00000010U)
188 #define HAL_SPI_ERROR_FLAG ((uint32_t)0x00000020U)
189 #define HAL_SPI_ERROR_UNKNOW ((uint32_t)0x00000040U)
198 #define SPI_MODE_SLAVE ((uint32_t)0x00000000U)
199 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
200 
207 #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000U)
208 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
209 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
210 
217 #define SPI_DATASIZE_4BIT ((uint32_t)0x0300U)
218 #define SPI_DATASIZE_5BIT ((uint32_t)0x0400U)
219 #define SPI_DATASIZE_6BIT ((uint32_t)0x0500U)
220 #define SPI_DATASIZE_7BIT ((uint32_t)0x0600U)
221 #define SPI_DATASIZE_8BIT ((uint32_t)0x0700U)
222 #define SPI_DATASIZE_9BIT ((uint32_t)0x0800U)
223 #define SPI_DATASIZE_10BIT ((uint32_t)0x0900U)
224 #define SPI_DATASIZE_11BIT ((uint32_t)0x0A00U)
225 #define SPI_DATASIZE_12BIT ((uint32_t)0x0B00U)
226 #define SPI_DATASIZE_13BIT ((uint32_t)0x0C00U)
227 #define SPI_DATASIZE_14BIT ((uint32_t)0x0D00U)
228 #define SPI_DATASIZE_15BIT ((uint32_t)0x0E00U)
229 #define SPI_DATASIZE_16BIT ((uint32_t)0x0F00U)
230 
237 #define SPI_POLARITY_LOW ((uint32_t)0x00000000U)
238 #define SPI_POLARITY_HIGH SPI_CR1_CPOL
239 
246 #define SPI_PHASE_1EDGE ((uint32_t)0x00000000U)
247 #define SPI_PHASE_2EDGE SPI_CR1_CPHA
248 
255 #define SPI_NSS_SOFT SPI_CR1_SSM
256 #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000U)
257 #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000U)
258 
265 #define SPI_NSS_PULSE_ENABLE SPI_CR2_NSSP
266 #define SPI_NSS_PULSE_DISABLE ((uint32_t)0x00000000U)
267 
274 #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000U)
275 #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008U)
276 #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010U)
277 #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018U)
278 #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020U)
279 #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028U)
280 #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030U)
281 #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038U)
282 
289 #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000U)
290 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
291 
298 #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000U)
299 #define SPI_TIMODE_ENABLE SPI_CR2_FRF
300 
307 #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000U)
308 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
309 
320 #define SPI_CRC_LENGTH_DATASIZE ((uint32_t)0x00000000U)
321 #define SPI_CRC_LENGTH_8BIT ((uint32_t)0x00000001U)
322 #define SPI_CRC_LENGTH_16BIT ((uint32_t)0x00000002U)
323 
335 #define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH
336 #define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH
337 #define SPI_RXFIFO_THRESHOLD_HF ((uint32_t)0x00000000U)
338 
349 #define SPI_IT_TXE SPI_CR2_TXEIE
350 #define SPI_IT_RXNE SPI_CR2_RXNEIE
351 #define SPI_IT_ERR SPI_CR2_ERRIE
352 
364 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */
365 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */
366 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */
367 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
368 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */
369 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */
370 #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */
371 #define SPI_FLAG_FTLVL SPI_SR_FTLVL /* SPI fifo transmission level */
372 #define SPI_FLAG_FRLVL SPI_SR_FRLVL /* SPI fifo reception level */
373 
380 #define SPI_FTLVL_EMPTY ((uint32_t)0x0000U)
381 #define SPI_FTLVL_QUARTER_FULL ((uint32_t)0x0800U)
382 #define SPI_FTLVL_HALF_FULL ((uint32_t)0x1000U)
383 #define SPI_FTLVL_FULL ((uint32_t)0x1800U)
384 
392 #define SPI_FRLVL_EMPTY ((uint32_t)0x0000U)
393 #define SPI_FRLVL_QUARTER_FULL ((uint32_t)0x0200U)
394 #define SPI_FRLVL_HALF_FULL ((uint32_t)0x0400U)
395 #define SPI_FRLVL_FULL ((uint32_t)0x0600U)
396 
404 /* Exported macros ------------------------------------------------------------*/
413 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
414 
425 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
426 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
427 
438 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
439 
456 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
457 
463 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
464 
471 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
472  do{ \
473  __IO uint32_t tmpreg; \
474  tmpreg = (__HANDLE__)->Instance->SR; \
475  (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
476  UNUSED(tmpreg); \
477  } while(0)
478 
485 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
486  do{ \
487  __IO uint32_t tmpreg; \
488  tmpreg = (__HANDLE__)->Instance->DR; \
489  tmpreg = (__HANDLE__)->Instance->SR; \
490  UNUSED(tmpreg); \
491  } while(0)
492 
499 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
500  do{ \
501  __IO uint32_t tmpreg; \
502  tmpreg = (__HANDLE__)->Instance->SR; \
503  UNUSED(tmpreg); \
504  } while(0)
505 
511 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
512 
518 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE))
519 
524 /* Private macros --------------------------------------------------------*/
534 #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
535 
541 #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE))
542 
548 #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\
549  (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
550 
551 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
552  ((MODE) == SPI_MODE_MASTER))
553 
554 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
555  ((MODE) == SPI_DIRECTION_2LINES_RXONLY) ||\
556  ((MODE) == SPI_DIRECTION_1LINE))
557 
558 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
559 
560 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \
561  ((MODE) == SPI_DIRECTION_1LINE))
562 
563 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
564  ((DATASIZE) == SPI_DATASIZE_15BIT) || \
565  ((DATASIZE) == SPI_DATASIZE_14BIT) || \
566  ((DATASIZE) == SPI_DATASIZE_13BIT) || \
567  ((DATASIZE) == SPI_DATASIZE_12BIT) || \
568  ((DATASIZE) == SPI_DATASIZE_11BIT) || \
569  ((DATASIZE) == SPI_DATASIZE_10BIT) || \
570  ((DATASIZE) == SPI_DATASIZE_9BIT) || \
571  ((DATASIZE) == SPI_DATASIZE_8BIT) || \
572  ((DATASIZE) == SPI_DATASIZE_7BIT) || \
573  ((DATASIZE) == SPI_DATASIZE_6BIT) || \
574  ((DATASIZE) == SPI_DATASIZE_5BIT) || \
575  ((DATASIZE) == SPI_DATASIZE_4BIT))
576 
577 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
578  ((CPOL) == SPI_POLARITY_HIGH))
579 
580 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
581  ((CPHA) == SPI_PHASE_2EDGE))
582 
583 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
584  ((NSS) == SPI_NSS_HARD_INPUT) || \
585  ((NSS) == SPI_NSS_HARD_OUTPUT))
586 
587 #define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLE) || \
588  ((NSSP) == SPI_NSS_PULSE_DISABLE))
589 
590 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
591  ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
592  ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
593  ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
594  ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
595  ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
596  ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
597  ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
598 
599 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
600  ((BIT) == SPI_FIRSTBIT_LSB))
601 
602 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \
603  ((MODE) == SPI_TIMODE_ENABLE))
604 
605 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \
606  ((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
607 
608 #define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRC_LENGTH_DATASIZE) ||\
609  ((LENGTH) == SPI_CRC_LENGTH_8BIT) || \
610  ((LENGTH) == SPI_CRC_LENGTH_16BIT))
611 
612 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF) && (((POLYNOMIAL)&0x1) != 0))
613 
614 
619 /* Exported functions --------------------------------------------------------*/
628 /* Initialization and de-initialization functions ****************************/
641 /* IO operation functions *****************************************************/
642 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
643 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
644 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
645 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
646 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
647 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
648 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
649 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
650 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
654 
671 /* Peripheral State and Error functions ***************************************/
672 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
673 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
690 #ifdef __cplusplus
691 }
692 #endif
693 
694 #endif /* __STM32F7xx_HAL_SPI_H */
695 
696 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
Serial Peripheral Interface.
Definition: stm32f745xx.h:841
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
HAL_LockTypeDef Lock
void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
__IO HAL_SPI_StateTypeDef State
HAL_LockTypeDef
HAL Lock structures definition.
void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
SPI_InitTypeDef Init
struct __SPI_HandleTypeDef SPI_HandleTypeDef
SPI handle Structure definition.
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
DMA_HandleTypeDef * hdmatx
SPI handle Structure definition.
#define __IO
Definition: core_cm0.h:213
uint32_t BaudRatePrescaler
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
SPI Configuration Structure definition.
void(* RxISR)(struct __SPI_HandleTypeDef *hspi)
void(* TxISR)(struct __SPI_HandleTypeDef *hspi)
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
DMA handle Structure definition.
This file contains HAL common defines, enumeration, macros and structures definitions.
void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef
HAL Status structures definition.
HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_SPI_StateTypeDef
HAL State structures definition.
DMA_HandleTypeDef * hdmarx
void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)