stm32f7xx_hal_dma2d.h

Go to the documentation of this file.

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F7xx_HAL_DMA2D_H
#define __STM32F7xx_HAL_DMA2D_H

#ifdef __cplusplus
 extern "C" {
#endif

/* Includes ------------------------------------------------------------------*/
#include "stm32f7xx_hal_def.h"

/* Exported types ------------------------------------------------------------*/
#define MAX_DMA2D_LAYER  2

typedef struct
{
  uint32_t Blue;               
  uint32_t Green;              
  uint32_t Red;                
} DMA2D_ColorTypeDef;

typedef struct
{
  uint32_t *pCLUT;                  
  uint32_t CLUTColorMode;           
  uint32_t Size;                    
} DMA2D_CLUTCfgTypeDef;

typedef struct
{
  uint32_t             Mode;               
  uint32_t             ColorMode;          
  uint32_t             OutputOffset;       
#if defined (DMA2D_OPFCCR_AI)
  uint32_t             AlphaInverted;     
#endif /* DMA2D_OPFCCR_AI */  

#if defined (DMA2D_OPFCCR_RBS) 
  uint32_t             RedBlueSwap;       
#endif /* DMA2D_OPFCCR_RBS */
  
} DMA2D_InitTypeDef;


typedef struct
{
  uint32_t             InputOffset;       
  uint32_t             InputColorMode;    
  uint32_t             AlphaMode;         
  uint32_t             InputAlpha;        
#if defined (DMA2D_FGPFCCR_AI) && defined (DMA2D_BGPFCCR_AI) 
  uint32_t             AlphaInverted;     
#endif /* (DMA2D_FGPFCCR_AI) && (DMA2D_BGPFCCR_AI)  */   

#if defined (DMA2D_FGPFCCR_RBS) && defined (DMA2D_BGPFCCR_RBS)   
  uint32_t             RedBlueSwap;       
#endif /* (DMA2D_FGPFCCR_RBS) && (DMA2D_BGPFCCR_RBS)  */
  
} DMA2D_LayerCfgTypeDef;

typedef enum
{
  HAL_DMA2D_STATE_RESET             = 0x00U,    
  HAL_DMA2D_STATE_READY             = 0x01U,    
  HAL_DMA2D_STATE_BUSY              = 0x02U,    
  HAL_DMA2D_STATE_TIMEOUT           = 0x03U,    
  HAL_DMA2D_STATE_ERROR             = 0x04U,    
  HAL_DMA2D_STATE_SUSPEND           = 0x05U     
}HAL_DMA2D_StateTypeDef;

typedef struct __DMA2D_HandleTypeDef
{
  DMA2D_TypeDef               *Instance;                                                    
  DMA2D_InitTypeDef           Init;                                                         
  void                        (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d);  
  void                        (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); 
  DMA2D_LayerCfgTypeDef       LayerCfg[MAX_DMA2D_LAYER];                                    
  HAL_LockTypeDef             Lock;                                                         
  __IO HAL_DMA2D_StateTypeDef State;                                                        
  __IO uint32_t               ErrorCode;                                                    
} DMA2D_HandleTypeDef;
/* Exported constants --------------------------------------------------------*/
#define HAL_DMA2D_ERROR_NONE        ((uint32_t)0x00000000U)  
#define HAL_DMA2D_ERROR_TE          ((uint32_t)0x00000001U)  
#define HAL_DMA2D_ERROR_CE          ((uint32_t)0x00000002U)  
#define HAL_DMA2D_ERROR_CAE         ((uint32_t)0x00000004U)  
#define HAL_DMA2D_ERROR_TIMEOUT     ((uint32_t)0x00000020U)  
#define DMA2D_M2M                   ((uint32_t)0x00000000U)  
#define DMA2D_M2M_PFC               DMA2D_CR_MODE_0          
#define DMA2D_M2M_BLEND             DMA2D_CR_MODE_1          
#define DMA2D_R2M                   DMA2D_CR_MODE            
#define DMA2D_OUTPUT_ARGB8888       ((uint32_t)0x00000000U)               
#define DMA2D_OUTPUT_RGB888         DMA2D_OPFCCR_CM_0                     
#define DMA2D_OUTPUT_RGB565         DMA2D_OPFCCR_CM_1                     
#define DMA2D_OUTPUT_ARGB1555       (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) 
#define DMA2D_OUTPUT_ARGB4444       DMA2D_OPFCCR_CM_2                     
#define DMA2D_INPUT_ARGB8888        ((uint32_t)0x00000000U)  
#define DMA2D_INPUT_RGB888          ((uint32_t)0x00000001U)  
#define DMA2D_INPUT_RGB565          ((uint32_t)0x00000002U)  
#define DMA2D_INPUT_ARGB1555        ((uint32_t)0x00000003U)  
#define DMA2D_INPUT_ARGB4444        ((uint32_t)0x00000004U)  
#define DMA2D_INPUT_L8              ((uint32_t)0x00000005U)  
#define DMA2D_INPUT_AL44            ((uint32_t)0x00000006U)  
#define DMA2D_INPUT_AL88            ((uint32_t)0x00000007U)  
#define DMA2D_INPUT_L4              ((uint32_t)0x00000008U)  
#define DMA2D_INPUT_A8              ((uint32_t)0x00000009U)  
#define DMA2D_INPUT_A4              ((uint32_t)0x0000000AU)  
#define DMA2D_NO_MODIF_ALPHA        ((uint32_t)0x00000000U)  
#define DMA2D_REPLACE_ALPHA         ((uint32_t)0x00000001U)  
#define DMA2D_COMBINE_ALPHA         ((uint32_t)0x00000002U)  
#if defined (DMA2D_FGPFCCR_AI) && defined (DMA2D_BGPFCCR_AI)    

#define DMA2D_REGULAR_ALPHA         ((uint32_t)0x00000000U)  
#define DMA2D_INVERTED_ALPHA        ((uint32_t)0x00000001U)  
#endif /* (DMA2D_FGPFCCR_AI) && (DMA2D_BGPFCCR_AI)  */

#if defined (DMA2D_FGPFCCR_RBS) && defined (DMA2D_BGPFCCR_RBS)  

#define DMA2D_RB_REGULAR            ((uint32_t)0x00000000U)  
#define DMA2D_RB_SWAP               ((uint32_t)0x00000001U)  
#endif /* (DMA2D_FGPFCCR_RBS) && (DMA2D_BGPFCCR_RBS)  */     

#define DMA2D_CCM_ARGB8888          ((uint32_t)0x00000000U)  
#define DMA2D_CCM_RGB888            ((uint32_t)0x00000001U)  
#define DMA2D_IT_CE                 DMA2D_CR_CEIE            
#define DMA2D_IT_CTC                DMA2D_CR_CTCIE           
#define DMA2D_IT_CAE                DMA2D_CR_CAEIE           
#define DMA2D_IT_TW                 DMA2D_CR_TWIE            
#define DMA2D_IT_TC                 DMA2D_CR_TCIE            
#define DMA2D_IT_TE                 DMA2D_CR_TEIE            
#define DMA2D_FLAG_CE               DMA2D_ISR_CEIF           
#define DMA2D_FLAG_CTC              DMA2D_ISR_CTCIF          
#define DMA2D_FLAG_CAE              DMA2D_ISR_CAEIF          
#define DMA2D_FLAG_TW               DMA2D_ISR_TWIF           
#define DMA2D_FLAG_TC               DMA2D_ISR_TCIF           
#define DMA2D_FLAG_TE               DMA2D_ISR_TEIF           
#define HAL_DMA2D_DisableCLUT       HAL_DMA2D_CLUTLoading_Abort    
/* Exported macros ------------------------------------------------------------*/

#define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)

#define __HAL_DMA2D_ENABLE(__HANDLE__)        ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)


/* Interrupt & Flag management */
#define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))

#define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))

#define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))

#define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))

#define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
     
/* Exported functions --------------------------------------------------------*/  
/* Initialization and de-initialization functions *******************************/
HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d); 
HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);
void              HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);
void              HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);

/* IO operation functions *******************************************************/
HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width,  uint32_t Height);
HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);
HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);
HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);
HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Abort(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Suspend(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Resume(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);
void              HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);
void              HAL_DMA2D_LineEventCallback(DMA2D_HandleTypeDef *hdma2d);
void              HAL_DMA2D_CLUTLoadingCpltCallback(DMA2D_HandleTypeDef *hdma2d);

/* Peripheral Control functions *************************************************/
HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);
HAL_StatusTypeDef HAL_DMA2D_EnableDeadTime(DMA2D_HandleTypeDef *hdma2d);
HAL_StatusTypeDef HAL_DMA2D_DisableDeadTime(DMA2D_HandleTypeDef *hdma2d);
HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t DeadTime);

/* Peripheral State functions ***************************************************/
HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);
uint32_t               HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);

/* Private constants ---------------------------------------------------------*/  
  
#define DMA2D_LINE_WATERMARK_MAX            DMA2D_LWR_LW       
#define DMA2D_COLOR_VALUE                 ((uint32_t)0x000000FFU)  
#define DMA2D_MAX_LAYER         2         
#define DMA2D_OFFSET                DMA2D_FGOR_LO            
#define DMA2D_PIXEL                 (DMA2D_NLR_PL >> 16U)    
#define DMA2D_LINE                  DMA2D_NLR_NL             
#define DMA2D_CLUT_SIZE             (DMA2D_FGPFCCR_CS >> 8)  
/* Private macros ------------------------------------------------------------*/

#define IS_DMA2D_LAYER(LAYER)                 ((LAYER) <= DMA2D_MAX_LAYER)
#define IS_DMA2D_MODE(MODE)                   (((MODE) == DMA2D_M2M)       || ((MODE) == DMA2D_M2M_PFC) || \
                                               ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
#define IS_DMA2D_CMODE(MODE_ARGB)             (((MODE_ARGB) == DMA2D_OUTPUT_ARGB8888) || ((MODE_ARGB) == DMA2D_OUTPUT_RGB888)   || \
                                               ((MODE_ARGB) == DMA2D_OUTPUT_RGB565)   || ((MODE_ARGB) == DMA2D_OUTPUT_ARGB1555) || \
                                               ((MODE_ARGB) == DMA2D_OUTPUT_ARGB4444))
#define IS_DMA2D_COLOR(COLOR)                 ((COLOR) <= DMA2D_COLOR_VALUE)
#define IS_DMA2D_LINE(LINE)                   ((LINE) <= DMA2D_LINE)
#define IS_DMA2D_PIXEL(PIXEL)                 ((PIXEL) <= DMA2D_PIXEL)
#define IS_DMA2D_OFFSET(OOFFSET)              ((OOFFSET) <= DMA2D_OFFSET)
#define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM)   (((INPUT_CM) == DMA2D_INPUT_ARGB8888) || ((INPUT_CM) == DMA2D_INPUT_RGB888)   || \
                                               ((INPUT_CM) == DMA2D_INPUT_RGB565)   || ((INPUT_CM) == DMA2D_INPUT_ARGB1555) || \
                                               ((INPUT_CM) == DMA2D_INPUT_ARGB4444) || ((INPUT_CM) == DMA2D_INPUT_L8)       || \
                                               ((INPUT_CM) == DMA2D_INPUT_AL44)     || ((INPUT_CM) == DMA2D_INPUT_AL88)     || \
                                               ((INPUT_CM) == DMA2D_INPUT_L4)       || ((INPUT_CM) == DMA2D_INPUT_A8)       || \
                                               ((INPUT_CM) == DMA2D_INPUT_A4))
#define IS_DMA2D_ALPHA_MODE(AlphaMode)        (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \
                                               ((AlphaMode) == DMA2D_REPLACE_ALPHA)  || \
                                               ((AlphaMode) == DMA2D_COMBINE_ALPHA))

#define IS_DMA2D_ALPHA_INVERTED(Alpha_Inverted) (((Alpha_Inverted) == DMA2D_REGULAR_ALPHA) || \
                                                 ((Alpha_Inverted) == DMA2D_INVERTED_ALPHA))

#define IS_DMA2D_RB_SWAP(RB_Swap) (((RB_Swap) == DMA2D_RB_REGULAR) || \
                                   ((RB_Swap) == DMA2D_RB_SWAP))

#define IS_DMA2D_CLUT_CM(CLUT_CM)             (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888))
#define IS_DMA2D_CLUT_SIZE(CLUT_SIZE)         ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
#define IS_DMA2D_LINEWATERMARK(LineWatermark) ((LineWatermark) <= DMA2D_LINE_WATERMARK_MAX)
#define IS_DMA2D_IT(IT)                       (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \
                                               ((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \
                                               ((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE))
#define IS_DMA2D_GET_FLAG(FLAG)               (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \
                                               ((FLAG) == DMA2D_FLAG_TW)   || ((FLAG) == DMA2D_FLAG_TC)  || \
                                               ((FLAG) == DMA2D_FLAG_TE)   || ((FLAG) == DMA2D_FLAG_CE))

#ifdef __cplusplus
}
#endif

#endif /* __STM32F7xx_HAL_DMA2D_H */
 

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/