Header file of QSPI HAL module. More...

#include "stm32f7xx_hal_def.h"

Data Structures
struct	QSPI_InitTypeDef
	QSPI Init structure definition. More...

struct	QSPI_HandleTypeDef
	QSPI Handle Structure definition. More...

struct	QSPI_CommandTypeDef
	QSPI Command structure definition. More...

struct	QSPI_AutoPollingTypeDef
	QSPI Auto Polling mode configuration structure definition. More...

struct	QSPI_MemoryMappedTypeDef
	QSPI Memory Mapped mode configuration structure definition. More...

Macros
#define	HAL_QSPI_ERROR_NONE ((uint32_t)0x00000000U)

#define	HAL_QSPI_ERROR_TIMEOUT ((uint32_t)0x00000001U)

#define	HAL_QSPI_ERROR_TRANSFER ((uint32_t)0x00000002U)

#define	HAL_QSPI_ERROR_DMA ((uint32_t)0x00000004U)

#define	HAL_QSPI_ERROR_INVALID_PARAM ((uint32_t)0x00000008U)

#define	QSPI_SAMPLE_SHIFTING_NONE ((uint32_t)0x00000000U)

#define	QSPI_SAMPLE_SHIFTING_HALFCYCLE ((uint32_t)QUADSPI_CR_SSHIFT)

#define	QSPI_CS_HIGH_TIME_1_CYCLE ((uint32_t)0x00000000U)

#define	QSPI_CS_HIGH_TIME_2_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0)

#define	QSPI_CS_HIGH_TIME_3_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_1)

#define	QSPI_CS_HIGH_TIME_4_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0 \| QUADSPI_DCR_CSHT_1)

#define	QSPI_CS_HIGH_TIME_5_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2)

#define	QSPI_CS_HIGH_TIME_6_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 \| QUADSPI_DCR_CSHT_0)

#define	QSPI_CS_HIGH_TIME_7_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 \| QUADSPI_DCR_CSHT_1)

#define	QSPI_CS_HIGH_TIME_8_CYCLE ((uint32_t)QUADSPI_DCR_CSHT)

#define	QSPI_CLOCK_MODE_0 ((uint32_t)0x00000000U)

#define	QSPI_CLOCK_MODE_3 ((uint32_t)QUADSPI_DCR_CKMODE)

#define	QSPI_FLASH_ID_1 ((uint32_t)0x00000000U)

#define	QSPI_FLASH_ID_2 ((uint32_t)QUADSPI_CR_FSEL)

#define	QSPI_DUALFLASH_ENABLE ((uint32_t)QUADSPI_CR_DFM)

#define	QSPI_DUALFLASH_DISABLE ((uint32_t)0x00000000U)

#define	QSPI_ADDRESS_8_BITS ((uint32_t)0x00000000U)

#define	QSPI_ADDRESS_16_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_0)

#define	QSPI_ADDRESS_24_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_1)

#define	QSPI_ADDRESS_32_BITS ((uint32_t)QUADSPI_CCR_ADSIZE)

#define	QSPI_ALTERNATE_BYTES_8_BITS ((uint32_t)0x00000000U)

#define	QSPI_ALTERNATE_BYTES_16_BITS ((uint32_t)QUADSPI_CCR_ABSIZE_0)

#define	QSPI_ALTERNATE_BYTES_24_BITS ((uint32_t)QUADSPI_CCR_ABSIZE_1)

#define	QSPI_ALTERNATE_BYTES_32_BITS ((uint32_t)QUADSPI_CCR_ABSIZE)

#define	QSPI_INSTRUCTION_NONE ((uint32_t)0x00000000U)

#define	QSPI_INSTRUCTION_1_LINE ((uint32_t)QUADSPI_CCR_IMODE_0)

#define	QSPI_INSTRUCTION_2_LINES ((uint32_t)QUADSPI_CCR_IMODE_1)

#define	QSPI_INSTRUCTION_4_LINES ((uint32_t)QUADSPI_CCR_IMODE)

#define	QSPI_ADDRESS_NONE ((uint32_t)0x00000000U)

#define	QSPI_ADDRESS_1_LINE ((uint32_t)QUADSPI_CCR_ADMODE_0)

#define	QSPI_ADDRESS_2_LINES ((uint32_t)QUADSPI_CCR_ADMODE_1)

#define	QSPI_ADDRESS_4_LINES ((uint32_t)QUADSPI_CCR_ADMODE)

#define	QSPI_ALTERNATE_BYTES_NONE ((uint32_t)0x00000000U)

#define	QSPI_ALTERNATE_BYTES_1_LINE ((uint32_t)QUADSPI_CCR_ABMODE_0)

#define	QSPI_ALTERNATE_BYTES_2_LINES ((uint32_t)QUADSPI_CCR_ABMODE_1)

#define	QSPI_ALTERNATE_BYTES_4_LINES ((uint32_t)QUADSPI_CCR_ABMODE)

#define	QSPI_DATA_NONE ((uint32_t)0X00000000)

#define	QSPI_DATA_1_LINE ((uint32_t)QUADSPI_CCR_DMODE_0)

#define	QSPI_DATA_2_LINES ((uint32_t)QUADSPI_CCR_DMODE_1)

#define	QSPI_DATA_4_LINES ((uint32_t)QUADSPI_CCR_DMODE)

#define	QSPI_DDR_MODE_DISABLE ((uint32_t)0x00000000U)

#define	QSPI_DDR_MODE_ENABLE ((uint32_t)QUADSPI_CCR_DDRM)

#define	QSPI_DDR_HHC_ANALOG_DELAY ((uint32_t)0x00000000U)

#define	QSPI_DDR_HHC_HALF_CLK_DELAY ((uint32_t)QUADSPI_CCR_DHHC)

#define	QSPI_SIOO_INST_EVERY_CMD ((uint32_t)0x00000000U)

#define	QSPI_SIOO_INST_ONLY_FIRST_CMD ((uint32_t)QUADSPI_CCR_SIOO)

#define	QSPI_MATCH_MODE_AND ((uint32_t)0x00000000U)

#define	QSPI_MATCH_MODE_OR ((uint32_t)QUADSPI_CR_PMM)

#define	QSPI_AUTOMATIC_STOP_DISABLE ((uint32_t)0x00000000U)

#define	QSPI_AUTOMATIC_STOP_ENABLE ((uint32_t)QUADSPI_CR_APMS)

#define	QSPI_TIMEOUT_COUNTER_DISABLE ((uint32_t)0x00000000U)

#define	QSPI_TIMEOUT_COUNTER_ENABLE ((uint32_t)QUADSPI_CR_TCEN)

#define	QSPI_FLAG_BUSY QUADSPI_SR_BUSY

#define	QSPI_FLAG_TO QUADSPI_SR_TOF

#define	QSPI_FLAG_SM QUADSPI_SR_SMF

#define	QSPI_FLAG_FT QUADSPI_SR_FTF

#define	QSPI_FLAG_TC QUADSPI_SR_TCF

#define	QSPI_FLAG_TE QUADSPI_SR_TEF

#define	QSPI_IT_TO QUADSPI_CR_TOIE

#define	QSPI_IT_SM QUADSPI_CR_SMIE

#define	QSPI_IT_FT QUADSPI_CR_FTIE

#define	QSPI_IT_TC QUADSPI_CR_TCIE

#define	QSPI_IT_TE QUADSPI_CR_TEIE

#define	HAL_QPSI_TIMEOUT_DEFAULT_VALUE ((uint32_t)5000)/* 5 s */

#define	__HAL_QSPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_QSPI_STATE_RESET)
	Reset QSPI handle state. More...

#define	__HAL_QSPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, QUADSPI_CR_EN)
	Enable QSPI. More...

#define	__HAL_QSPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, QUADSPI_CR_EN)
	Disable QSPI. More...

#define	__HAL_QSPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
	Enables the specified QSPI interrupt. More...

#define	__HAL_QSPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
	Disables the specified QSPI interrupt. More...

#define	__HAL_QSPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (READ_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) == (__INTERRUPT__))
	Checks whether the specified QSPI interrupt source is enabled. More...

#define	__HAL_QSPI_GET_FLAG(__HANDLE__, __FLAG__) (READ_BIT((__HANDLE__)->Instance->SR, (__FLAG__)) != 0)
	Get the selected QSPI's flag status. More...

#define	__HAL_QSPI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->FCR, (__FLAG__))
	Clears the specified QSPI's flag status. More...

#define	IS_QSPI_CLOCK_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFF)

#define	IS_QSPI_FIFO_THRESHOLD(THR) (((THR) > 0) && ((THR) <= 32))

#define	IS_QSPI_SSHIFT(SSHIFT)

#define	IS_QSPI_FLASH_SIZE(FSIZE) (((FSIZE) <= 31))

#define	IS_QSPI_CS_HIGH_TIME(CSHTIME)

#define	IS_QSPI_CLOCK_MODE(CLKMODE)

#define	IS_QSPI_FLASH_ID(FLA)

#define	IS_QSPI_DUAL_FLASH_MODE(MODE)

#define	IS_QSPI_INSTRUCTION(INSTRUCTION) ((INSTRUCTION) <= 0xFF)

#define	IS_QSPI_ADDRESS_SIZE(ADDR_SIZE)

#define	IS_QSPI_ALTERNATE_BYTES_SIZE(SIZE)

#define	IS_QSPI_DUMMY_CYCLES(DCY) ((DCY) <= 31)

#define	IS_QSPI_INSTRUCTION_MODE(MODE)

#define	IS_QSPI_ADDRESS_MODE(MODE)

#define	IS_QSPI_ALTERNATE_BYTES_MODE(MODE)

#define	IS_QSPI_DATA_MODE(MODE)

#define	IS_QSPI_DDR_MODE(DDR_MODE)

#define	IS_QSPI_DDR_HHC(DDR_HHC)

#define	IS_QSPI_SIOO_MODE(SIOO_MODE)

#define	IS_QSPI_INTERVAL(INTERVAL) ((INTERVAL) <= QUADSPI_PIR_INTERVAL)

#define	IS_QSPI_STATUS_BYTES_SIZE(SIZE) (((SIZE) >= 1) && ((SIZE) <= 4))

#define	IS_QSPI_MATCH_MODE(MODE)

#define	IS_QSPI_AUTOMATIC_STOP(APMS)

#define	IS_QSPI_TIMEOUT_ACTIVATION(TCEN)

#define	IS_QSPI_TIMEOUT_PERIOD(PERIOD) ((PERIOD) <= 0xFFFF)

#define	IS_QSPI_GET_FLAG(FLAG)

#define	IS_QSPI_IT(IT) ((((IT) & (uint32_t)0xFFE0FFFFU) == 0x00000000U) && ((IT) != 0x00000000U))

Enumerations
enum	HAL_QSPI_StateTypeDef { HAL_QSPI_STATE_RESET = 0x00U, HAL_QSPI_STATE_READY = 0x01U, HAL_QSPI_STATE_BUSY = 0x02U, HAL_QSPI_STATE_BUSY_INDIRECT_TX = 0x12U, HAL_QSPI_STATE_BUSY_INDIRECT_RX = 0x22U, HAL_QSPI_STATE_BUSY_AUTO_POLLING = 0x42U, HAL_QSPI_STATE_BUSY_MEM_MAPPED = 0x82U, HAL_QSPI_STATE_ABORT = 0x08U, HAL_QSPI_STATE_ERROR = 0x04U }
	HAL QSPI State structures definition. More...

Functions
HAL_StatusTypeDef	HAL_QSPI_Init (QSPI_HandleTypeDef *hqspi)

HAL_StatusTypeDef	HAL_QSPI_DeInit (QSPI_HandleTypeDef *hqspi)

void	HAL_QSPI_MspInit (QSPI_HandleTypeDef *hqspi)

void	HAL_QSPI_MspDeInit (QSPI_HandleTypeDef *hqspi)

void	HAL_QSPI_IRQHandler (QSPI_HandleTypeDef *hqspi)

HAL_StatusTypeDef	HAL_QSPI_Command (QSPI_HandleTypeDef hqspi, QSPI_CommandTypeDef cmd, uint32_t Timeout)

HAL_StatusTypeDef	HAL_QSPI_Transmit (QSPI_HandleTypeDef hqspi, uint8_t pData, uint32_t Timeout)

HAL_StatusTypeDef	HAL_QSPI_Receive (QSPI_HandleTypeDef hqspi, uint8_t pData, uint32_t Timeout)

HAL_StatusTypeDef	HAL_QSPI_Command_IT (QSPI_HandleTypeDef hqspi, QSPI_CommandTypeDef cmd)

HAL_StatusTypeDef	HAL_QSPI_Transmit_IT (QSPI_HandleTypeDef hqspi, uint8_t pData)

HAL_StatusTypeDef	HAL_QSPI_Receive_IT (QSPI_HandleTypeDef hqspi, uint8_t pData)

HAL_StatusTypeDef	HAL_QSPI_Transmit_DMA (QSPI_HandleTypeDef hqspi, uint8_t pData)

HAL_StatusTypeDef	HAL_QSPI_Receive_DMA (QSPI_HandleTypeDef hqspi, uint8_t pData)

HAL_StatusTypeDef	HAL_QSPI_AutoPolling (QSPI_HandleTypeDef hqspi, QSPI_CommandTypeDef cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout)

HAL_StatusTypeDef	HAL_QSPI_AutoPolling_IT (QSPI_HandleTypeDef hqspi, QSPI_CommandTypeDef cmd, QSPI_AutoPollingTypeDef *cfg)

HAL_StatusTypeDef	HAL_QSPI_MemoryMapped (QSPI_HandleTypeDef hqspi, QSPI_CommandTypeDef cmd, QSPI_MemoryMappedTypeDef *cfg)

void	HAL_QSPI_ErrorCallback (QSPI_HandleTypeDef *hqspi)

void	HAL_QSPI_AbortCpltCallback (QSPI_HandleTypeDef *hqspi)

void	HAL_QSPI_FifoThresholdCallback (QSPI_HandleTypeDef *hqspi)

void	HAL_QSPI_CmdCpltCallback (QSPI_HandleTypeDef *hqspi)

void	HAL_QSPI_RxCpltCallback (QSPI_HandleTypeDef *hqspi)

void	HAL_QSPI_TxCpltCallback (QSPI_HandleTypeDef *hqspi)

void	HAL_QSPI_RxHalfCpltCallback (QSPI_HandleTypeDef *hqspi)

void	HAL_QSPI_TxHalfCpltCallback (QSPI_HandleTypeDef *hqspi)

void	HAL_QSPI_StatusMatchCallback (QSPI_HandleTypeDef *hqspi)

void	HAL_QSPI_TimeOutCallback (QSPI_HandleTypeDef *hqspi)

HAL_QSPI_StateTypeDef	HAL_QSPI_GetState (QSPI_HandleTypeDef *hqspi)

uint32_t	HAL_QSPI_GetError (QSPI_HandleTypeDef *hqspi)

HAL_StatusTypeDef	HAL_QSPI_Abort (QSPI_HandleTypeDef *hqspi)

HAL_StatusTypeDef	HAL_QSPI_Abort_IT (QSPI_HandleTypeDef *hqspi)

void	HAL_QSPI_SetTimeout (QSPI_HandleTypeDef *hqspi, uint32_t Timeout)

HAL_StatusTypeDef	HAL_QSPI_SetFifoThreshold (QSPI_HandleTypeDef *hqspi, uint32_t Threshold)

uint32_t	HAL_QSPI_GetFifoThreshold (QSPI_HandleTypeDef *hqspi)

Detailed Description

Header file of QSPI HAL module.

Author: MCD Application Team

Version: V1.1.0

Date: 22-April-2016

Attention

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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Definition in file stm32f7xx_hal_qspi.h.

Data Structures

Macros

Enumerations

Functions

Detailed Description

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