Macros
#define	QSPI_CS_HIGH_TIME_1_CYCLE ((uint32_t)0x00000000U)

#define	QSPI_CS_HIGH_TIME_2_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0)

#define	QSPI_CS_HIGH_TIME_3_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_1)

#define	QSPI_CS_HIGH_TIME_4_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0 \| QUADSPI_DCR_CSHT_1)

#define	QSPI_CS_HIGH_TIME_5_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2)

#define	QSPI_CS_HIGH_TIME_6_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 \| QUADSPI_DCR_CSHT_0)

#define	QSPI_CS_HIGH_TIME_7_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 \| QUADSPI_DCR_CSHT_1)

#define	QSPI_CS_HIGH_TIME_8_CYCLE ((uint32_t)QUADSPI_DCR_CSHT)

Detailed Description

Macro Definition Documentation

#define QSPI_CS_HIGH_TIME_1_CYCLE ((uint32_t)0x00000000U)

nCS stay high for at least 1 clock cycle between commands

Definition at line 232 of file stm32f7xx_hal_qspi.h.

#define QSPI_CS_HIGH_TIME_2_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0)

nCS stay high for at least 2 clock cycles between commands

Definition at line 233 of file stm32f7xx_hal_qspi.h.

#define QSPI_CS_HIGH_TIME_3_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_1)

nCS stay high for at least 3 clock cycles between commands

Definition at line 234 of file stm32f7xx_hal_qspi.h.

#define QSPI_CS_HIGH_TIME_4_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0 | QUADSPI_DCR_CSHT_1)

nCS stay high for at least 4 clock cycles between commands

Definition at line 235 of file stm32f7xx_hal_qspi.h.

#define QSPI_CS_HIGH_TIME_5_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2)

nCS stay high for at least 5 clock cycles between commands

Definition at line 236 of file stm32f7xx_hal_qspi.h.

#define QSPI_CS_HIGH_TIME_6_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_0)

nCS stay high for at least 6 clock cycles between commands

Definition at line 237 of file stm32f7xx_hal_qspi.h.

#define QSPI_CS_HIGH_TIME_7_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_1)

nCS stay high for at least 7 clock cycles between commands

Definition at line 238 of file stm32f7xx_hal_qspi.h.

#define QSPI_CS_HIGH_TIME_8_CYCLE ((uint32_t)QUADSPI_DCR_CSHT)

nCS stay high for at least 8 clock cycles between commands

Definition at line 239 of file stm32f7xx_hal_qspi.h.