39 #ifndef __STM32F7xx_HAL_IWDG_H 40 #define __STM32F7xx_HAL_IWDG_H 101 #define IWDG_PRESCALER_4 0x00000000u 102 #define IWDG_PRESCALER_8 IWDG_PR_PR_0 103 #define IWDG_PRESCALER_16 IWDG_PR_PR_1 104 #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) 105 #define IWDG_PRESCALER_64 IWDG_PR_PR_2 106 #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) 107 #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) 115 #define IWDG_WINDOW_DISABLE IWDG_WINR_WIN 134 #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) 142 #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) 183 #define IWDG_KEY_RELOAD 0x0000AAAAu 184 #define IWDG_KEY_ENABLE 0x0000CCCCu 185 #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u 186 #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u 202 #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) 209 #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) 216 #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ 217 ((__PRESCALER__) == IWDG_PRESCALER_8) || \ 218 ((__PRESCALER__) == IWDG_PRESCALER_16) || \ 219 ((__PRESCALER__) == IWDG_PRESCALER_32) || \ 220 ((__PRESCALER__) == IWDG_PRESCALER_64) || \ 221 ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ 222 ((__PRESCALER__) == IWDG_PRESCALER_256)) 229 #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) 236 #define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN)
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
IWDG Handle Structure definition.
IWDG Init structure definition.
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition.