HAL Exported Macros

Macros
#define	__HAL_DBGMCU_FREEZE_TIM2()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
	Freeze/Unfreeze Peripherals in Debug mode. More...
#define	__HAL_DBGMCU_FREEZE_TIM3()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
#define	__HAL_DBGMCU_FREEZE_TIM4()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
#define	__HAL_DBGMCU_FREEZE_TIM5()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
#define	__HAL_DBGMCU_FREEZE_TIM6()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
#define	__HAL_DBGMCU_FREEZE_TIM7()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
#define	__HAL_DBGMCU_FREEZE_TIM12()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
#define	__HAL_DBGMCU_FREEZE_TIM13()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
#define	__HAL_DBGMCU_FREEZE_TIM14()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
#define	__HAL_DBGMCU_FREEZE_LPTIM1()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_LPTIM1_STOP))
#define	__HAL_DBGMCU_FREEZE_RTC()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
#define	__HAL_DBGMCU_FREEZE_WWDG()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
#define	__HAL_DBGMCU_FREEZE_IWDG()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
#define	__HAL_DBGMCU_FREEZE_I2C1_TIMEOUT()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
#define	__HAL_DBGMCU_FREEZE_I2C2_TIMEOUT()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
#define	__HAL_DBGMCU_FREEZE_I2C3_TIMEOUT()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
#define	__HAL_DBGMCU_FREEZE_I2C4_TIMEOUT()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT))
#define	__HAL_DBGMCU_FREEZE_CAN1()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
#define	__HAL_DBGMCU_FREEZE_CAN2()    (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
#define	__HAL_DBGMCU_FREEZE_TIM1()    (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
#define	__HAL_DBGMCU_FREEZE_TIM8()    (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
#define	__HAL_DBGMCU_FREEZE_TIM9()    (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
#define	__HAL_DBGMCU_FREEZE_TIM10()    (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
#define	__HAL_DBGMCU_FREEZE_TIM11()    (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
#define	__HAL_DBGMCU_UNFREEZE_TIM2()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
#define	__HAL_DBGMCU_UNFREEZE_TIM3()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
#define	__HAL_DBGMCU_UNFREEZE_TIM4()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
#define	__HAL_DBGMCU_UNFREEZE_TIM5()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
#define	__HAL_DBGMCU_UNFREEZE_TIM6()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
#define	__HAL_DBGMCU_UNFREEZE_TIM7()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
#define	__HAL_DBGMCU_UNFREEZE_TIM12()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
#define	__HAL_DBGMCU_UNFREEZE_TIM13()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
#define	__HAL_DBGMCU_UNFREEZE_TIM14()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
#define	__HAL_DBGMCU_UNFREEZE_LPTIM1()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_LPTIM1_STOP))
#define	__HAL_DBGMCU_UNFREEZE_RTC()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
#define	__HAL_DBGMCU_UNFREEZE_WWDG()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
#define	__HAL_DBGMCU_UNFREEZE_IWDG()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
#define	__HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
#define	__HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
#define	__HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
#define	__HAL_DBGMCU_UNFREEZE_I2C4_TIMEOUT()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT))
#define	__HAL_DBGMCU_UNFREEZE_CAN1()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
#define	__HAL_DBGMCU_UNFREEZE_CAN2()    (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
#define	__HAL_DBGMCU_UNFREEZE_TIM1()    (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
#define	__HAL_DBGMCU_UNFREEZE_TIM8()    (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
#define	__HAL_DBGMCU_UNFREEZE_TIM9()    (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
#define	__HAL_DBGMCU_UNFREEZE_TIM10()    (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
#define	__HAL_DBGMCU_UNFREEZE_TIM11()    (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
#define	__HAL_SYSCFG_REMAPMEMORY_FMC()    (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_SWP_FMC))
	FMC (NOR/RAM) mapped at 0x60000000 and SDRAM mapped at 0xC0000000. More...
#define	__HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM()
	FMC/SDRAM mapped at 0x60000000 (NOR/RAM) mapped at 0xC0000000. More...
#define	__HAL_SYSCFG_GET_BOOT_MODE()    READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_BOOT)
	Return the memory boot mapping as configured by user. More...

Detailed Description

Macro Definition Documentation

#define __HAL_DBGMCU_FREEZE_CAN1

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))

Definition at line 101 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_CAN2

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))

Definition at line 102 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))

Definition at line 97 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))

Definition at line 98 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))

Definition at line 99 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_I2C4_TIMEOUT

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT))

Definition at line 100 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_IWDG

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))

Definition at line 96 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_LPTIM1

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_LPTIM1_STOP))

Definition at line 93 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_RTC

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))

Definition at line 94 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_TIM1

(

)

(DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))

Definition at line 103 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_TIM10

(

)

(DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))

Definition at line 106 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_TIM11

(

)

(DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))

Definition at line 107 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_TIM12

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))

Definition at line 90 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_TIM13

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))

Definition at line 91 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_TIM14

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))

Definition at line 92 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_TIM2

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))

Freeze/Unfreeze Peripherals in Debug mode.

Definition at line 84 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_TIM3

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))

Definition at line 85 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_TIM4

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))

Definition at line 86 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_TIM5

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))

Definition at line 87 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_TIM6

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))

Definition at line 88 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_TIM7

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))

Definition at line 89 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_TIM8

(

)

(DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))

Definition at line 104 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_TIM9

(

)

(DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))

Definition at line 105 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_FREEZE_WWDG

(

)

(DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))

Definition at line 95 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_CAN1

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))

Definition at line 126 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_CAN2

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))

Definition at line 127 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))

Definition at line 122 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))

Definition at line 123 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))

Definition at line 124 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_I2C4_TIMEOUT

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C4_SMBUS_TIMEOUT))

Definition at line 125 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_IWDG

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))

Definition at line 121 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_LPTIM1

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_LPTIM1_STOP))

Definition at line 118 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_RTC

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))

Definition at line 119 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_TIM1

(

)

(DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))

Definition at line 128 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_TIM10

(

)

(DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))

Definition at line 131 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_TIM11

(

)

(DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))

Definition at line 132 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_TIM12

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))

Definition at line 115 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_TIM13

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))

Definition at line 116 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_TIM14

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))

Definition at line 117 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_TIM2

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))

Definition at line 109 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_TIM3

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))

Definition at line 110 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_TIM4

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))

Definition at line 111 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_TIM5

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))

Definition at line 112 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_TIM6

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))

Definition at line 113 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_TIM7

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))

Definition at line 114 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_TIM8

(

)

(DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))

Definition at line 129 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_TIM9

(

)

(DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))

Definition at line 130 of file stm32f7xx_hal.h.

#define __HAL_DBGMCU_UNFREEZE_WWDG

(

)

(DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))

Definition at line 120 of file stm32f7xx_hal.h.

#define __HAL_SYSCFG_GET_BOOT_MODE

(

)

READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_BOOT)

Return the memory boot mapping as configured by user.

Return values

The	boot mode as configured by user. The returned value can be one of the following values: SYSCFG_MEM_BOOT_ADD0 SYSCFG_MEM_BOOT_ADD1

Definition at line 152 of file stm32f7xx_hal.h.

#define __HAL_SYSCFG_REMAPMEMORY_FMC

(

)

(SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_SWP_FMC))

FMC (NOR/RAM) mapped at 0x60000000 and SDRAM mapped at 0xC0000000.

Definition at line 137 of file stm32f7xx_hal.h.

#define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM

(

)

Value:

do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_SWP_FMC);\
                                          SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_SWP_FMC_0);\
                                         }while(0);

FMC/SDRAM mapped at 0x60000000 (NOR/RAM) mapped at 0xC0000000.

Definition at line 142 of file stm32f7xx_hal.h.