STM32F769IDiscovery  1.00
uDANTE Audio Networking with STM32F7 DISCO board
stmpe811.c
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1 
39 /* Includes ------------------------------------------------------------------*/
40 #include "stmpe811.h"
41 
61 #define STMPE811_MAX_INSTANCE 2
62 
77 /* Touch screen driver structure initialization */
79 {
90 };
91 
92 /* IO driver structure initialization */
94 {
106 };
107 
108 /* stmpe811 instances by address */
117 static uint8_t stmpe811_GetInstance(uint16_t DeviceAddr);
131 void stmpe811_Init(uint16_t DeviceAddr)
132 {
133  uint8_t instance;
134  uint8_t empty;
135 
136  /* Check if device instance already exists */
137  instance = stmpe811_GetInstance(DeviceAddr);
138 
139  /* To prevent double initialization */
140  if(instance == 0xFF)
141  {
142  /* Look for empty instance */
143  empty = stmpe811_GetInstance(0);
144 
145  if(empty < STMPE811_MAX_INSTANCE)
146  {
147  /* Register the current device instance */
148  stmpe811[empty] = DeviceAddr;
149 
150  /* Initialize IO BUS layer */
151  IOE_Init();
152 
153  /* Generate stmpe811 Software reset */
154  stmpe811_Reset(DeviceAddr);
155  }
156  }
157 }
158 
164 void stmpe811_Reset(uint16_t DeviceAddr)
165 {
166  /* Power Down the stmpe811 */
167  IOE_Write(DeviceAddr, STMPE811_REG_SYS_CTRL1, 2);
168 
169  /* Wait for a delay to ensure registers erasing */
170  IOE_Delay(10);
171 
172  /* Power On the Codec after the power off => all registers are reinitialized */
173  IOE_Write(DeviceAddr, STMPE811_REG_SYS_CTRL1, 0);
174 
175  /* Wait for a delay to ensure registers erasing */
176  IOE_Delay(2);
177 }
178 
184 uint16_t stmpe811_ReadID(uint16_t DeviceAddr)
185 {
186  /* Initialize IO BUS layer */
187  IOE_Init();
188 
189  /* Return the device ID value */
190  return ((IOE_Read(DeviceAddr, STMPE811_REG_CHP_ID_LSB) << 8) |\
191  (IOE_Read(DeviceAddr, STMPE811_REG_CHP_ID_MSB)));
192 }
193 
199 void stmpe811_EnableGlobalIT(uint16_t DeviceAddr)
200 {
201  uint8_t tmp = 0;
202 
203  /* Read the Interrupt Control register */
204  tmp = IOE_Read(DeviceAddr, STMPE811_REG_INT_CTRL);
205 
206  /* Set the global interrupts to be Enabled */
207  tmp |= (uint8_t)STMPE811_GIT_EN;
208 
209  /* Write Back the Interrupt Control register */
210  IOE_Write(DeviceAddr, STMPE811_REG_INT_CTRL, tmp);
211 }
212 
218 void stmpe811_DisableGlobalIT(uint16_t DeviceAddr)
219 {
220  uint8_t tmp = 0;
221 
222  /* Read the Interrupt Control register */
223  tmp = IOE_Read(DeviceAddr, STMPE811_REG_INT_CTRL);
224 
225  /* Set the global interrupts to be Disabled */
226  tmp &= ~(uint8_t)STMPE811_GIT_EN;
227 
228  /* Write Back the Interrupt Control register */
229  IOE_Write(DeviceAddr, STMPE811_REG_INT_CTRL, tmp);
230 
231 }
232 
246 void stmpe811_EnableITSource(uint16_t DeviceAddr, uint8_t Source)
247 {
248  uint8_t tmp = 0;
249 
250  /* Get the current value of the INT_EN register */
251  tmp = IOE_Read(DeviceAddr, STMPE811_REG_INT_EN);
252 
253  /* Set the interrupts to be Enabled */
254  tmp |= Source;
255 
256  /* Set the register */
257  IOE_Write(DeviceAddr, STMPE811_REG_INT_EN, tmp);
258 }
259 
273 void stmpe811_DisableITSource(uint16_t DeviceAddr, uint8_t Source)
274 {
275  uint8_t tmp = 0;
276 
277  /* Get the current value of the INT_EN register */
278  tmp = IOE_Read(DeviceAddr, STMPE811_REG_INT_EN);
279 
280  /* Set the interrupts to be Enabled */
281  tmp &= ~Source;
282 
283  /* Set the register */
284  IOE_Write(DeviceAddr, STMPE811_REG_INT_EN, tmp);
285 }
286 
295 void stmpe811_SetITPolarity(uint16_t DeviceAddr, uint8_t Polarity)
296 {
297  uint8_t tmp = 0;
298 
299  /* Get the current register value */
300  tmp = IOE_Read(DeviceAddr, STMPE811_REG_INT_CTRL);
301 
302  /* Mask the polarity bits */
303  tmp &= ~(uint8_t)0x04;
304 
305  /* Modify the Interrupt Output line configuration */
306  tmp |= Polarity;
307 
308  /* Set the new register value */
309  IOE_Write(DeviceAddr, STMPE811_REG_INT_CTRL, tmp);
310 
311 }
312 
321 void stmpe811_SetITType(uint16_t DeviceAddr, uint8_t Type)
322 {
323  uint8_t tmp = 0;
324 
325  /* Get the current register value */
326  tmp = IOE_Read(DeviceAddr, STMPE811_REG_INT_CTRL);
327 
328  /* Mask the type bits */
329  tmp &= ~(uint8_t)0x02;
330 
331  /* Modify the Interrupt Output line configuration */
332  tmp |= Type;
333 
334  /* Set the new register value */
335  IOE_Write(DeviceAddr, STMPE811_REG_INT_CTRL, tmp);
336 
337 }
338 
352 uint8_t stmpe811_GlobalITStatus(uint16_t DeviceAddr, uint8_t Source)
353 {
354  /* Return the global IT source status */
355  return((IOE_Read(DeviceAddr, STMPE811_REG_INT_STA) & Source) == Source);
356 }
357 
371 uint8_t stmpe811_ReadGITStatus(uint16_t DeviceAddr, uint8_t Source)
372 {
373  /* Return the global IT source status */
374  return((IOE_Read(DeviceAddr, STMPE811_REG_INT_STA) & Source));
375 }
376 
391 void stmpe811_ClearGlobalIT(uint16_t DeviceAddr, uint8_t Source)
392 {
393  /* Write 1 to the bits that have to be cleared */
394  IOE_Write(DeviceAddr, STMPE811_REG_INT_STA, Source);
395 }
396 
405 void stmpe811_IO_Start(uint16_t DeviceAddr, uint32_t IO_Pin)
406 {
407  uint8_t mode;
408 
409  /* Get the current register value */
410  mode = IOE_Read(DeviceAddr, STMPE811_REG_SYS_CTRL2);
411 
412  /* Set the Functionalities to be Disabled */
413  mode &= ~(STMPE811_IO_FCT | STMPE811_ADC_FCT);
414 
415  /* Write the new register value */
416  IOE_Write(DeviceAddr, STMPE811_REG_SYS_CTRL2, mode);
417 
418  /* Disable AF for the selected IO pin(s) */
419  stmpe811_IO_DisableAF(DeviceAddr, (uint8_t)IO_Pin);
420 }
421 
437 uint8_t stmpe811_IO_Config(uint16_t DeviceAddr, uint32_t IO_Pin, IO_ModeTypedef IO_Mode)
438 {
439  uint8_t error_code = 0;
440 
441  /* Configure IO pin according to selected IO mode */
442  switch(IO_Mode)
443  {
444  case IO_MODE_INPUT: /* Input mode */
445  stmpe811_IO_InitPin(DeviceAddr, IO_Pin, STMPE811_DIRECTION_IN);
446  break;
447 
448  case IO_MODE_OUTPUT: /* Output mode */
449  stmpe811_IO_InitPin(DeviceAddr, IO_Pin, STMPE811_DIRECTION_OUT);
450  break;
451 
452  case IO_MODE_IT_RISING_EDGE: /* Interrupt rising edge mode */
453  stmpe811_IO_EnableIT(DeviceAddr);
454  stmpe811_IO_EnablePinIT(DeviceAddr, IO_Pin);
455  stmpe811_IO_InitPin(DeviceAddr, IO_Pin, STMPE811_DIRECTION_IN);
457  stmpe811_IO_SetEdgeMode(DeviceAddr, IO_Pin, STMPE811_EDGE_RISING);
458  break;
459 
460  case IO_MODE_IT_FALLING_EDGE: /* Interrupt falling edge mode */
461  stmpe811_IO_EnableIT(DeviceAddr);
462  stmpe811_IO_EnablePinIT(DeviceAddr, IO_Pin);
463  stmpe811_IO_InitPin(DeviceAddr, IO_Pin, STMPE811_DIRECTION_IN);
465  stmpe811_IO_SetEdgeMode(DeviceAddr, IO_Pin, STMPE811_EDGE_FALLING);
466  break;
467 
468  case IO_MODE_IT_LOW_LEVEL: /* Low level interrupt mode */
469  stmpe811_IO_EnableIT(DeviceAddr);
470  stmpe811_IO_EnablePinIT(DeviceAddr, IO_Pin);
471  stmpe811_IO_InitPin(DeviceAddr, IO_Pin, STMPE811_DIRECTION_IN);
474  break;
475 
476  case IO_MODE_IT_HIGH_LEVEL: /* High level interrupt mode */
477  stmpe811_IO_EnableIT(DeviceAddr);
478  stmpe811_IO_EnablePinIT(DeviceAddr, IO_Pin);
479  stmpe811_IO_InitPin(DeviceAddr, IO_Pin, STMPE811_DIRECTION_IN);
482  break;
483 
484  default:
485  error_code = (uint8_t) IO_Mode;
486  break;
487  }
488  return error_code;
489 }
490 
500 void stmpe811_IO_InitPin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Direction)
501 {
502  uint8_t tmp = 0;
503 
504  /* Get all the Pins direction */
505  tmp = IOE_Read(DeviceAddr, STMPE811_REG_IO_DIR);
506 
507  /* Set the selected pin direction */
508  if (Direction != STMPE811_DIRECTION_IN)
509  {
510  tmp |= (uint8_t)IO_Pin;
511  }
512  else
513  {
514  tmp &= ~(uint8_t)IO_Pin;
515  }
516 
517  /* Write the register new value */
518  IOE_Write(DeviceAddr, STMPE811_REG_IO_DIR, tmp);
519 }
520 
529 void stmpe811_IO_DisableAF(uint16_t DeviceAddr, uint32_t IO_Pin)
530 {
531  uint8_t tmp = 0;
532 
533  /* Get the current state of the IO_AF register */
534  tmp = IOE_Read(DeviceAddr, STMPE811_REG_IO_AF);
535 
536  /* Enable the selected pins alternate function */
537  tmp |= (uint8_t)IO_Pin;
538 
539  /* Write back the new value in IO AF register */
540  IOE_Write(DeviceAddr, STMPE811_REG_IO_AF, tmp);
541 
542 }
543 
552 void stmpe811_IO_EnableAF(uint16_t DeviceAddr, uint32_t IO_Pin)
553 {
554  uint8_t tmp = 0;
555 
556  /* Get the current register value */
557  tmp = IOE_Read(DeviceAddr, STMPE811_REG_IO_AF);
558 
559  /* Enable the selected pins alternate function */
560  tmp &= ~(uint8_t)IO_Pin;
561 
562  /* Write back the new register value */
563  IOE_Write(DeviceAddr, STMPE811_REG_IO_AF, tmp);
564 }
565 
577 void stmpe811_IO_SetEdgeMode(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Edge)
578 {
579  uint8_t tmp1 = 0, tmp2 = 0;
580 
581  /* Get the current registers values */
582  tmp1 = IOE_Read(DeviceAddr, STMPE811_REG_IO_FE);
583  tmp2 = IOE_Read(DeviceAddr, STMPE811_REG_IO_RE);
584 
585  /* Disable the Falling Edge */
586  tmp1 &= ~(uint8_t)IO_Pin;
587 
588  /* Disable the Falling Edge */
589  tmp2 &= ~(uint8_t)IO_Pin;
590 
591  /* Enable the Falling edge if selected */
592  if (Edge & STMPE811_EDGE_FALLING)
593  {
594  tmp1 |= (uint8_t)IO_Pin;
595  }
596 
597  /* Enable the Rising edge if selected */
598  if (Edge & STMPE811_EDGE_RISING)
599  {
600  tmp2 |= (uint8_t)IO_Pin;
601  }
602 
603  /* Write back the new registers values */
604  IOE_Write(DeviceAddr, STMPE811_REG_IO_FE, tmp1);
605  IOE_Write(DeviceAddr, STMPE811_REG_IO_RE, tmp2);
606 }
607 
617 void stmpe811_IO_WritePin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t PinState)
618 {
619  /* Apply the bit value to the selected pin */
620  if (PinState != 0)
621  {
622  /* Set the register */
623  IOE_Write(DeviceAddr, STMPE811_REG_IO_SET_PIN, (uint8_t)IO_Pin);
624  }
625  else
626  {
627  /* Set the register */
628  IOE_Write(DeviceAddr, STMPE811_REG_IO_CLR_PIN, (uint8_t)IO_Pin);
629  }
630 }
631 
640 uint32_t stmpe811_IO_ReadPin(uint16_t DeviceAddr, uint32_t IO_Pin)
641 {
642  return((uint32_t)(IOE_Read(DeviceAddr, STMPE811_REG_IO_MP_STA) & (uint8_t)IO_Pin));
643 }
644 
650 void stmpe811_IO_EnableIT(uint16_t DeviceAddr)
651 {
652  IOE_ITConfig();
653 
654  /* Enable global IO IT source */
656 
657  /* Enable global interrupt */
658  stmpe811_EnableGlobalIT(DeviceAddr);
659 }
660 
666 void stmpe811_IO_DisableIT(uint16_t DeviceAddr)
667 {
668  /* Disable the global interrupt */
669  stmpe811_DisableGlobalIT(DeviceAddr);
670 
671  /* Disable global IO IT source */
673 }
674 
683 void stmpe811_IO_EnablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin)
684 {
685  uint8_t tmp = 0;
686 
687  /* Get the IO interrupt state */
688  tmp = IOE_Read(DeviceAddr, STMPE811_REG_IO_INT_EN);
689 
690  /* Set the interrupts to be enabled */
691  tmp |= (uint8_t)IO_Pin;
692 
693  /* Write the register new value */
694  IOE_Write(DeviceAddr, STMPE811_REG_IO_INT_EN, tmp);
695 }
696 
705 void stmpe811_IO_DisablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin)
706 {
707  uint8_t tmp = 0;
708 
709  /* Get the IO interrupt state */
710  tmp = IOE_Read(DeviceAddr, STMPE811_REG_IO_INT_EN);
711 
712  /* Set the interrupts to be Disabled */
713  tmp &= ~(uint8_t)IO_Pin;
714 
715  /* Write the register new value */
716  IOE_Write(DeviceAddr, STMPE811_REG_IO_INT_EN, tmp);
717 }
718 
726 uint32_t stmpe811_IO_ITStatus(uint16_t DeviceAddr, uint32_t IO_Pin)
727 {
728  /* Get the Interrupt status */
729  return(IOE_Read(DeviceAddr, STMPE811_REG_IO_INT_STA) & (uint8_t)IO_Pin);
730 }
731 
739 void stmpe811_IO_ClearIT(uint16_t DeviceAddr, uint32_t IO_Pin)
740 {
741  /* Clear the global IO IT pending bit */
743 
744  /* Clear the IO IT pending bit(s) */
745  IOE_Write(DeviceAddr, STMPE811_REG_IO_INT_STA, (uint8_t)IO_Pin);
746 
747  /* Clear the Edge detection pending bit*/
748  IOE_Write(DeviceAddr, STMPE811_REG_IO_ED, (uint8_t)IO_Pin);
749 
750  /* Clear the Rising edge pending bit */
751  IOE_Write(DeviceAddr, STMPE811_REG_IO_RE, (uint8_t)IO_Pin);
752 
753  /* Clear the Falling edge pending bit */
754  IOE_Write(DeviceAddr, STMPE811_REG_IO_FE, (uint8_t)IO_Pin);
755 }
756 
762 void stmpe811_TS_Start(uint16_t DeviceAddr)
763 {
764  uint8_t mode;
765 
766  /* Get the current register value */
767  mode = IOE_Read(DeviceAddr, STMPE811_REG_SYS_CTRL2);
768 
769  /* Set the Functionalities to be Enabled */
770  mode &= ~(STMPE811_IO_FCT);
771 
772  /* Write the new register value */
773  IOE_Write(DeviceAddr, STMPE811_REG_SYS_CTRL2, mode);
774 
775  /* Select TSC pins in TSC alternate mode */
777 
778  /* Set the Functionalities to be Enabled */
779  mode &= ~(STMPE811_TS_FCT | STMPE811_ADC_FCT);
780 
781  /* Set the new register value */
782  IOE_Write(DeviceAddr, STMPE811_REG_SYS_CTRL2, mode);
783 
784  /* Select Sample Time, bit number and ADC Reference */
785  IOE_Write(DeviceAddr, STMPE811_REG_ADC_CTRL1, 0x49);
786 
787  /* Wait for 2 ms */
788  IOE_Delay(2);
789 
790  /* Select the ADC clock speed: 3.25 MHz */
791  IOE_Write(DeviceAddr, STMPE811_REG_ADC_CTRL2, 0x01);
792 
793  /* Select 2 nF filter capacitor */
794  /* Configuration:
795  - Touch average control : 4 samples
796  - Touch delay time : 500 uS
797  - Panel driver setting time: 500 uS
798  */
799  IOE_Write(DeviceAddr, STMPE811_REG_TSC_CFG, 0x9A);
800 
801  /* Configure the Touch FIFO threshold: single point reading */
802  IOE_Write(DeviceAddr, STMPE811_REG_FIFO_TH, 0x01);
803 
804  /* Clear the FIFO memory content. */
805  IOE_Write(DeviceAddr, STMPE811_REG_FIFO_STA, 0x01);
806 
807  /* Put the FIFO back into operation mode */
808  IOE_Write(DeviceAddr, STMPE811_REG_FIFO_STA, 0x00);
809 
810  /* Set the range and accuracy pf the pressure measurement (Z) :
811  - Fractional part :7
812  - Whole part :1
813  */
814  IOE_Write(DeviceAddr, STMPE811_REG_TSC_FRACT_XYZ, 0x01);
815 
816  /* Set the driving capability (limit) of the device for TSC pins: 50mA */
817  IOE_Write(DeviceAddr, STMPE811_REG_TSC_I_DRIVE, 0x01);
818 
819  /* Touch screen control configuration (enable TSC):
820  - No window tracking index
821  - XYZ acquisition mode
822  */
823  IOE_Write(DeviceAddr, STMPE811_REG_TSC_CTRL, 0x01);
824 
825  /* Clear all the status pending bits if any */
826  IOE_Write(DeviceAddr, STMPE811_REG_INT_STA, 0xFF);
827 
828  /* Wait for 2 ms delay */
829  IOE_Delay(2);
830 }
831 
837 uint8_t stmpe811_TS_DetectTouch(uint16_t DeviceAddr)
838 {
839  uint8_t state;
840  uint8_t ret = 0;
841 
842  state = ((IOE_Read(DeviceAddr, STMPE811_REG_TSC_CTRL) & (uint8_t)STMPE811_TS_CTRL_STATUS) == (uint8_t)0x80);
843 
844  if(state > 0)
845  {
846  if(IOE_Read(DeviceAddr, STMPE811_REG_FIFO_SIZE) > 0)
847  {
848  ret = 1;
849  }
850  }
851  else
852  {
853  /* Reset FIFO */
854  IOE_Write(DeviceAddr, STMPE811_REG_FIFO_STA, 0x01);
855  /* Enable the FIFO again */
856  IOE_Write(DeviceAddr, STMPE811_REG_FIFO_STA, 0x00);
857  }
858 
859  return ret;
860 }
861 
869 void stmpe811_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y)
870 {
871  uint8_t dataXYZ[4];
872  uint32_t uldataXYZ;
873 
874  IOE_ReadMultiple(DeviceAddr, STMPE811_REG_TSC_DATA_NON_INC, dataXYZ, sizeof(dataXYZ)) ;
875 
876  /* Calculate positions values */
877  uldataXYZ = (dataXYZ[0] << 24)|(dataXYZ[1] << 16)|(dataXYZ[2] << 8)|(dataXYZ[3] << 0);
878  *X = (uldataXYZ >> 20) & 0x00000FFF;
879  *Y = (uldataXYZ >> 8) & 0x00000FFF;
880 
881  /* Reset FIFO */
882  IOE_Write(DeviceAddr, STMPE811_REG_FIFO_STA, 0x01);
883  /* Enable the FIFO again */
884  IOE_Write(DeviceAddr, STMPE811_REG_FIFO_STA, 0x00);
885 }
886 
892 void stmpe811_TS_EnableIT(uint16_t DeviceAddr)
893 {
894  IOE_ITConfig();
895 
896  /* Enable global TS IT source */
898 
899  /* Enable global interrupt */
900  stmpe811_EnableGlobalIT(DeviceAddr);
901 }
902 
908 void stmpe811_TS_DisableIT(uint16_t DeviceAddr)
909 {
910  /* Disable global interrupt */
911  stmpe811_DisableGlobalIT(DeviceAddr);
912 
913  /* Disable global TS IT source */
915 }
916 
922 uint8_t stmpe811_TS_ITStatus(uint16_t DeviceAddr)
923 {
924  /* Return TS interrupts status */
925  return(stmpe811_ReadGITStatus(DeviceAddr, STMPE811_TS_IT));
926 }
927 
933 void stmpe811_TS_ClearIT(uint16_t DeviceAddr)
934 {
935  /* Clear the global TS IT source */
937 }
938 
945 static uint8_t stmpe811_GetInstance(uint16_t DeviceAddr)
946 {
947  uint8_t idx = 0;
948 
949  /* Check all the registered instances */
950  for(idx = 0; idx < STMPE811_MAX_INSTANCE ; idx ++)
951  {
952  if(stmpe811[idx] == DeviceAddr)
953  {
954  return idx;
955  }
956  }
957 
958  return 0xFF;
959 }
960 
977 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#define STMPE811_TS_IT
Definition: stmpe811.h:101
uint8_t stmpe811_ReadGITStatus(uint16_t DeviceAddr, uint8_t Source)
Return the Global interrupts status.
Definition: stmpe811.c:371
#define STMPE811_REG_TSC_CFG
Definition: stmpe811.h:142
void stmpe811_Init(uint16_t DeviceAddr)
Initialize the stmpe811 and configure the needed hardware resources.
Definition: stmpe811.c:131
void stmpe811_IO_ClearIT(uint16_t DeviceAddr, uint32_t IO_Pin)
Clear the selected IO interrupt pending bit(s).
Definition: stmpe811.c:739
#define STMPE811_REG_IO_DIR
Definition: stmpe811.h:119
#define STMPE811_REG_SYS_CTRL2
Definition: stmpe811.h:105
void stmpe811_Reset(uint16_t DeviceAddr)
Reset the stmpe811 by Software.
Definition: stmpe811.c:164
#define STMPE811_EDGE_RISING
Definition: stmpe811.h:192
void stmpe811_SetITType(uint16_t DeviceAddr, uint8_t Type)
Set the global interrupt Type.
Definition: stmpe811.c:321
#define STMPE811_REG_FIFO_SIZE
Definition: stmpe811.h:149
uint8_t stmpe811_IO_Config(uint16_t DeviceAddr, uint32_t IO_Pin, IO_ModeTypedef IO_Mode)
Configures the IO pin(s) according to IO mode structure value.
Definition: stmpe811.c:437
void stmpe811_SetITPolarity(uint16_t DeviceAddr, uint8_t Polarity)
Set the global interrupt Polarity.
Definition: stmpe811.c:295
uint8_t stmpe811_TS_DetectTouch(uint16_t DeviceAddr)
Return if there is touch detected or not.
Definition: stmpe811.c:837
uint32_t idx
Definition: lcd_log.c:247
#define STMPE811_REG_IO_CLR_PIN
Definition: stmpe811.h:117
#define STMPE811_REG_FIFO_TH
Definition: stmpe811.h:147
#define STMPE811_REG_IO_MP_STA
Definition: stmpe811.h:118
void stmpe811_DisableITSource(uint16_t DeviceAddr, uint8_t Source)
Disable the interrupt mode for the selected IT source.
Definition: stmpe811.c:273
#define STMPE811_REG_IO_INT_STA
Definition: stmpe811.h:113
IO_DrvTypeDef stmpe811_io_drv
Definition: stmpe811.c:93
IO_ModeTypedef
Definition: io.h:74
#define STMPE811_REG_INT_CTRL
Definition: stmpe811.h:109
#define STMPE811_POLARITY_HIGH
Definition: stmpe811.h:188
#define STMPE811_MAX_INSTANCE
Definition: stmpe811.c:61
void stmpe811_IO_EnableAF(uint16_t DeviceAddr, uint32_t IO_Pin)
Enable the AF for the selected IO pin(s).
Definition: stmpe811.c:552
#define STMPE811_TS_CTRL_STATUS
Definition: stmpe811.h:196
#define STMPE811_TYPE_EDGE
Definition: stmpe811.h:184
uint8_t stmpe811[STMPE811_MAX_INSTANCE]
Definition: stmpe811.c:109
#define STMPE811_TOUCH_IO_ALL
Definition: stmpe811.h:165
#define STMPE811_REG_FIFO_STA
Definition: stmpe811.h:148
#define STMPE811_ADC_FCT
Definition: stmpe811.h:86
void IOE_ITConfig(void)
void stmpe811_IO_DisableIT(uint16_t DeviceAddr)
Disable the global IO interrupt source.
Definition: stmpe811.c:666
#define STMPE811_REG_CHP_ID_MSB
Definition: stmpe811.h:79
void IOE_Delay(uint32_t delay)
void stmpe811_TS_Start(uint16_t DeviceAddr)
Configures the touch Screen Controller (Single point detection)
Definition: stmpe811.c:762
void stmpe811_IO_InitPin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Direction)
Initialize the selected IO pin direction.
Definition: stmpe811.c:500
#define STMPE811_EDGE_FALLING
Definition: stmpe811.h:191
#define STMPE811_REG_TSC_I_DRIVE
Definition: stmpe811.h:157
#define STMPE811_DIRECTION_OUT
Definition: stmpe811.h:180
#define STMPE811_REG_IO_INT_EN
Definition: stmpe811.h:112
uint16_t IOE_ReadMultiple(uint8_t addr, uint8_t reg, uint8_t *buffer, uint16_t length)
#define STMPE811_REG_INT_EN
Definition: stmpe811.h:110
This file contains all the functions prototypes for the stmpe811.c IO expander driver.
uint8_t IOE_Read(uint8_t addr, uint8_t reg)
void stmpe811_IO_DisablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin)
Disable interrupt mode for the selected IO pin(s).
Definition: stmpe811.c:705
void stmpe811_IO_EnablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin)
Enable interrupt mode for the selected IO pin(s).
Definition: stmpe811.c:683
#define STMPE811_IO_FCT
Definition: stmpe811.h:88
void stmpe811_IO_SetEdgeMode(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Edge)
Configure the Edge for which a transition is detectable for the selected pin.
Definition: stmpe811.c:577
void IOE_Write(uint8_t addr, uint8_t reg, uint8_t value)
TS_DrvTypeDef stmpe811_ts_drv
Definition: stmpe811.c:78
uint16_t stmpe811_ReadID(uint16_t DeviceAddr)
Read the stmpe811 IO Expander device ID.
Definition: stmpe811.c:184
uint32_t stmpe811_IO_ITStatus(uint16_t DeviceAddr, uint32_t IO_Pin)
Check the status of the selected IO interrupt pending bit.
Definition: stmpe811.c:726
void stmpe811_DisableGlobalIT(uint16_t DeviceAddr)
Disable the Global interrupt.
Definition: stmpe811.c:218
#define STMPE811_TS_FCT
Definition: stmpe811.h:87
void stmpe811_IO_EnableIT(uint16_t DeviceAddr)
Enable the global IO interrupt source.
Definition: stmpe811.c:650
void stmpe811_IO_DisableAF(uint16_t DeviceAddr, uint32_t IO_Pin)
Disable the AF for the selected IO pin(s).
Definition: stmpe811.c:529
#define STMPE811_REG_TSC_FRACT_XYZ
Definition: stmpe811.h:154
#define STMPE811_REG_IO_RE
Definition: stmpe811.h:121
#define STMPE811_GIT_EN
Definition: stmpe811.h:83
void stmpe811_EnableGlobalIT(uint16_t DeviceAddr)
Enable the Global interrupt.
Definition: stmpe811.c:199
void stmpe811_IO_Start(uint16_t DeviceAddr, uint32_t IO_Pin)
Start the IO functionality use and disable the AF for selected IO pin(s).
Definition: stmpe811.c:405
#define STMPE811_REG_IO_FE
Definition: stmpe811.h:122
#define STMPE811_REG_TSC_CTRL
Definition: stmpe811.h:141
#define STMPE811_REG_CHP_ID_LSB
Definition: stmpe811.h:78
uint32_t stmpe811_IO_ReadPin(uint16_t DeviceAddr, uint32_t IO_Pin)
Return the state of the selected IO pin(s).
Definition: stmpe811.c:640
#define STMPE811_DIRECTION_IN
Definition: stmpe811.h:179
void stmpe811_EnableITSource(uint16_t DeviceAddr, uint8_t Source)
Enable the interrupt mode for the selected IT source.
Definition: stmpe811.c:246
void stmpe811_TS_DisableIT(uint16_t DeviceAddr)
Configure the selected source to generate a global interrupt or not.
Definition: stmpe811.c:908
#define STMPE811_POLARITY_LOW
Definition: stmpe811.h:187
#define STMPE811_REG_SYS_CTRL1
Definition: stmpe811.h:104
void stmpe811_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y)
Get the touch screen X and Y positions values.
Definition: stmpe811.c:869
void stmpe811_ClearGlobalIT(uint16_t DeviceAddr, uint8_t Source)
Clear the selected Global interrupt pending bit(s)
Definition: stmpe811.c:391
#define STMPE811_REG_ADC_CTRL2
Definition: stmpe811.h:129
uint8_t stmpe811_GlobalITStatus(uint16_t DeviceAddr, uint8_t Source)
Check the selected Global interrupt source pending bit.
Definition: stmpe811.c:352
#define STMPE811_GIT_IO
Definition: stmpe811.h:92
#define STMPE811_REG_IO_AF
Definition: stmpe811.h:123
#define STMPE811_REG_IO_ED
Definition: stmpe811.h:120
void IOE_Init(void)
uint8_t stmpe811_TS_ITStatus(uint16_t DeviceAddr)
Configure the selected source to generate a global interrupt or not.
Definition: stmpe811.c:922
void stmpe811_TS_EnableIT(uint16_t DeviceAddr)
Configure the selected source to generate a global interrupt or not.
Definition: stmpe811.c:892
#define STMPE811_REG_ADC_CTRL1
Definition: stmpe811.h:128
#define STMPE811_REG_INT_STA
Definition: stmpe811.h:111
void stmpe811_IO_WritePin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t PinState)
Write a new IO pin state.
Definition: stmpe811.c:617
void stmpe811_TS_ClearIT(uint16_t DeviceAddr)
Configure the selected source to generate a global interrupt or not.
Definition: stmpe811.c:933
#define STMPE811_REG_TSC_DATA_NON_INC
Definition: stmpe811.h:156
#define STMPE811_REG_IO_SET_PIN
Definition: stmpe811.h:116
#define STMPE811_TYPE_LEVEL
Definition: stmpe811.h:183