STM32F769IDiscovery  1.00
uDANTE Audio Networking with STM32F7 DISCO board
stm32f7xx_ll_sdmmc.c
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1 
168 /* Includes ------------------------------------------------------------------*/
169 #include "stm32f7xx_hal.h"
170 
180 #if defined (HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED)
181 
182 /* Private typedef -----------------------------------------------------------*/
183 /* Private define ------------------------------------------------------------*/
184 /* Private macro -------------------------------------------------------------*/
185 /* Private variables ---------------------------------------------------------*/
186 /* Private function prototypes -----------------------------------------------*/
187 /* Exported functions --------------------------------------------------------*/
188 
214 {
215  uint32_t tmpreg = 0;
216 
217  /* Check the parameters */
225 
226  /* Set SDMMC configuration parameters */
227  tmpreg |= (Init.ClockEdge |\
228  Init.ClockBypass |\
229  Init.ClockPowerSave |\
230  Init.BusWide |\
231  Init.HardwareFlowControl |\
232  Init.ClockDiv
233  );
234 
235  /* Write to SDMMC CLKCR */
236  MODIFY_REG(SDMMCx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
237 
238  return HAL_OK;
239 }
240 
241 
266 uint32_t SDMMC_ReadFIFO(SDMMC_TypeDef *SDMMCx)
267 {
268  /* Read data from Rx FIFO */
269  return (SDMMCx->FIFO);
270 }
271 
278 HAL_StatusTypeDef SDMMC_WriteFIFO(SDMMC_TypeDef *SDMMCx, uint32_t *pWriteData)
279 {
280  /* Write data to FIFO */
281  SDMMCx->FIFO = *pWriteData;
282 
283  return HAL_OK;
284 }
285 
311 {
312  /* Set power state to ON */
313  SDMMCx->POWER = SDMMC_POWER_PWRCTRL;
314 
315  return HAL_OK;
316 }
317 
324 {
325  /* Set power state to OFF */
326  SDMMCx->POWER = (uint32_t)0x00000000;
327 
328  return HAL_OK;
329 }
330 
340 uint32_t SDMMC_GetPowerState(SDMMC_TypeDef *SDMMCx)
341 {
342  return (SDMMCx->POWER & SDMMC_POWER_PWRCTRL);
343 }
344 
354 {
355  uint32_t tmpreg = 0;
356 
357  /* Check the parameters */
361  assert_param(IS_SDMMC_CPSM(Command->CPSM));
362 
363  /* Set the SDMMC Argument value */
364  SDMMCx->ARG = Command->Argument;
365 
366  /* Set SDMMC command parameters */
367  tmpreg |= (uint32_t)(Command->CmdIndex |\
368  Command->Response |\
369  Command->WaitForInterrupt |\
370  Command->CPSM);
371 
372  /* Write to SDMMC CMD register */
373  MODIFY_REG(SDMMCx->CMD, CMD_CLEAR_MASK, tmpreg);
374 
375  return HAL_OK;
376 }
377 
384 {
385  return (uint8_t)(SDMMCx->RESPCMD);
386 }
387 
388 
400 uint32_t SDMMC_GetResponse(SDMMC_TypeDef *SDMMCx, uint32_t Response)
401 {
402  __IO uint32_t tmp = 0;
403 
404  /* Check the parameters */
405  assert_param(IS_SDMMC_RESP(Response));
406 
407  /* Get the response */
408  tmp = (uint32_t)&(SDMMCx->RESP1) + Response;
409 
410  return (*(__IO uint32_t *) tmp);
411 }
412 
422 {
423  uint32_t tmpreg = 0;
424 
425  /* Check the parameters */
431 
432  /* Set the SDMMC Data TimeOut value */
433  SDMMCx->DTIMER = Data->DataTimeOut;
434 
435  /* Set the SDMMC DataLength value */
436  SDMMCx->DLEN = Data->DataLength;
437 
438  /* Set the SDMMC data configuration parameters */
439  tmpreg |= (uint32_t)(Data->DataBlockSize |\
440  Data->TransferDir |\
441  Data->TransferMode |\
442  Data->DPSM);
443 
444  /* Write to SDMMC DCTRL */
445  MODIFY_REG(SDMMCx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
446 
447  return HAL_OK;
448 
449 }
450 
456 uint32_t SDMMC_GetDataCounter(SDMMC_TypeDef *SDMMCx)
457 {
458  return (SDMMCx->DCOUNT);
459 }
460 
466 uint32_t SDMMC_GetFIFOCount(SDMMC_TypeDef *SDMMCx)
467 {
468  return (SDMMCx->FIFO);
469 }
470 
471 
481 HAL_StatusTypeDef SDMMC_SetSDMMCReadWaitMode(SDMMC_TypeDef *SDMMCx, uint32_t SDMMC_ReadWaitMode)
482 {
483  /* Check the parameters */
484  assert_param(IS_SDMMC_READWAIT_MODE(SDMMC_ReadWaitMode));
485 
486  /* Set SDMMC read wait mode */
487  MODIFY_REG(SDMMCx->DCTRL, SDMMC_DCTRL_RWMOD, SDMMC_ReadWaitMode);
488 
489  return HAL_OK;
490 }
491 
500 #endif /* (HAL_SD_MODULE_ENABLED) || (HAL_MMC_MODULE_ENABLED) */
501 
509 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
__IO uint32_t DCTRL
Definition: stm32f745xx.h:826
#define MODIFY_REG(REG, CLEARMASK, SETMASK)
Definition: stm32f7xx.h:190
uint32_t SDMMC_GetDataCounter(SDMMC_TypeDef *SDMMCx)
HAL_StatusTypeDef SDMMC_DataConfig(SDMMC_TypeDef *SDMMCx, SDMMC_DataInitTypeDef *Data)
__IO uint32_t POWER
Definition: stm32f745xx.h:815
#define assert_param(expr)
Include module's header file.
SDMMC Configuration Structure definition.
#define IS_SDMMC_HARDWARE_FLOW_CONTROL(CONTROL)
__IO uint32_t DLEN
Definition: stm32f745xx.h:825
#define IS_SDMMC_ALL_INSTANCE(__INSTANCE__)
Definition: stm32f745xx.h:8884
__IO uint32_t FIFO
Definition: stm32f745xx.h:834
#define IS_SDMMC_DATA_LENGTH(LENGTH)
#define CMD_CLEAR_MASK
HAL_StatusTypeDef SDMMC_SetSDMMCReadWaitMode(SDMMC_TypeDef *SDMMCx, uint32_t SDMMC_ReadWaitMode)
HAL_StatusTypeDef SDMMC_SendCommand(SDMMC_TypeDef *SDMMCx, SDMMC_CmdInitTypeDef *Command)
HAL_StatusTypeDef SDMMC_WriteFIFO(SDMMC_TypeDef *SDMMCx, uint32_t *pWriteData)
#define IS_SDMMC_CMD_INDEX(INDEX)
#define IS_SDMMC_TRANSFER_DIR(DIR)
#define SDMMC_DCTRL_RWMOD
Definition: stm32f745xx.h:6511
#define IS_SDMMC_DPSM(DPSM)
#define IS_SDMMC_READWAIT_MODE(MODE)
HAL_StatusTypeDef SDMMC_PowerState_OFF(SDMMC_TypeDef *SDMMCx)
#define IS_SDMMC_CLOCK_EDGE(EDGE)
__IO uint32_t DTIMER
Definition: stm32f745xx.h:824
uint8_t SDMMC_GetCommandResponse(SDMMC_TypeDef *SDMMCx)
HAL_StatusTypeDef SDMMC_Init(SDMMC_TypeDef *SDMMCx, SDMMC_InitTypeDef Init)
__I uint32_t RESPCMD
Definition: stm32f745xx.h:819
#define __IO
Definition: core_cm0.h:213
uint32_t SDMMC_GetPowerState(SDMMC_TypeDef *SDMMCx)
#define IS_SDMMC_WAIT(WAIT)
This file contains all the functions prototypes for the HAL module driver.
__IO uint32_t CMD
Definition: stm32f745xx.h:818
uint32_t SDMMC_GetFIFOCount(SDMMC_TypeDef *SDMMCx)
#define IS_SDMMC_CLKDIV(DIV)
uint32_t SDMMC_GetResponse(SDMMC_TypeDef *SDMMCx, uint32_t Response)
#define IS_SDMMC_CPSM(CPSM)
#define IS_SDMMC_BUS_WIDE(WIDE)
#define IS_SDMMC_BLOCK_SIZE(SIZE)
#define SDMMC_POWER_PWRCTRL
Definition: stm32f745xx.h:6441
#define IS_SDMMC_TRANSFER_MODE(MODE)
#define IS_SDMMC_RESPONSE(RESPONSE)
__IO uint32_t ARG
Definition: stm32f745xx.h:817
uint32_t SDMMC_ReadFIFO(SDMMC_TypeDef *SDMMCx)
__I uint32_t DCOUNT
Definition: stm32f745xx.h:827
HAL_StatusTypeDef SDMMC_PowerState_ON(SDMMC_TypeDef *SDMMCx)
#define DCTRL_CLEAR_MASK
SDMMC Command Control structure.
SD host Interface.
Definition: stm32f745xx.h:813
#define IS_SDMMC_RESP(RESP)
HAL_StatusTypeDef
HAL Status structures definition.
#define CLKCR_CLEAR_MASK
__IO uint32_t CLKCR
Definition: stm32f745xx.h:816
__I uint32_t RESP1
Definition: stm32f745xx.h:820
#define IS_SDMMC_CLOCK_BYPASS(BYPASS)
#define IS_SDMMC_CLOCK_POWER_SAVE(SAVE)
SDMMC Data Control structure.