STM32F769IDiscovery  1.00
uDANTE Audio Networking with STM32F7 DISCO board
Data Structures | Macros | Functions
stm32f7xx_hal_tim_ex.h File Reference

Header file of TIM HAL Extension module. More...

#include "stm32f7xx_hal_def.h"

Go to the source code of this file.

Data Structures

struct  TIM_HallSensor_InitTypeDef
 TIM Hall sensor Configuration Structure definition. More...
 
struct  TIM_MasterConfigTypeDef
 TIM Master configuration Structure definition. More...
 
struct  TIM_BreakDeadTimeConfigTypeDef
 TIM Break input(s) and Dead time configuration Structure definition. More...
 

Macros

#define TIM_CHANNEL_1   ((uint32_t)0x0000U)
 
#define TIM_CHANNEL_2   ((uint32_t)0x0004U)
 
#define TIM_CHANNEL_3   ((uint32_t)0x0008U)
 
#define TIM_CHANNEL_4   ((uint32_t)0x000CU)
 
#define TIM_CHANNEL_5   ((uint32_t)0x0010U)
 
#define TIM_CHANNEL_6   ((uint32_t)0x0014U)
 
#define TIM_CHANNEL_ALL   ((uint32_t)0x003CU)
 
#define TIM_OCMODE_TIMING   ((uint32_t)0x0000U)
 
#define TIM_OCMODE_ACTIVE   ((uint32_t)TIM_CCMR1_OC1M_0)
 
#define TIM_OCMODE_INACTIVE   ((uint32_t)TIM_CCMR1_OC1M_1)
 
#define TIM_OCMODE_TOGGLE   ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
 
#define TIM_OCMODE_PWM1   ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)
 
#define TIM_OCMODE_PWM2   ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
 
#define TIM_OCMODE_FORCED_ACTIVE   ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)
 
#define TIM_OCMODE_FORCED_INACTIVE   ((uint32_t)TIM_CCMR1_OC1M_2)
 
#define TIM_OCMODE_RETRIGERRABLE_OPM1   ((uint32_t)TIM_CCMR1_OC1M_3)
 
#define TIM_OCMODE_RETRIGERRABLE_OPM2   ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0)
 
#define TIM_OCMODE_COMBINED_PWM1   ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2)
 
#define TIM_OCMODE_COMBINED_PWM2   ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2)
 
#define TIM_OCMODE_ASSYMETRIC_PWM1   ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2)
 
#define TIM_OCMODE_ASSYMETRIC_PWM2   ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M)
 
#define TIM_TIM2_TIM8_TRGO   (0x00000000U)
 
#define TIM_TIM2_ETH_PTP   (0x00000400U)
 
#define TIM_TIM2_USBFS_SOF   (0x00000800U)
 
#define TIM_TIM2_USBHS_SOF   (0x00000C00U)
 
#define TIM_TIM5_GPIO   (0x00000000U)
 
#define TIM_TIM5_LSI   (0x00000040U)
 
#define TIM_TIM5_LSE   (0x00000080U)
 
#define TIM_TIM5_RTC   (0x000000C0U)
 
#define TIM_TIM11_GPIO   (0x00000000U)
 
#define TIM_TIM11_SPDIFRX   (0x00000001U)
 
#define TIM_TIM11_HSE   (0x00000002U)
 
#define TIM_TIM11_MCO1   (0x00000003U)
 
#define TIM_CLEARINPUTSOURCE_ETR   ((uint32_t)0x0001U)
 
#define TIM_CLEARINPUTSOURCE_OCREFCLR   ((uint32_t)0x0002U)
 
#define TIM_CLEARINPUTSOURCE_NONE   ((uint32_t)0x0000U)
 
#define TIM_BREAK2_DISABLE   ((uint32_t)0x00000000U)
 
#define TIM_BREAK2_ENABLE   ((uint32_t)TIM_BDTR_BK2E)
 
#define TIM_BREAK2POLARITY_LOW   ((uint32_t)0x00000000U)
 
#define TIM_BREAK2POLARITY_HIGH   (TIM_BDTR_BK2P)
 
#define TIM_GROUPCH5_NONE   ((uint32_t)0x00000000U) /* !< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */
 
#define TIM_GROUPCH5_OC1REFC   (TIM_CCR5_GC5C1) /* !< OC1REFC is the logical AND of OC1REFC and OC5REF */
 
#define TIM_GROUPCH5_OC2REFC   (TIM_CCR5_GC5C2) /* !< OC2REFC is the logical AND of OC2REFC and OC5REF */
 
#define TIM_GROUPCH5_OC3REFC   (TIM_CCR5_GC5C3) /* !< OC3REFC is the logical AND of OC3REFC and OC5REF */
 
#define TIM_TRGO2_RESET   ((uint32_t)0x00000000U)
 
#define TIM_TRGO2_ENABLE   ((uint32_t)(TIM_CR2_MMS2_0))
 
#define TIM_TRGO2_UPDATE   ((uint32_t)(TIM_CR2_MMS2_1))
 
#define TIM_TRGO2_OC1   ((uint32_t)(TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
 
#define TIM_TRGO2_OC1REF   ((uint32_t)(TIM_CR2_MMS2_2))
 
#define TIM_TRGO2_OC2REF   ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0))
 
#define TIM_TRGO2_OC3REF   ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1))
 
#define TIM_TRGO2_OC4REF   ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
 
#define TIM_TRGO2_OC5REF   ((uint32_t)(TIM_CR2_MMS2_3))
 
#define TIM_TRGO2_OC6REF   ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_0))
 
#define TIM_TRGO2_OC4REF_RISINGFALLING   ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1))
 
#define TIM_TRGO2_OC6REF_RISINGFALLING   ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
 
#define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING   ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2))
 
#define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING   ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0))
 
#define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING   ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 |TIM_CR2_MMS2_1))
 
#define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING   ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
 
#define TIM_SLAVEMODE_DISABLE   ((uint32_t)0x0000U)
 
#define TIM_SLAVEMODE_RESET   ((uint32_t)(TIM_SMCR_SMS_2))
 
#define TIM_SLAVEMODE_GATED   ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0))
 
#define TIM_SLAVEMODE_TRIGGER   ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1))
 
#define TIM_SLAVEMODE_EXTERNAL1   ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0))
 
#define TIM_SLAVEMODE_COMBINED_RESETTRIGGER   ((uint32_t)(TIM_SMCR_SMS_3))
 
#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__)
 Sets the TIM Capture Compare Register value on runtime without calling another time ConfigChannel function. More...
 
#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__)
 Gets the TIM Capture Compare Register value on runtime. More...
 
#define IS_TIM_CHANNELS(CHANNEL)
 
#define IS_TIM_PWMI_CHANNELS(CHANNEL)
 
#define IS_TIM_OPM_CHANNELS(CHANNEL)
 
#define IS_TIM_COMPLEMENTARY_CHANNELS(CHANNEL)
 
#define IS_TIM_PWM_MODE(MODE)
 
#define IS_TIM_OC_MODE(MODE)
 
#define IS_TIM_REMAP(__TIM_REMAP__)
 
#define IS_TIM_DEADTIME(__DEADTIME__)    ((__DEADTIME__) <= 0xFF)
 
#define IS_TIM_BREAK_FILTER(__FILTER__)   ((__FILTER__) <= 0xF)
 
#define IS_TIM_CLEARINPUT_SOURCE(MODE)
 
#define IS_TIM_BREAK2_STATE(STATE)
 
#define IS_TIM_BREAK2_POLARITY(__POLARITY__)
 
#define IS_TIM_GROUPCH5(OCREF)   ((((OCREF) & 0x1FFFFFFF) == 0x00000000))
 
#define IS_TIM_TRGO2_SOURCE(SOURCE)
 
#define IS_TIM_SLAVE_MODE(MODE)
 

Functions

HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init (TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
 
HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit (TIM_HandleTypeDef *htim)
 
void HAL_TIMEx_HallSensor_MspInit (TIM_HandleTypeDef *htim)
 
void HAL_TIMEx_HallSensor_MspDeInit (TIM_HandleTypeDef *htim)
 
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start (TIM_HandleTypeDef *htim)
 
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop (TIM_HandleTypeDef *htim)
 
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT (TIM_HandleTypeDef *htim)
 
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT (TIM_HandleTypeDef *htim)
 
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA (TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
 
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA (TIM_HandleTypeDef *htim)
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA (TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
 
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA (TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
 
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA (TIM_HandleTypeDef *htim, uint32_t Channel)
 
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start (TIM_HandleTypeDef *htim, uint32_t OutputChannel)
 
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop (TIM_HandleTypeDef *htim, uint32_t OutputChannel)
 
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT (TIM_HandleTypeDef *htim, uint32_t OutputChannel)
 
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t OutputChannel)
 
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent (TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
 
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT (TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
 
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA (TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
 
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization (TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig)
 
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime (TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
 
HAL_StatusTypeDef HAL_TIMEx_RemapConfig (TIM_HandleTypeDef *htim, uint32_t Remap)
 
HAL_StatusTypeDef HAL_TIMEx_GroupChannel5 (TIM_HandleTypeDef *htim, uint32_t OCRef)
 
void HAL_TIMEx_CommutationCallback (TIM_HandleTypeDef *htim)
 
void HAL_TIMEx_BreakCallback (TIM_HandleTypeDef *htim)
 
void HAL_TIMEx_DMACommutationCplt (DMA_HandleTypeDef *hdma)
 
HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState (TIM_HandleTypeDef *htim)
 

Detailed Description

Header file of TIM HAL Extension module.

Author
MCD Application Team
Version
V1.1.0
Date
22-April-2016
Attention

© COPYRIGHT(c) 2016 STMicroelectronics

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
  3. Neither the name of STMicroelectronics nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Definition in file stm32f7xx_hal_tim_ex.h.

Generated by   doxygen 1.8.11