STM32F769IDiscovery  1.00
uDANTE Audio Networking with STM32F7 DISCO board
Macros
TIMEx Private Macros

Macros

#define IS_TIM_CHANNELS(CHANNEL)
 
#define IS_TIM_PWMI_CHANNELS(CHANNEL)
 
#define IS_TIM_OPM_CHANNELS(CHANNEL)
 
#define IS_TIM_COMPLEMENTARY_CHANNELS(CHANNEL)
 
#define IS_TIM_PWM_MODE(MODE)
 
#define IS_TIM_OC_MODE(MODE)
 
#define IS_TIM_REMAP(__TIM_REMAP__)
 
#define IS_TIM_DEADTIME(__DEADTIME__)    ((__DEADTIME__) <= 0xFF)
 
#define IS_TIM_BREAK_FILTER(__FILTER__)   ((__FILTER__) <= 0xF)
 
#define IS_TIM_CLEARINPUT_SOURCE(MODE)
 
#define IS_TIM_BREAK2_STATE(STATE)
 
#define IS_TIM_BREAK2_POLARITY(__POLARITY__)
 
#define IS_TIM_GROUPCH5(OCREF)   ((((OCREF) & 0x1FFFFFFF) == 0x00000000))
 
#define IS_TIM_TRGO2_SOURCE(SOURCE)
 
#define IS_TIM_SLAVE_MODE(MODE)
 

Detailed Description

Macro Definition Documentation

#define IS_TIM_BREAK2_POLARITY (   __POLARITY__)
Value:
(((__POLARITY__) == TIM_BREAK2POLARITY_LOW) || \
((__POLARITY__) == TIM_BREAK2POLARITY_HIGH))
#define TIM_BREAK2POLARITY_HIGH
#define TIM_BREAK2POLARITY_LOW

Definition at line 543 of file stm32f7xx_hal_tim_ex.h.

#define IS_TIM_BREAK2_STATE (   STATE)
Value:
(((STATE) == TIM_BREAK2_ENABLE) || \
((STATE) == TIM_BREAK2_DISABLE))
#define TIM_BREAK2_DISABLE
#define TIM_BREAK2_ENABLE

Definition at line 541 of file stm32f7xx_hal_tim_ex.h.

#define IS_TIM_BREAK_FILTER (   __FILTER__)    ((__FILTER__) <= 0xF)

Definition at line 537 of file stm32f7xx_hal_tim_ex.h.

#define IS_TIM_CHANNELS (   CHANNEL)
Value:
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3) || \
((CHANNEL) == TIM_CHANNEL_4) || \
((CHANNEL) == TIM_CHANNEL_5) || \
((CHANNEL) == TIM_CHANNEL_6) || \
((CHANNEL) == TIM_CHANNEL_ALL))
#define TIM_CHANNEL_4
#define TIM_CHANNEL_1
#define TIM_CHANNEL_3
#define TIM_CHANNEL_5
#define TIM_CHANNEL_2
#define TIM_CHANNEL_ALL
#define TIM_CHANNEL_6

Definition at line 492 of file stm32f7xx_hal_tim_ex.h.

#define IS_TIM_CLEARINPUT_SOURCE (   MODE)
Value:
(((MODE) == TIM_CLEARINPUTSOURCE_ETR) || \
#define TIM_CLEARINPUTSOURCE_NONE
#define TIM_CLEARINPUTSOURCE_OCREFCLR
#define TIM_CLEARINPUTSOURCE_ETR

Definition at line 538 of file stm32f7xx_hal_tim_ex.h.

#define IS_TIM_COMPLEMENTARY_CHANNELS (   CHANNEL)
Value:
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3))
#define TIM_CHANNEL_1
#define TIM_CHANNEL_3
#define TIM_CHANNEL_2

Definition at line 506 of file stm32f7xx_hal_tim_ex.h.

#define IS_TIM_DEADTIME (   __DEADTIME__)    ((__DEADTIME__) <= 0xFF)

Definition at line 536 of file stm32f7xx_hal_tim_ex.h.

#define IS_TIM_GROUPCH5 (   OCREF)    ((((OCREF) & 0x1FFFFFFF) == 0x00000000))

Definition at line 545 of file stm32f7xx_hal_tim_ex.h.

#define IS_TIM_OC_MODE (   MODE)
Value:
(((MODE) == TIM_OCMODE_TIMING) || \
((MODE) == TIM_OCMODE_ACTIVE) || \
((MODE) == TIM_OCMODE_INACTIVE) || \
((MODE) == TIM_OCMODE_TOGGLE) || \
((MODE) == TIM_OCMODE_FORCED_ACTIVE) || \
((MODE) == TIM_OCMODE_FORCED_INACTIVE) || \
#define TIM_OCMODE_FORCED_ACTIVE
#define TIM_OCMODE_INACTIVE
#define TIM_OCMODE_ACTIVE
#define TIM_OCMODE_RETRIGERRABLE_OPM2
#define TIM_OCMODE_RETRIGERRABLE_OPM1
#define TIM_OCMODE_TOGGLE
#define TIM_OCMODE_TIMING
#define TIM_OCMODE_FORCED_INACTIVE

Definition at line 516 of file stm32f7xx_hal_tim_ex.h.

#define IS_TIM_OPM_CHANNELS (   CHANNEL)
Value:
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2))
#define TIM_CHANNEL_1
#define TIM_CHANNEL_2

Definition at line 503 of file stm32f7xx_hal_tim_ex.h.

#define IS_TIM_PWM_MODE (   MODE)
Value:
(((MODE) == TIM_OCMODE_PWM1) || \
((MODE) == TIM_OCMODE_PWM2) || \
((MODE) == TIM_OCMODE_COMBINED_PWM1) || \
((MODE) == TIM_OCMODE_COMBINED_PWM2) || \
((MODE) == TIM_OCMODE_ASSYMETRIC_PWM1) || \
#define TIM_OCMODE_COMBINED_PWM1
#define TIM_OCMODE_PWM2
#define TIM_OCMODE_ASSYMETRIC_PWM1
#define TIM_OCMODE_ASSYMETRIC_PWM2
#define TIM_OCMODE_COMBINED_PWM2
#define TIM_OCMODE_PWM1

Definition at line 509 of file stm32f7xx_hal_tim_ex.h.

#define IS_TIM_PWMI_CHANNELS (   CHANNEL)
Value:
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2))
#define TIM_CHANNEL_1
#define TIM_CHANNEL_2

Definition at line 500 of file stm32f7xx_hal_tim_ex.h.

#define IS_TIM_REMAP (   __TIM_REMAP__)
Value:
(((__TIM_REMAP__) == TIM_TIM2_TIM8_TRGO)||\
((__TIM_REMAP__) == TIM_TIM2_ETH_PTP)||\
((__TIM_REMAP__) == TIM_TIM2_USBFS_SOF)||\
((__TIM_REMAP__) == TIM_TIM2_USBHS_SOF)||\
((__TIM_REMAP__) == TIM_TIM5_GPIO)||\
((__TIM_REMAP__) == TIM_TIM5_LSI)||\
((__TIM_REMAP__) == TIM_TIM5_LSE)||\
((__TIM_REMAP__) == TIM_TIM5_RTC)||\
((__TIM_REMAP__) == TIM_TIM11_GPIO)||\
((__TIM_REMAP__) == TIM_TIM11_SPDIFRX)||\
((__TIM_REMAP__) == TIM_TIM11_HSE)||\
((__TIM_REMAP__) == TIM_TIM11_MCO1))
#define TIM_TIM11_SPDIFRX
#define TIM_TIM2_TIM8_TRGO
#define TIM_TIM11_GPIO
#define TIM_TIM5_RTC
#define TIM_TIM5_GPIO
#define TIM_TIM2_USBFS_SOF
#define TIM_TIM5_LSE
#define TIM_TIM11_MCO1
#define TIM_TIM11_HSE
#define TIM_TIM2_USBHS_SOF
#define TIM_TIM2_ETH_PTP
#define TIM_TIM5_LSI

Definition at line 524 of file stm32f7xx_hal_tim_ex.h.

#define IS_TIM_SLAVE_MODE (   MODE)
Value:
(((MODE) == TIM_SLAVEMODE_DISABLE) || \
((MODE) == TIM_SLAVEMODE_RESET) || \
((MODE) == TIM_SLAVEMODE_GATED) || \
((MODE) == TIM_SLAVEMODE_TRIGGER) || \
((MODE) == TIM_SLAVEMODE_EXTERNAL1) || \
#define TIM_SLAVEMODE_RESET
#define TIM_SLAVEMODE_DISABLE
#define TIM_SLAVEMODE_EXTERNAL1
#define TIM_SLAVEMODE_GATED
#define TIM_SLAVEMODE_TRIGGER
#define TIM_SLAVEMODE_COMBINED_RESETTRIGGER

Definition at line 563 of file stm32f7xx_hal_tim_ex.h.

#define IS_TIM_TRGO2_SOURCE (   SOURCE)
Value:
(((SOURCE) == TIM_TRGO2_RESET) || \
((SOURCE) == TIM_TRGO2_ENABLE) || \
((SOURCE) == TIM_TRGO2_UPDATE) || \
((SOURCE) == TIM_TRGO2_OC1) || \
((SOURCE) == TIM_TRGO2_OC1REF) || \
((SOURCE) == TIM_TRGO2_OC2REF) || \
((SOURCE) == TIM_TRGO2_OC3REF) || \
((SOURCE) == TIM_TRGO2_OC3REF) || \
((SOURCE) == TIM_TRGO2_OC4REF) || \
((SOURCE) == TIM_TRGO2_OC5REF) || \
((SOURCE) == TIM_TRGO2_OC6REF) || \
((SOURCE) == TIM_TRGO2_OC4REF_RISINGFALLING) || \
((SOURCE) == TIM_TRGO2_OC6REF_RISINGFALLING) || \
#define TIM_TRGO2_OC4REF
#define TIM_TRGO2_OC1
#define TIM_TRGO2_ENABLE
#define TIM_TRGO2_OC1REF
#define TIM_TRGO2_OC4REF_RISINGFALLING
#define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING
#define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING
#define TIM_TRGO2_RESET
#define TIM_TRGO2_OC3REF
#define TIM_TRGO2_UPDATE
#define TIM_TRGO2_OC5REF
#define TIM_TRGO2_OC6REF_RISINGFALLING
#define TIM_TRGO2_OC6REF
#define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING
#define TIM_TRGO2_OC2REF
#define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING

Definition at line 546 of file stm32f7xx_hal_tim_ex.h.