STM32F769IDiscovery  1.00
uDANTE Audio Networking with STM32F7 DISCO board
stm32f7xx_hal_spdifrx.c
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1 
124 /* Includes ------------------------------------------------------------------*/
125 #include "stm32f7xx_hal.h"
126 
135 #ifdef HAL_SPDIFRX_MODULE_ENABLED
136 
137 /* Private typedef -----------------------------------------------------------*/
138 /* Private define ------------------------------------------------------------*/
139 #define SPDIFRX_TIMEOUT_VALUE 0xFFFF
140 
141 /* Private macro -------------------------------------------------------------*/
142 /* Private variables ---------------------------------------------------------*/
143 /* Private function prototypes -----------------------------------------------*/
147 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma);
148 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
149 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma);
150 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma);
151 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma);
152 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
153 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
154 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t tickstart);
158 /* Exported functions ---------------------------------------------------------*/
159 
200 {
201  uint32_t tmpreg = 0;
202 
203  /* Check the SPDIFRX handle allocation */
204  if(hspdif == NULL)
205  {
206  return HAL_ERROR;
207  }
208 
209  /* Check the SPDIFRX parameters */
220 
221  if(hspdif->State == HAL_SPDIFRX_STATE_RESET)
222  {
223  /* Allocate lock resource and initialize it */
224  hspdif->Lock = HAL_UNLOCKED;
225  /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
226  HAL_SPDIFRX_MspInit(hspdif);
227  }
228 
229  /* SPDIFRX peripheral state is BUSY*/
230  hspdif->State = HAL_SPDIFRX_STATE_BUSY;
231 
232  /* Disable SPDIFRX interface (IDLE State) */
233  __HAL_SPDIFRX_IDLE(hspdif);
234 
235  /* Reset the old SPDIFRX CR configuration */
236  tmpreg = hspdif->Instance->CR;
237 
238  tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
241 
242  /* Sets the new configuration of the SPDIFRX peripheral */
243  tmpreg |= ((uint16_t) hspdif->Init.StereoMode |
244  hspdif->Init.InputSelection |
245  hspdif->Init.Retries |
246  hspdif->Init.WaitForActivity |
247  hspdif->Init.ChannelSelection |
248  hspdif->Init.DataFormat |
249  hspdif->Init.PreambleTypeMask |
250  hspdif->Init.ChannelStatusMask |
251  hspdif->Init.ValidityBitMask |
252  hspdif->Init.ParityErrorMask);
253 
254  hspdif->Instance->CR = tmpreg;
255 
257 
258  /* SPDIFRX peripheral state is READY*/
259  hspdif->State = HAL_SPDIFRX_STATE_READY;
260 
261  return HAL_OK;
262 }
263 
270 {
271  /* Check the SPDIFRX handle allocation */
272  if(hspdif == NULL)
273  {
274  return HAL_ERROR;
275  }
276 
277  /* Check the parameters */
279 
280  hspdif->State = HAL_SPDIFRX_STATE_BUSY;
281 
282  /* Disable SPDIFRX interface (IDLE state) */
283  __HAL_SPDIFRX_IDLE(hspdif);
284 
285  /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
286  HAL_SPDIFRX_MspDeInit(hspdif);
287 
289 
290  /* SPDIFRX peripheral state is RESET*/
291  hspdif->State = HAL_SPDIFRX_STATE_RESET;
292 
293  /* Release Lock */
294  __HAL_UNLOCK(hspdif);
295 
296  return HAL_OK;
297 }
298 
304 __weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
305 {
306  /* Prevent unused argument(s) compilation warning */
307  UNUSED(hspdif);
308 
309  /* NOTE : This function Should not be modified, when the callback is needed,
310  the HAL_SPDIFRX_MspInit could be implemented in the user file
311  */
312 }
313 
319 __weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
320 {
321  /* Prevent unused argument(s) compilation warning */
322  UNUSED(hspdif);
323 
324  /* NOTE : This function Should not be modified, when the callback is needed,
325  the HAL_SPDIFRX_MspDeInit could be implemented in the user file
326  */
327 }
328 
337 {
338  uint32_t tmpreg = 0;
339 
340  /* Check the SPDIFRX handle allocation */
341  if(hspdif == NULL)
342  {
343  return HAL_ERROR;
344  }
345 
346  /* Check the SPDIFRX parameters */
347  assert_param(IS_STEREO_MODE(sDataFormat.StereoMode));
353 
354  /* Reset the old SPDIFRX CR configuration */
355  tmpreg = hspdif->Instance->CR;
356 
357  if(((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) &&
358  (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) ||
359  ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode)))
360  {
361  return HAL_ERROR;
362  }
363 
364  tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
366 
367  /* Sets the new configuration of the SPDIFRX peripheral */
368  tmpreg |= ((uint16_t) sDataFormat.StereoMode |
369  sDataFormat.DataFormat |
370  sDataFormat.PreambleTypeMask |
371  sDataFormat.ChannelStatusMask |
372  sDataFormat.ValidityBitMask |
373  sDataFormat.ParityErrorMask);
374 
375  hspdif->Instance->CR = tmpreg;
376 
377  return HAL_OK;
378 }
379 
436 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
437 {
438  uint32_t tickstart = 0U;
439 
440  if((pData == NULL ) || (Size == 0U))
441  {
442  return HAL_ERROR;
443  }
444 
445  if(hspdif->State == HAL_SPDIFRX_STATE_READY)
446  {
447  /* Process Locked */
448  __HAL_LOCK(hspdif);
449 
450  hspdif->State = HAL_SPDIFRX_STATE_BUSY;
451 
452  /* Start synchronisation */
453  __HAL_SPDIFRX_SYNC(hspdif);
454 
455  /* Get tick */
456  tickstart = HAL_GetTick();
457 
458  /* Wait until SYNCD flag is set */
459  if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK)
460  {
461  return HAL_TIMEOUT;
462  }
463 
464  /* Start reception */
465  __HAL_SPDIFRX_RCV(hspdif);
466 
467  /* Receive data flow */
468  while(Size > 0U)
469  {
470  /* Get tick */
471  tickstart = HAL_GetTick();
472 
473  /* Wait until RXNE flag is set */
474  if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)
475  {
476  return HAL_TIMEOUT;
477  }
478 
479  (*pData++) = hspdif->Instance->DR;
480  Size--;
481  }
482 
483  /* SPDIFRX ready */
484  hspdif->State = HAL_SPDIFRX_STATE_READY;
485 
486  /* Process Unlocked */
487  __HAL_UNLOCK(hspdif);
488 
489  return HAL_OK;
490  }
491  else
492  {
493  return HAL_BUSY;
494  }
495 }
496 
506 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
507 {
508  uint32_t tickstart = 0U;
509 
510  if((pData == NULL ) || (Size == 0U))
511  {
512  return HAL_ERROR;
513  }
514 
515  if(hspdif->State == HAL_SPDIFRX_STATE_READY)
516  {
517  /* Process Locked */
518  __HAL_LOCK(hspdif);
519 
520  hspdif->State = HAL_SPDIFRX_STATE_BUSY;
521 
522  /* Start synchronization */
523  __HAL_SPDIFRX_SYNC(hspdif);
524 
525  /* Get tick */
526  tickstart = HAL_GetTick();
527 
528  /* Wait until SYNCD flag is set */
529  if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK)
530  {
531  return HAL_TIMEOUT;
532  }
533 
534  /* Start reception */
535  __HAL_SPDIFRX_RCV(hspdif);
536 
537  /* Receive control flow */
538  while(Size > 0U)
539  {
540  /* Get tick */
541  tickstart = HAL_GetTick();
542 
543  /* Wait until CSRNE flag is set */
544  if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout, tickstart) != HAL_OK)
545  {
546  return HAL_TIMEOUT;
547  }
548 
549  (*pData++) = hspdif->Instance->CSR;
550  Size--;
551  }
552 
553  /* SPDIFRX ready */
554  hspdif->State = HAL_SPDIFRX_STATE_READY;
555 
556  /* Process Unlocked */
557  __HAL_UNLOCK(hspdif);
558 
559  return HAL_OK;
560  }
561  else
562  {
563  return HAL_BUSY;
564  }
565 }
566 
574 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
575 {
576  uint32_t tickstart = 0U;
577 
578  if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
579  {
580  if((pData == NULL) || (Size == 0U))
581  {
582  return HAL_ERROR;
583  }
584 
585  /* Process Locked */
586  __HAL_LOCK(hspdif);
587 
588  hspdif->pRxBuffPtr = pData;
589  hspdif->RxXferSize = Size;
590  hspdif->RxXferCount = Size;
591 
593 
594  /* Check if a receive process is ongoing or not */
596 
597 
598  /* Enable the SPDIFRX PE Error Interrupt */
600 
601  /* Enable the SPDIFRX OVR Error Interrupt */
603 
604  /* Process Unlocked */
605  __HAL_UNLOCK(hspdif);
606 
607  /* Enable the SPDIFRX RXNE interrupt */
609 
610  if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U))
611  {
612  /* Start synchronization */
613  __HAL_SPDIFRX_SYNC(hspdif);
614 
615  /* Get tick */
616  tickstart = HAL_GetTick();
617 
618  /* Wait until SYNCD flag is set */
619  if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE, tickstart) != HAL_OK)
620  {
621  return HAL_TIMEOUT;
622  }
623 
624  /* Start reception */
625  __HAL_SPDIFRX_RCV(hspdif);
626  }
627 
628  return HAL_OK;
629  }
630  else
631  {
632  return HAL_BUSY;
633  }
634 }
635 
643 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
644 {
645  uint32_t tickstart = 0U;
646 
647  if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
648  {
649  if((pData == NULL ) || (Size == 0U))
650  {
651  return HAL_ERROR;
652  }
653 
654  /* Process Locked */
655  __HAL_LOCK(hspdif);
656 
657  hspdif->pCsBuffPtr = pData;
658  hspdif->CsXferSize = Size;
659  hspdif->CsXferCount = Size;
660 
662 
663  /* Check if a receive process is ongoing or not */
665 
666 
667  /* Enable the SPDIFRX PE Error Interrupt */
669 
670  /* Enable the SPDIFRX OVR Error Interrupt */
672 
673  /* Process Unlocked */
674  __HAL_UNLOCK(hspdif);
675 
676  /* Enable the SPDIFRX CSRNE interrupt */
678 
679  if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U))
680  {
681  /* Start synchronization */
682  __HAL_SPDIFRX_SYNC(hspdif);
683 
684  /* Get tick */
685  tickstart = HAL_GetTick();
686 
687  /* Wait until SYNCD flag is set */
688  if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE, tickstart) != HAL_OK)
689  {
690  return HAL_TIMEOUT;
691  }
692 
693  /* Start reception */
694  __HAL_SPDIFRX_RCV(hspdif);
695  }
696 
697  return HAL_OK;
698  }
699  else
700  {
701  return HAL_BUSY;
702  }
703 }
704 
712 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
713 {
714  uint32_t tickstart = 0U;
715 
716  if((pData == NULL) || (Size == 0U))
717  {
718  return HAL_ERROR;
719  }
720 
721  if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
722  {
723  hspdif->pRxBuffPtr = pData;
724  hspdif->RxXferSize = Size;
725  hspdif->RxXferCount = Size;
726 
727  /* Process Locked */
728  __HAL_LOCK(hspdif);
729 
732 
733  /* Set the SPDIFRX Rx DMA Half transfer complete callback */
734  hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt;
735 
736  /* Set the SPDIFRX Rx DMA transfer complete callback */
737  hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt;
738 
739  /* Set the DMA error callback */
740  hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError;
741 
742  /* Enable the DMA request */
743  HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size);
744 
745  /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/
746  hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN;
747 
748  if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U))
749  {
750  /* Start synchronization */
751  __HAL_SPDIFRX_SYNC(hspdif);
752 
753  /* Get tick */
754  tickstart = HAL_GetTick();
755 
756  /* Wait until SYNCD flag is set */
757  if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE, tickstart) != HAL_OK)
758  {
759  return HAL_TIMEOUT;
760  }
761 
762  /* Start reception */
763  __HAL_SPDIFRX_RCV(hspdif);
764  }
765 
766  /* Process Unlocked */
767  __HAL_UNLOCK(hspdif);
768 
769  return HAL_OK;
770  }
771  else
772  {
773  return HAL_BUSY;
774  }
775 }
776 
784 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
785 {
786  uint32_t tickstart = 0U;
787 
788  if((pData == NULL) || (Size == 0U))
789  {
790  return HAL_ERROR;
791  }
792 
793  if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
794  {
795  hspdif->pCsBuffPtr = pData;
796  hspdif->CsXferSize = Size;
797  hspdif->CsXferCount = Size;
798 
799  /* Process Locked */
800  __HAL_LOCK(hspdif);
801 
804 
805  /* Set the SPDIFRX Rx DMA Half transfer complete callback */
806  hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt;
807 
808  /* Set the SPDIFRX Rx DMA transfer complete callback */
809  hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt;
810 
811  /* Set the DMA error callback */
812  hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError;
813 
814  /* Enable the DMA request */
815  HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size);
816 
817  /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/
818  hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN;
819 
820  if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U))
821  {
822  /* Start synchronization */
823  __HAL_SPDIFRX_SYNC(hspdif);
824 
825  /* Get tick */
826  tickstart = HAL_GetTick();
827 
828  /* Wait until SYNCD flag is set */
829  if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE, tickstart) != HAL_OK)
830  {
831  return HAL_TIMEOUT;
832  }
833 
834  /* Start reception */
835  __HAL_SPDIFRX_RCV(hspdif);
836  }
837 
838  /* Process Unlocked */
839  __HAL_UNLOCK(hspdif);
840 
841  return HAL_OK;
842  }
843  else
844  {
845  return HAL_BUSY;
846  }
847 }
848 
855 {
856  /* Process Locked */
857  __HAL_LOCK(hspdif);
858 
859  /* Disable the SPDIFRX DMA requests */
860  hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
861  hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
862 
863  /* Disable the SPDIFRX DMA channel */
864  __HAL_DMA_DISABLE(hspdif->hdmaDrRx);
865  __HAL_DMA_DISABLE(hspdif->hdmaCsRx);
866 
867  /* Disable SPDIFRX peripheral */
868  __HAL_SPDIFRX_IDLE(hspdif);
869 
870  hspdif->State = HAL_SPDIFRX_STATE_READY;
871 
872  /* Process Unlocked */
873  __HAL_UNLOCK(hspdif);
874 
875  return HAL_OK;
876 }
877 
884 {
885  /* SPDIFRX in mode Data Flow Reception ------------------------------------------------*/
887  {
889  SPDIFRX_ReceiveDataFlow_IT(hspdif);
890  }
891 
892  /* SPDIFRX in mode Control Flow Reception ------------------------------------------------*/
894  {
896  SPDIFRX_ReceiveControlFlow_IT(hspdif);
897  }
898 
899  /* SPDIFRX Overrun error interrupt occurred ---------------------------------*/
901  {
903 
904  /* Change the SPDIFRX error code */
905  hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR;
906 
907  /* the transfer is not stopped */
909  }
910 
911  /* SPDIFRX Parity error interrupt occurred ---------------------------------*/
913  {
915 
916  /* Change the SPDIFRX error code */
917  hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE;
918 
919  /* the transfer is not stopped */
921  }
922 }
923 
930 {
931  /* Prevent unused argument(s) compilation warning */
932  UNUSED(hspdif);
933 
934  /* NOTE : This function Should not be modified, when the callback is needed,
935  the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
936  */
937 }
938 
945 {
946  /* Prevent unused argument(s) compilation warning */
947  UNUSED(hspdif);
948 
949  /* NOTE : This function Should not be modified, when the callback is needed,
950  the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
951  */
952 }
953 
960 {
961  /* Prevent unused argument(s) compilation warning */
962  UNUSED(hspdif);
963 
964  /* NOTE : This function Should not be modified, when the callback is needed,
965  the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
966  */
967 }
968 
975 {
976  /* Prevent unused argument(s) compilation warning */
977  UNUSED(hspdif);
978 
979  /* NOTE : This function Should not be modified, when the callback is needed,
980  the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
981  */
982 }
983 
990 {
991  /* Prevent unused argument(s) compilation warning */
992  UNUSED(hspdif);
993 
994  /* NOTE : This function Should not be modified, when the callback is needed,
995  the HAL_SPDIFRX_ErrorCallback could be implemented in the user file
996  */
997 }
998 
1024 {
1025  return hspdif->State;
1026 }
1027 
1034 {
1035  return hspdif->ErrorCode;
1036 }
1037 
1047 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma)
1048 {
1049  SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1050 
1051  /* Disable Rx DMA Request */
1052  if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
1053  {
1054  hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
1055  hspdif->RxXferCount = 0;
1056  hspdif->State = HAL_SPDIFRX_STATE_READY;
1057  }
1058  HAL_SPDIFRX_RxCpltCallback(hspdif);
1059 }
1060 
1066 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
1067 {
1068  SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1069 
1071 }
1072 
1073 
1079 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma)
1080 {
1081  SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1082 
1083  /* Disable Cb DMA Request */
1084  hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
1085  hspdif->CsXferCount = 0;
1086 
1087  hspdif->State = HAL_SPDIFRX_STATE_READY;
1088  HAL_SPDIFRX_CxCpltCallback(hspdif);
1089 }
1090 
1096 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma)
1097 {
1098  SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1099 
1101 }
1102 
1108 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma)
1109 {
1110  SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1111 
1112  /* Disable Rx and Cb DMA Request */
1113  hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN));
1114  hspdif->RxXferCount = 0;
1115 
1116  hspdif->State= HAL_SPDIFRX_STATE_READY;
1117 
1118  /* Set the error code and execute error callback*/
1119  hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA;
1120  HAL_SPDIFRX_ErrorCallback(hspdif);
1121 }
1122 
1128 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1129 {
1130  /* Receive data */
1131  (*hspdif->pRxBuffPtr++) = hspdif->Instance->DR;
1132  hspdif->RxXferCount--;
1133 
1134  if(hspdif->RxXferCount == 0)
1135  {
1136  /* Disable RXNE/PE and OVR interrupts */
1138 
1139  hspdif->State = HAL_SPDIFRX_STATE_READY;
1140 
1141  /* Process Unlocked */
1142  __HAL_UNLOCK(hspdif);
1143 
1145  }
1146 }
1147 
1153 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1154 {
1155  /* Receive data */
1156  (*hspdif->pCsBuffPtr++) = hspdif->Instance->CSR;
1157  hspdif->CsXferCount--;
1158 
1159  if(hspdif->CsXferCount == 0)
1160  {
1161  /* Disable CSRNE interrupt */
1163 
1164  hspdif->State = HAL_SPDIFRX_STATE_READY;
1165 
1166  /* Process Unlocked */
1167  __HAL_UNLOCK(hspdif);
1168 
1170  }
1171 }
1172 
1182 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t tickstart)
1183 {
1184  /* Wait until flag is set */
1185  if(Status == RESET)
1186  {
1187  while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == RESET)
1188  {
1189  /* Check for the Timeout */
1190  if(Timeout != HAL_MAX_DELAY)
1191  {
1192  if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
1193  {
1194  /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
1202 
1203  hspdif->State= HAL_SPDIFRX_STATE_READY;
1204 
1205  /* Process Unlocked */
1206  __HAL_UNLOCK(hspdif);
1207 
1208  return HAL_TIMEOUT;
1209  }
1210  }
1211  }
1212  }
1213  else
1214  {
1215  while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) != RESET)
1216  {
1217  /* Check for the Timeout */
1218  if(Timeout != HAL_MAX_DELAY)
1219  {
1220  if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
1221  {
1222  /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
1230 
1231  hspdif->State= HAL_SPDIFRX_STATE_READY;
1232 
1233  /* Process Unlocked */
1234  __HAL_UNLOCK(hspdif);
1235 
1236  return HAL_TIMEOUT;
1237  }
1238  }
1239  }
1240  }
1241  return HAL_OK;
1242 }
1243 
1248 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
1249 
1257 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#define SPDIFRX_CR_CUMSK
Definition: stm32f745xx.h:6370
#define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL)
#define HAL_SPDIFRX_ERROR_OVR
#define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)
Checks if the specified SPDIFRX interrupt source is enabled or disabled.
#define SPDIFRX_IT_RXNE
#define SPDIFRX_CR_WFA
Definition: stm32f745xx.h:6375
SPDIFRX handle Structure definition.
void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
#define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__)
Clears the specified SPDIFRX SR flag, in setting the proper IFCR register bit.
__IO HAL_SPDIFRX_StateTypeDef State
uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif)
HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
#define assert_param(expr)
Include module's header file.
#define SPDIFRX_CR_SPDIFEN
Definition: stm32f745xx.h:6364
HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
#define __HAL_UNLOCK(__HANDLE__)
HAL_SPDIFRX_StateTypeDef
HAL State structures definition.
#define IS_PREAMBLE_TYPE_MASK(VAL)
#define HAL_SPDIFRX_ERROR_DMA
#define SPDIFRX_CR_PTMSK
Definition: stm32f745xx.h:6371
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
DMA_HandleTypeDef * hdmaCsRx
DMA_HandleTypeDef * hdmaDrRx
#define SPDIFRX_CR_VMSK
Definition: stm32f745xx.h:6369
#define SPDIFRX_CR_RXSTEO
Definition: stm32f745xx.h:6366
#define __HAL_SPDIFRX_SYNC(__HANDLE__)
Enable the specified SPDIFRX peripheral (SYNC State).
#define SPDIFRX_FLAG_OVR
#define SPDIFRX_FLAG_CSRNE
#define SPDIFRX_CR_DRFMT
Definition: stm32f745xx.h:6367
#define IS_STEREO_MODE(MODE)
#define SPDIFRX_CR_INSEL
Definition: stm32f745xx.h:6376
#define SPDIFRX_IT_OVRIE
void(* XferCpltCallback)(struct __DMA_HandleTypeDef *hdma)
#define __HAL_LOCK(__HANDLE__)
#define IS_SPDIFRX_CHANNEL(CHANNEL)
#define IS_SPDIFRX_INPUT_SELECT(INPUT)
#define IS_CHANNEL_STATUS_MASK(VAL)
#define NULL
Definition: usbd_def.h:53
#define DMA_SxCR_CIRC
Definition: stm32f745xx.h:3313
#define SPDIFRX_STATE_SYNC
#define HAL_MAX_DELAY
void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif)
#define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__)
Enable or disable the specified SPDIFRX interrupts.
#define SPDIFRX_CR_CHSEL
Definition: stm32f745xx.h:6373
SPDIFRX_HandleTypeDef hspdif
Definition: main.c:74
FlagStatus
Definition: stm32f7xx.h:152
#define IS_SPDIFRX_ALL_INSTANCE(__INSTANCE__)
Definition: stm32f745xx.h:8887
#define SPDIFRX_CR_NBTR
Definition: stm32f745xx.h:6374
void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
#define SPDIFRX_STATE_RCV
#define SPDIFRX_FLAG_RXNE
This file contains all the functions prototypes for the HAL module driver.
DMA_Stream_TypeDef * Instance
#define IS_SPDIFRX_MAX_RETRIES(RET)
void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif)
SPDIFRX SetDataFormat structure definition.
void(* XferHalfCpltCallback)(struct __DMA_HandleTypeDef *hdma)
#define HAL_SPDIFRX_ERROR_PE
__IO uint32_t CR
Definition: stm32f745xx.h:799
__IO uint32_t CR
Definition: stm32f745xx.h:392
#define UNUSED(x)
HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
#define SPDIFRX_IT_SYNCDIE
#define SPDIFRX_CR_RXDMAEN
Definition: stm32f745xx.h:6365
#define SPDIFRX_IT_PERRIE
__IO uint32_t CSR
Definition: stm32f745xx.h:804
#define IS_VALIDITY_MASK(VAL)
void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
SPDIFRX MSP Init.
#define IS_PARITY_ERROR_MASK(VAL)
#define __HAL_DMA_DISABLE(__HANDLE__)
Disable the specified DMA Stream.
void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
DMA handle Structure definition.
#define SPDIFRX_CR_CBDMAEN
Definition: stm32f745xx.h:6372
SPDIFRX_InitTypeDef Init
#define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__)
void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
#define SPDIFRX_FLAG_SYNCD
__IO uint32_t DR
Definition: stm32f745xx.h:803
#define SPDIFRX_IT_CSRNE
#define SPDIFRX_IT_SBLKIE
HAL_StatusTypeDef
HAL Status structures definition.
#define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__)
Checks whether the specified SPDIFRX flag is set or not.
HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
void(* XferErrorCallback)(struct __DMA_HandleTypeDef *hdma)
uint32_t HAL_GetTick(void)
Provides a tick value in millisecond.
HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
__IO HAL_LockTypeDef Lock
#define HAL_SPDIFRX_ERROR_NONE
#define SPDIFRX_CR_PMSK
Definition: stm32f745xx.h:6368
HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat)
#define __HAL_SPDIFRX_IDLE(__HANDLE__)
Disable the specified SPDIFRX peripheral (IDLE State).
HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif)
#define IS_SPDIFRX_DATA_FORMAT(FORMAT)
HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
#define SPDIFRX_IT_IFEIE
#define SPDIFRX_FLAG_PERR
#define SPDIFRX
Definition: stm32f745xx.h:1273
#define __HAL_SPDIFRX_RCV(__HANDLE__)
Enable the specified SPDIFRX peripheral (RCV State).