STM32F769IDiscovery  1.00
uDANTE Audio Networking with STM32F7 DISCO board
stm32f7xx_hal_lptim.c
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1 
123 /* Includes ------------------------------------------------------------------*/
124 #include "stm32f7xx_hal.h"
125 
135 #ifdef HAL_LPTIM_MODULE_ENABLED
136 /* Private types -------------------------------------------------------------*/
145 /* Private defines -----------------------------------------------------------*/
154 /* Private variables ---------------------------------------------------------*/
163 /* Private constants ---------------------------------------------------------*/
172 /* Private macros ------------------------------------------------------------*/
181 /* Private function prototypes -----------------------------------------------*/
190 /* Private functions ---------------------------------------------------------*/
199 /* Exported functions ---------------------------------------------------------*/
229 {
230  uint32_t tmpcfgr = 0;
231 
232  /* Check the LPTIM handle allocation */
233  if(hlptim == NULL)
234  {
235  return HAL_ERROR;
236  }
237 
238  /* Check the parameters */
240 
243  if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
244  {
247  }
249  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
250  {
253  }
257 
258  if(hlptim->State == HAL_LPTIM_STATE_RESET)
259  {
260  /* Allocate lock resource and initialize it */
261  hlptim->Lock = HAL_UNLOCKED;
262  /* Init the low level hardware */
263  HAL_LPTIM_MspInit(hlptim);
264  }
265 
266  /* Change the LPTIM state */
267  hlptim->State = HAL_LPTIM_STATE_BUSY;
268 
269  /* Get the LPTIMx CFGR value */
270  tmpcfgr = hlptim->Instance->CFGR;
271 
272  if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
273  {
274  tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
275  }
276  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
277  {
278  tmpcfgr &= (uint32_t)(~ (LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
279  }
280 
281  /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
282  tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
284 
285  /* Set initialization parameters */
286  tmpcfgr |= (hlptim->Init.Clock.Source |
287  hlptim->Init.Clock.Prescaler |
288  hlptim->Init.OutputPolarity |
289  hlptim->Init.UpdateMode |
290  hlptim->Init.CounterSource);
291 
292  if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
293  {
294  tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
296  }
297 
298  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
299  {
300  /* Enable External trigger and set the trigger source */
301  tmpcfgr |= (hlptim->Init.Trigger.Source |
302  hlptim->Init.Trigger.ActiveEdge |
303  hlptim->Init.Trigger.SampleTime);
304  }
305 
306  /* Write to LPTIMx CFGR */
307  hlptim->Instance->CFGR = tmpcfgr;
308 
309  /* Change the LPTIM state */
310  hlptim->State = HAL_LPTIM_STATE_READY;
311 
312  /* Return function status */
313  return HAL_OK;
314 }
315 
322 {
323  /* Check the LPTIM handle allocation */
324  if(hlptim == NULL)
325  {
326  return HAL_ERROR;
327  }
328 
329  /* Change the LPTIM state */
330  hlptim->State = HAL_LPTIM_STATE_BUSY;
331 
332  /* Disable the LPTIM Peripheral Clock */
333  __HAL_LPTIM_DISABLE(hlptim);
334 
335  /* DeInit the low level hardware: CLOCK, NVIC.*/
336  HAL_LPTIM_MspDeInit(hlptim);
337 
338  /* Change the LPTIM state */
339  hlptim->State = HAL_LPTIM_STATE_RESET;
340 
341  /* Release Lock */
342  __HAL_UNLOCK(hlptim);
343 
344  /* Return function status */
345  return HAL_OK;
346 }
347 
353 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
354 {
355  /* Prevent unused argument(s) compilation warning */
356  UNUSED(hlptim);
357 
358  /* NOTE : This function Should not be modified, when the callback is needed,
359  the HAL_LPTIM_MspInit could be implemented in the user file
360  */
361 }
362 
368 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
369 {
370  /* Prevent unused argument(s) compilation warning */
371  UNUSED(hlptim);
372 
373  /* NOTE : This function Should not be modified, when the callback is needed,
374  the HAL_LPTIM_MspDeInit could be implemented in the user file
375  */
376 }
377 
417 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
418 {
419  /* Check the parameters */
421  assert_param(IS_LPTIM_PERIOD(Period));
423 
424  /* Set the LPTIM state */
425  hlptim->State= HAL_LPTIM_STATE_BUSY;
426 
427  /* Reset WAVE bit to set PWM mode */
428  hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
429 
430  /* Enable the Peripheral */
431  __HAL_LPTIM_ENABLE(hlptim);
432 
433  /* Load the period value in the autoreload register */
434  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
435 
436  /* Load the pulse value in the compare register */
437  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
438 
439  /* Start timer in continuous mode */
441 
442  /* Change the TIM state*/
443  hlptim->State= HAL_LPTIM_STATE_READY;
444 
445  /* Return function status */
446  return HAL_OK;
447 }
448 
455 {
456  /* Check the parameters */
458 
459  /* Set the LPTIM state */
460  hlptim->State= HAL_LPTIM_STATE_BUSY;
461 
462  /* Disable the Peripheral */
463  __HAL_LPTIM_DISABLE(hlptim);
464 
465  /* Change the TIM state*/
466  hlptim->State= HAL_LPTIM_STATE_READY;
467 
468  /* Return function status */
469  return HAL_OK;
470 }
471 
481 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
482 {
483  /* Check the parameters */
485  assert_param(IS_LPTIM_PERIOD(Period));
487 
488  /* Set the LPTIM state */
489  hlptim->State= HAL_LPTIM_STATE_BUSY;
490 
491  /* Reset WAVE bit to set PWM mode */
492  hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
493 
494  /* Enable Autoreload write complete interrupt */
496 
497  /* Enable Compare write complete interrupt */
499 
500  /* Enable Autoreload match interrupt */
502 
503  /* Enable Compare match interrupt */
505 
506  /* If external trigger source is used, then enable external trigger interrupt */
507  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
508  {
509  /* Enable external trigger interrupt */
511  }
512 
513  /* Enable the Peripheral */
514  __HAL_LPTIM_ENABLE(hlptim);
515 
516  /* Load the period value in the autoreload register */
517  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
518 
519  /* Load the pulse value in the compare register */
520  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
521 
522  /* Start timer in continuous mode */
524 
525  /* Change the TIM state*/
526  hlptim->State= HAL_LPTIM_STATE_READY;
527 
528  /* Return function status */
529  return HAL_OK;
530 }
531 
538 {
539  /* Check the parameters */
541 
542  /* Set the LPTIM state */
543  hlptim->State= HAL_LPTIM_STATE_BUSY;
544 
545  /* Disable the Peripheral */
546  __HAL_LPTIM_DISABLE(hlptim);
547 
548  /* Disable Autoreload write complete interrupt */
550 
551  /* Disable Compare write complete interrupt */
553 
554  /* Disable Autoreload match interrupt */
556 
557  /* Disable Compare match interrupt */
559 
560  /* If external trigger source is used, then disable external trigger interrupt */
561  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
562  {
563  /* Disable external trigger interrupt */
565  }
566 
567  /* Change the TIM state*/
568  hlptim->State= HAL_LPTIM_STATE_READY;
569 
570  /* Return function status */
571  return HAL_OK;
572 }
573 
583 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
584 {
585  /* Check the parameters */
587  assert_param(IS_LPTIM_PERIOD(Period));
589 
590  /* Set the LPTIM state */
591  hlptim->State= HAL_LPTIM_STATE_BUSY;
592 
593  /* Reset WAVE bit to set one pulse mode */
594  hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
595 
596  /* Enable the Peripheral */
597  __HAL_LPTIM_ENABLE(hlptim);
598 
599  /* Load the period value in the autoreload register */
600  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
601 
602  /* Load the pulse value in the compare register */
603  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
604 
605  /* Start timer in continuous mode */
606  __HAL_LPTIM_START_SINGLE(hlptim);
607 
608  /* Change the TIM state*/
609  hlptim->State= HAL_LPTIM_STATE_READY;
610 
611  /* Return function status */
612  return HAL_OK;
613 }
614 
621 {
622  /* Check the parameters */
624 
625  /* Set the LPTIM state */
626  hlptim->State= HAL_LPTIM_STATE_BUSY;
627 
628  /* Disable the Peripheral */
629  __HAL_LPTIM_DISABLE(hlptim);
630 
631  /* Change the TIM state*/
632  hlptim->State= HAL_LPTIM_STATE_READY;
633 
634  /* Return function status */
635  return HAL_OK;
636 }
637 
647 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
648 {
649  /* Check the parameters */
651  assert_param(IS_LPTIM_PERIOD(Period));
653 
654  /* Set the LPTIM state */
655  hlptim->State= HAL_LPTIM_STATE_BUSY;
656 
657  /* Reset WAVE bit to set one pulse mode */
658  hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
659 
660  /* Enable Autoreload write complete interrupt */
662 
663  /* Enable Compare write complete interrupt */
665 
666  /* Enable Autoreload match interrupt */
668 
669  /* Enable Compare match interrupt */
671 
672  /* If external trigger source is used, then enable external trigger interrupt */
673  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
674  {
675  /* Enable external trigger interrupt */
677  }
678 
679  /* Enable the Peripheral */
680  __HAL_LPTIM_ENABLE(hlptim);
681 
682  /* Load the period value in the autoreload register */
683  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
684 
685  /* Load the pulse value in the compare register */
686  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
687 
688  /* Start timer in continuous mode */
689  __HAL_LPTIM_START_SINGLE(hlptim);
690 
691  /* Change the TIM state*/
692  hlptim->State= HAL_LPTIM_STATE_READY;
693 
694  /* Return function status */
695  return HAL_OK;
696 }
697 
704 {
705  /* Check the parameters */
707 
708  /* Set the LPTIM state */
709  hlptim->State= HAL_LPTIM_STATE_BUSY;
710 
711  /* Disable the Peripheral */
712  __HAL_LPTIM_DISABLE(hlptim);
713 
714  /* Disable Autoreload write complete interrupt */
716 
717  /* Disable Compare write complete interrupt */
719 
720  /* Disable Autoreload match interrupt */
722 
723  /* Disable Compare match interrupt */
725 
726  /* If external trigger source is used, then disable external trigger interrupt */
727  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
728  {
729  /* Disable external trigger interrupt */
731  }
732 
733  /* Change the TIM state*/
734  hlptim->State= HAL_LPTIM_STATE_READY;
735 
736  /* Return function status */
737  return HAL_OK;
738 }
739 
749 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
750 {
751  /* Check the parameters */
753  assert_param(IS_LPTIM_PERIOD(Period));
755 
756  /* Set the LPTIM state */
757  hlptim->State= HAL_LPTIM_STATE_BUSY;
758 
759  /* Set WAVE bit to enable the set once mode */
760  hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
761 
762  /* Enable the Peripheral */
763  __HAL_LPTIM_ENABLE(hlptim);
764 
765  /* Load the period value in the autoreload register */
766  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
767 
768  /* Load the pulse value in the compare register */
769  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
770 
771  /* Start timer in continuous mode */
772  __HAL_LPTIM_START_SINGLE(hlptim);
773 
774  /* Change the TIM state*/
775  hlptim->State= HAL_LPTIM_STATE_READY;
776 
777  /* Return function status */
778  return HAL_OK;
779 }
780 
787 {
788  /* Check the parameters */
790 
791  /* Set the LPTIM state */
792  hlptim->State= HAL_LPTIM_STATE_BUSY;
793 
794  /* Disable the Peripheral */
795  __HAL_LPTIM_DISABLE(hlptim);
796 
797  /* Change the TIM state*/
798  hlptim->State= HAL_LPTIM_STATE_READY;
799 
800  /* Return function status */
801  return HAL_OK;
802 }
803 
813 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
814 {
815  /* Check the parameters */
817  assert_param(IS_LPTIM_PERIOD(Period));
819 
820  /* Set the LPTIM state */
821  hlptim->State= HAL_LPTIM_STATE_BUSY;
822 
823  /* Set WAVE bit to enable the set once mode */
824  hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
825 
826  /* Enable Autoreload write complete interrupt */
828 
829  /* Enable Compare write complete interrupt */
831 
832  /* Enable Autoreload match interrupt */
834 
835  /* Enable Compare match interrupt */
837 
838  /* If external trigger source is used, then enable external trigger interrupt */
839  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
840  {
841  /* Enable external trigger interrupt */
843  }
844 
845  /* Enable the Peripheral */
846  __HAL_LPTIM_ENABLE(hlptim);
847 
848  /* Load the period value in the autoreload register */
849  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
850 
851  /* Load the pulse value in the compare register */
852  __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
853 
854  /* Start timer in continuous mode */
855  __HAL_LPTIM_START_SINGLE(hlptim);
856 
857  /* Change the TIM state*/
858  hlptim->State= HAL_LPTIM_STATE_READY;
859 
860  /* Return function status */
861  return HAL_OK;
862 }
863 
870 {
871  /* Check the parameters */
873 
874  /* Set the LPTIM state */
875  hlptim->State= HAL_LPTIM_STATE_BUSY;
876 
877  /* Disable the Peripheral */
878  __HAL_LPTIM_DISABLE(hlptim);
879 
880  /* Disable Autoreload write complete interrupt */
882 
883  /* Disable Compare write complete interrupt */
885 
886  /* Disable Autoreload match interrupt */
888 
889  /* Disable Compare match interrupt */
891 
892  /* If external trigger source is used, then disable external trigger interrupt */
893  if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
894  {
895  /* Disable external trigger interrupt */
897  }
898 
899  /* Change the TIM state*/
900  hlptim->State= HAL_LPTIM_STATE_READY;
901 
902  /* Return function status */
903  return HAL_OK;
904 }
905 
914 {
915  uint32_t tmpcfgr = 0;
916 
917  /* Check the parameters */
919  assert_param(IS_LPTIM_PERIOD(Period));
923 
924  /* Set the LPTIM state */
925  hlptim->State= HAL_LPTIM_STATE_BUSY;
926 
927  /* Get the LPTIMx CFGR value */
928  tmpcfgr = hlptim->Instance->CFGR;
929 
930  /* Clear CKPOL bits */
931  tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
932 
933  /* Set Input polarity */
934  tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
935 
936  /* Write to LPTIMx CFGR */
937  hlptim->Instance->CFGR = tmpcfgr;
938 
939  /* Set ENC bit to enable the encoder interface */
940  hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
941 
942  /* Enable the Peripheral */
943  __HAL_LPTIM_ENABLE(hlptim);
944 
945  /* Load the period value in the autoreload register */
946  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
947 
948  /* Start timer in continuous mode */
950 
951  /* Change the TIM state*/
952  hlptim->State= HAL_LPTIM_STATE_READY;
953 
954  /* Return function status */
955  return HAL_OK;
956 }
957 
964 {
965  /* Check the parameters */
967 
968  /* Set the LPTIM state */
969  hlptim->State= HAL_LPTIM_STATE_BUSY;
970 
971  /* Disable the Peripheral */
972  __HAL_LPTIM_DISABLE(hlptim);
973 
974  /* Reset ENC bit to disable the encoder interface */
975  hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
976 
977  /* Change the TIM state*/
978  hlptim->State= HAL_LPTIM_STATE_READY;
979 
980  /* Return function status */
981  return HAL_OK;
982 }
983 
992 {
993  uint32_t tmpcfgr = 0;
994 
995  /* Check the parameters */
997  assert_param(IS_LPTIM_PERIOD(Period));
1001 
1002  /* Set the LPTIM state */
1003  hlptim->State= HAL_LPTIM_STATE_BUSY;
1004 
1005  /* Configure edge sensitivity for encoder mode */
1006  /* Get the LPTIMx CFGR value */
1007  tmpcfgr = hlptim->Instance->CFGR;
1008 
1009  /* Clear CKPOL bits */
1010  tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1011 
1012  /* Set Input polarity */
1013  tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1014 
1015  /* Write to LPTIMx CFGR */
1016  hlptim->Instance->CFGR = tmpcfgr;
1017 
1018  /* Set ENC bit to enable the encoder interface */
1019  hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1020 
1021  /* Enable "switch to down direction" interrupt */
1023 
1024  /* Enable "switch to up direction" interrupt */
1026 
1027  /* Enable the Peripheral */
1028  __HAL_LPTIM_ENABLE(hlptim);
1029 
1030  /* Load the period value in the autoreload register */
1031  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1032 
1033  /* Start timer in continuous mode */
1035 
1036  /* Change the TIM state*/
1037  hlptim->State= HAL_LPTIM_STATE_READY;
1038 
1039  /* Return function status */
1040  return HAL_OK;
1041 }
1042 
1049 {
1050  /* Check the parameters */
1052 
1053  /* Set the LPTIM state */
1054  hlptim->State= HAL_LPTIM_STATE_BUSY;
1055 
1056  /* Disable the Peripheral */
1057  __HAL_LPTIM_DISABLE(hlptim);
1058 
1059  /* Reset ENC bit to disable the encoder interface */
1060  hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1061 
1062  /* Disable "switch to down direction" interrupt */
1064 
1065  /* Disable "switch to up direction" interrupt */
1067 
1068  /* Change the TIM state*/
1069  hlptim->State= HAL_LPTIM_STATE_READY;
1070 
1071  /* Return function status */
1072  return HAL_OK;
1073 }
1074 
1086 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1087 {
1088  /* Check the parameters */
1090  assert_param(IS_LPTIM_PERIOD(Period));
1091  assert_param(IS_LPTIM_PULSE(Timeout));
1092 
1093  /* Set the LPTIM state */
1094  hlptim->State= HAL_LPTIM_STATE_BUSY;
1095 
1096  /* Set TIMOUT bit to enable the timeout function */
1097  hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1098 
1099  /* Enable the Peripheral */
1100  __HAL_LPTIM_ENABLE(hlptim);
1101 
1102  /* Load the period value in the autoreload register */
1103  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1104 
1105  /* Load the Timeout value in the compare register */
1106  __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1107 
1108  /* Start timer in continuous mode */
1110 
1111  /* Change the TIM state*/
1112  hlptim->State= HAL_LPTIM_STATE_READY;
1113 
1114  /* Return function status */
1115  return HAL_OK;
1116 }
1117 
1124 {
1125  /* Check the parameters */
1127 
1128  /* Set the LPTIM state */
1129  hlptim->State= HAL_LPTIM_STATE_BUSY;
1130 
1131  /* Disable the Peripheral */
1132  __HAL_LPTIM_DISABLE(hlptim);
1133 
1134  /* Reset TIMOUT bit to enable the timeout function */
1135  hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1136 
1137  /* Change the TIM state*/
1138  hlptim->State= HAL_LPTIM_STATE_READY;
1139 
1140  /* Return function status */
1141  return HAL_OK;
1142 }
1143 
1155 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1156 {
1157  /* Check the parameters */
1159  assert_param(IS_LPTIM_PERIOD(Period));
1160  assert_param(IS_LPTIM_PULSE(Timeout));
1161 
1162  /* Set the LPTIM state */
1163  hlptim->State= HAL_LPTIM_STATE_BUSY;
1164 
1165  /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1167 
1168  /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1170 
1171  /* Set TIMOUT bit to enable the timeout function */
1172  hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1173 
1174  /* Enable Compare match interrupt */
1176 
1177  /* Enable the Peripheral */
1178  __HAL_LPTIM_ENABLE(hlptim);
1179 
1180  /* Load the period value in the autoreload register */
1181  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1182 
1183  /* Load the Timeout value in the compare register */
1184  __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1185 
1186  /* Start timer in continuous mode */
1188 
1189  /* Change the TIM state*/
1190  hlptim->State= HAL_LPTIM_STATE_READY;
1191 
1192  /* Return function status */
1193  return HAL_OK;
1194 }
1195 
1202 {
1203  /* Check the parameters */
1205 
1206  /* Set the LPTIM state */
1207  hlptim->State= HAL_LPTIM_STATE_BUSY;
1208 
1209  /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1211 
1212  /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1214 
1215  /* Disable the Peripheral */
1216  __HAL_LPTIM_DISABLE(hlptim);
1217 
1218  /* Reset TIMOUT bit to enable the timeout function */
1219  hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1220 
1221  /* Disable Compare match interrupt */
1223 
1224  /* Change the TIM state*/
1225  hlptim->State= HAL_LPTIM_STATE_READY;
1226 
1227  /* Return function status */
1228  return HAL_OK;
1229 }
1230 
1239 {
1240  /* Check the parameters */
1242  assert_param(IS_LPTIM_PERIOD(Period));
1243 
1244  /* Set the LPTIM state */
1245  hlptim->State= HAL_LPTIM_STATE_BUSY;
1246 
1247  /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1249  {
1250  /* Check if clock is prescaled */
1252  /* Set clock prescaler to 0 */
1253  hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1254  }
1255 
1256  /* Enable the Peripheral */
1257  __HAL_LPTIM_ENABLE(hlptim);
1258 
1259  /* Load the period value in the autoreload register */
1260  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1261 
1262  /* Start timer in continuous mode */
1264 
1265  /* Change the TIM state*/
1266  hlptim->State= HAL_LPTIM_STATE_READY;
1267 
1268  /* Return function status */
1269  return HAL_OK;
1270 }
1271 
1278 {
1279  /* Check the parameters */
1281 
1282  /* Set the LPTIM state */
1283  hlptim->State= HAL_LPTIM_STATE_BUSY;
1284 
1285  /* Disable the Peripheral */
1286  __HAL_LPTIM_DISABLE(hlptim);
1287 
1288  /* Change the TIM state*/
1289  hlptim->State= HAL_LPTIM_STATE_READY;
1290 
1291  /* Return function status */
1292  return HAL_OK;
1293 }
1294 
1303 {
1304  /* Check the parameters */
1306  assert_param(IS_LPTIM_PERIOD(Period));
1307 
1308  /* Set the LPTIM state */
1309  hlptim->State= HAL_LPTIM_STATE_BUSY;
1310 
1311  /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1313 
1314  /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1316 
1317  /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1319  {
1320  /* Check if clock is prescaled */
1322  /* Set clock prescaler to 0 */
1323  hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1324  }
1325 
1326  /* Enable Autoreload write complete interrupt */
1328 
1329  /* Enable Autoreload match interrupt */
1331 
1332  /* Enable the Peripheral */
1333  __HAL_LPTIM_ENABLE(hlptim);
1334 
1335  /* Load the period value in the autoreload register */
1336  __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1337 
1338  /* Start timer in continuous mode */
1340 
1341  /* Change the TIM state*/
1342  hlptim->State= HAL_LPTIM_STATE_READY;
1343 
1344  /* Return function status */
1345  return HAL_OK;
1346 }
1347 
1354 {
1355  /* Check the parameters */
1357 
1358  /* Set the LPTIM state */
1359  hlptim->State= HAL_LPTIM_STATE_BUSY;
1360 
1361  /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1363 
1364  /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1366 
1367  /* Disable the Peripheral */
1368  __HAL_LPTIM_DISABLE(hlptim);
1369 
1370  /* Disable Autoreload write complete interrupt */
1372 
1373  /* Disable Autoreload match interrupt */
1375 
1376  /* Change the TIM state*/
1377  hlptim->State= HAL_LPTIM_STATE_READY;
1378 
1379  /* Return function status */
1380  return HAL_OK;
1381 }
1382 
1408 {
1409  /* Check the parameters */
1411 
1412  return (hlptim->Instance->CNT);
1413 }
1414 
1421 {
1422  /* Check the parameters */
1424 
1425  return (hlptim->Instance->ARR);
1426 }
1427 
1434 {
1435  /* Check the parameters */
1437 
1438  return (hlptim->Instance->CMP);
1439 }
1440 
1466 {
1467  /* Compare match interrupt */
1469  {
1471  {
1472  /* Clear Compare match flag */
1474  /* Compare match Callback */
1476  }
1477  }
1478 
1479  /* Autoreload match interrupt */
1481  {
1483  {
1484  /* Clear Autoreload match flag */
1486  /* Autoreload match Callback */
1488  }
1489  }
1490 
1491  /* Trigger detected interrupt */
1493  {
1495  {
1496  /* Clear Trigger detected flag */
1498  /* Trigger detected callback */
1499  HAL_LPTIM_TriggerCallback(hlptim);
1500  }
1501  }
1502 
1503  /* Compare write interrupt */
1505  {
1507  {
1508  /* Clear Compare write flag */
1510  /* Compare write Callback */
1512  }
1513  }
1514 
1515  /* Autoreload write interrupt */
1517  {
1519  {
1520  /* Clear Autoreload write flag */
1522  /* Autoreload write Callback */
1524  }
1525  }
1526 
1527  /* Direction counter changed from Down to Up interrupt */
1528  if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1529  {
1531  {
1532  /* Clear Direction counter changed from Down to Up flag */
1534  /* Direction counter changed from Down to Up Callback */
1536  }
1537  }
1538 
1539  /* Direction counter changed from Up to Down interrupt */
1541  {
1543  {
1544  /* Clear Direction counter changed from Up to Down flag */
1546  /* Direction counter changed from Up to Down Callback */
1548  }
1549  }
1550 
1552 }
1553 
1560 {
1561  /* Prevent unused argument(s) compilation warning */
1562  UNUSED(hlptim);
1563 
1564  /* NOTE : This function Should not be modified, when the callback is needed,
1565  the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
1566  */
1567 }
1568 
1575 {
1576  /* Prevent unused argument(s) compilation warning */
1577  UNUSED(hlptim);
1578 
1579  /* NOTE : This function Should not be modified, when the callback is needed,
1580  the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
1581  */
1582 }
1583 
1590 {
1591  /* Prevent unused argument(s) compilation warning */
1592  UNUSED(hlptim);
1593 
1594  /* NOTE : This function Should not be modified, when the callback is needed,
1595  the HAL_LPTIM_TriggerCallback could be implemented in the user file
1596  */
1597 }
1598 
1605 {
1606  /* Prevent unused argument(s) compilation warning */
1607  UNUSED(hlptim);
1608 
1609  /* NOTE : This function Should not be modified, when the callback is needed,
1610  the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
1611  */
1612 }
1613 
1620 {
1621  /* Prevent unused argument(s) compilation warning */
1622  UNUSED(hlptim);
1623 
1624  /* NOTE : This function Should not be modified, when the callback is needed,
1625  the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
1626  */
1627 }
1628 
1635 {
1636  /* Prevent unused argument(s) compilation warning */
1637  UNUSED(hlptim);
1638 
1639  /* NOTE : This function Should not be modified, when the callback is needed,
1640  the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
1641  */
1642 }
1643 
1650 {
1651  /* Prevent unused argument(s) compilation warning */
1652  UNUSED(hlptim);
1653 
1654  /* NOTE : This function Should not be modified, when the callback is needed,
1655  the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
1656  */
1657 }
1658 
1683 {
1684  return hlptim->State;
1685 }
1686 
1696 #endif /* HAL_LPTIM_MODULE_ENABLED */
1697 
1705 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT()
Enable interrupt on the LPTIM Wake-up Timer associated Exti line.
#define LPTIM_IT_EXTTRIG
LPTIM_ClockConfigTypeDef Clock
#define IS_LPTIM_CLOCK_SOURCE(__SOURCE__)
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
#define LPTIM_IT_CMPOK
#define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__)
Clears the specified LPTIM flag.
#define __HAL_LPTIM_START_SINGLE(__HANDLE__)
#define assert_param(expr)
Include module's header file.
#define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__, __VALUE__)
Writes the passed parameter in the Autoreload register.
void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
enum __HAL_LPTIM_StateTypeDef HAL_LPTIM_StateTypeDef
HAL LPTIM State structure definition.
#define LPTIM_IT_ARROK
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT()
Disable interrupt on the LPTIM Wake-up Timer associated Exti line.
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE()
Enable rising edge trigger on the LPTIM Wake-up Timer associated Exti line.
#define LPTIM_TRIGSOURCE_SOFTWARE
void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
#define __HAL_UNLOCK(__HANDLE__)
#define LPTIM_FLAG_ARROK
#define LPTIM_FLAG_CMPM
#define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__)
#define IS_LPTIM_PERIOD(PERIOD)
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
#define __HAL_LPTIM_COMPARE_SET(__HANDLE__, __VALUE__)
Writes the passed parameter in the Compare register.
#define LPTIM_FLAG_CMPOK
LPTIM handle Structure definition.
__IO uint32_t CMP
Definition: stm32f745xx.h:918
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
#define LPTIM_FLAG_ARRM
#define LPTIM_PRESCALER_DIV1
#define LPTIM_CFGR_PRELOAD
Definition: stm32f745xx.h:7384
void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
#define LPTIM_FLAG_EXTTRIG
HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
#define IS_LPTIM_EXT_TRG_POLARITY(__POLAR__)
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE()
Disable rising edge trigger on the LPTIM Wake-up Timer associated Exti line.
uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
#define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__)
Disable the specified LPTIM interrupt.
HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
#define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__)
Enable the specified LPTIM interrupt.
#define LPTIM_COUNTERSOURCE_EXTERNAL
void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
#define NULL
Definition: usbd_def.h:53
HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
#define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__)
#define LPTIM_CFGR_TRGFLT
Definition: stm32f745xx.h:7363
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
__IO uint32_t CNT
Definition: stm32f745xx.h:920
HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
LPTIM_TriggerConfigTypeDef Trigger
#define LPTIM_CFGR_WAVE
Definition: stm32f745xx.h:7382
#define LPTIM_CFGR_TRIGEN
Definition: stm32f745xx.h:7377
#define __HAL_LPTIM_ENABLE(__HANDLE__)
Enable/Disable the LPTIM peripheral.
#define IS_LPTIM_INSTANCE(__INSTANCE__)
Definition: stm32f745xx.h:8864
This file contains all the functions prototypes for the HAL module driver.
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
#define LPTIM_CFGR_CKFLT
Definition: stm32f745xx.h:7359
#define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__)
HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
#define __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG()
Clear the LPTIM Wake-up Timer associated Exti line flag.
__IO uint32_t CFGR
Definition: stm32f745xx.h:916
__IO HAL_LPTIM_StateTypeDef State
HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
#define IS_LPTIM_CLOCK_POLARITY(__POLARITY__)
HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
#define LPTIM_CFGR_TRIGSEL
Definition: stm32f745xx.h:7372
HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
#define UNUSED(x)
LPTIM_ULPClockConfigTypeDef UltraLowPowerClock
LPTIM_InitTypeDef Init
#define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__)
#define LPTIM_CFGR_CKSEL
Definition: stm32f745xx.h:7353
#define LPTIM_IT_UP
#define LPTIM_IT_ARRM
#define LPTIM_IT_DOWN
void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
#define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__)
Checks whether the specified LPTIM flag is set or not.
HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
#define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__)
#define LPTIM_CFGR_CKPOL
Definition: stm32f745xx.h:7355
#define LPTIM_IT_CMPM
__IO uint32_t ARR
Definition: stm32f745xx.h:919
#define __HAL_LPTIM_DISABLE(__HANDLE__)
uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
#define LPTIM_CFGR_WAVPOL
Definition: stm32f745xx.h:7383
HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
#define LPTIM_FLAG_DOWN
HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
#define LPTIM_CFGR_ENC
Definition: stm32f745xx.h:7386
HAL_StatusTypeDef
HAL Status structures definition.
HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
#define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)
Checks whether the specified LPTIM interrupt is set or not.
#define LPTIM_CLOCKSOURCE_ULPTIM
#define LPTIM_CFGR_TIMOUT
Definition: stm32f745xx.h:7381
#define LPTIM_CFGR_PRESC
Definition: stm32f745xx.h:7367
#define LPTIM_CFGR_COUNTMODE
Definition: stm32f745xx.h:7385
#define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__)
Starts the LPTIM peripheral in Continuous or in single mode.
#define IS_LPTIM_TRG_SOURCE(__TRIG__)
HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
#define LPTIM_FLAG_UP
HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
#define IS_LPTIM_UPDATE_MODE(__MODE__)
#define IS_LPTIM_COUNTER_SOURCE(__SOURCE__)
#define IS_LPTIM_PULSE(PULSE)
LPTIM_TypeDef * Instance
#define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC