stm32f7xx_hal_irda.c

Go to the documentation of this file.

/* Includes ------------------------------------------------------------------*/
#include "stm32f7xx_hal.h"

#ifdef HAL_IRDA_MODULE_ENABLED

/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
#define TEACK_REACK_TIMEOUT            1000U
#define HAL_IRDA_TXDMA_TIMEOUTVALUE    22000U
#define IRDA_CR1_FIELDS  ((uint32_t)(USART_CR1_M | USART_CR1_PCE \
                                   | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE))

/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
static void IRDA_DMATransmitCplt(DMA_HandleTypeDef *hdma);
static void IRDA_DMATransmitHalfCplt(DMA_HandleTypeDef *hdma);
static void IRDA_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
static void IRDA_DMAReceiveHalfCplt(DMA_HandleTypeDef *hdma);
static void IRDA_DMAError(DMA_HandleTypeDef *hdma);
static void IRDA_DMAAbortOnError(DMA_HandleTypeDef *hdma);
static void IRDA_EndTxTransfer(IRDA_HandleTypeDef *hirda);
static void IRDA_EndRxTransfer(IRDA_HandleTypeDef *hirda);
static void IRDA_SetConfig (IRDA_HandleTypeDef *hirda);
static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda);
static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
static HAL_StatusTypeDef IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda);
static HAL_StatusTypeDef IRDA_EndTransmit_IT(IRDA_HandleTypeDef *hirda);
static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda);
/* Exported functions --------------------------------------------------------*/
HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda)
{
    /* Check the IRDA handle allocation */
    if(hirda == NULL)
    {
        return HAL_ERROR;
    }

    /* Check the USART/UART associated to the IRDA handle */
    assert_param(IS_IRDA_INSTANCE(hirda->Instance));

    if(hirda->gState == HAL_IRDA_STATE_RESET)
    {
        /* Allocate lock resource and initialize it */
        hirda->Lock = HAL_UNLOCKED;
        /* Init the low level hardware : GPIO, CLOCK, CORTEX */
        HAL_IRDA_MspInit(hirda);
    }

    hirda->gState = HAL_IRDA_STATE_BUSY;

    /* Disable the Peripheral to update the configuration registers */
    __HAL_IRDA_DISABLE(hirda);

    /* Set the IRDA Communication parameters */
    IRDA_SetConfig(hirda);

    /* In IRDA mode, the following bits must be kept cleared:
    - LINEN, STOP and CLKEN bits in the USART_CR2 register,
    - SCEN and HDSEL bits in the USART_CR3 register.*/
    CLEAR_BIT(hirda->Instance->CR3, USART_CR2_LINEN | USART_CR2_STOP | USART_CR2_CLKEN);
    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_SCEN | USART_CR3_HDSEL);

    /* set the UART/USART in IRDA mode */
    SET_BIT(hirda->Instance->CR3, USART_CR3_IREN);

    /* Enable the Peripheral */
    __HAL_IRDA_ENABLE(hirda);

    /* TEACK and/or REACK to check before moving hirda->State to Ready */
    return (IRDA_CheckIdleState(hirda));
}

HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda)
{
    /* Check the IRDA handle allocation */
    if(hirda == NULL)
    {
        return HAL_ERROR;
    }

    /* Check the parameters */
    assert_param(IS_IRDA_INSTANCE(hirda->Instance));

    hirda->gState = HAL_IRDA_STATE_BUSY;

    /* DeInit the low level hardware */
    HAL_IRDA_MspDeInit(hirda);
    /* Disable the Peripheral */
    __HAL_IRDA_DISABLE(hirda);

    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
    hirda->gState = HAL_IRDA_STATE_RESET;
    hirda->RxState = HAL_IRDA_STATE_RESET;

    /* Release Lock */
    __HAL_UNLOCK(hirda);

    return HAL_OK;
}

__weak void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda)
{
    /* Prevent unused argument(s) compilation warning */
    UNUSED(hirda);

    /* NOTE : This function Should not be modified, when the callback is needed,
              the HAL_IRDA_MspInit could be implemented in the user file
     */
}

__weak void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda)
{
    /* Prevent unused argument(s) compilation warning */
    UNUSED(hirda);

    /* NOTE : This function Should not be modified, when the callback is needed,
              the HAL_IRDA_MspDeInit could be implemented in the user file
     */
}

HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
    uint16_t* tmp;
    uint32_t tickstart = 0U;

    /* Check that a Tx process is not already ongoing */
    if(hirda->gState == HAL_IRDA_STATE_READY)
    {
        if((pData == NULL) || (Size == 0U))
        {
            return  HAL_ERROR;
        }

        /* Process Locked */
        __HAL_LOCK(hirda);
        hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
        hirda->gState = HAL_IRDA_STATE_BUSY_TX;

        /* Init tickstart for timeout managment*/
        tickstart = HAL_GetTick();

        hirda->TxXferSize = Size;
        hirda->TxXferCount = Size;
        while(hirda->TxXferCount > 0U)
        {
            hirda->TxXferCount--;

            if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
            {
                return HAL_TIMEOUT;
            }
            if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
            {
                tmp = (uint16_t*) pData;
                hirda->Instance->TDR = (*tmp & (uint16_t)0x01FFU);
                pData +=2;
            }
            else
            {
                hirda->Instance->TDR = (*pData++ & (uint8_t)0xFFU);
            }
        }

        if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
        {
            return HAL_TIMEOUT;
        }

        /* At end of Tx process, restore hirda->gState to Ready */
        hirda->gState = HAL_IRDA_STATE_READY;

        /* Process Unlocked */
        __HAL_UNLOCK(hirda);

        return HAL_OK;
    }
    else
    {
        return HAL_BUSY;
    }
}

HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
    uint16_t* tmp;
    uint16_t uhMask;
    uint32_t tickstart = 0U;

    /* Check that a Rx process is not already ongoing */
    if(hirda->RxState == HAL_IRDA_STATE_READY)
    {
        if((pData == NULL) || (Size == 0U))
        {
            return  HAL_ERROR;
        }

        /* Process Locked */
        __HAL_LOCK(hirda);
        hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
        hirda->RxState = HAL_IRDA_STATE_BUSY_RX;

        /* Init tickstart for timeout managment*/
        tickstart = HAL_GetTick();

        hirda->RxXferSize = Size;
        hirda->RxXferCount = Size;

        /* Computation of the mask to apply to the RDR register
           of the UART associated to the IRDA */
        IRDA_MASK_COMPUTATION(hirda);
        uhMask = hirda->Mask;

        /* Check data remaining to be received */
        while(hirda->RxXferCount > 0U)
        {
            hirda->RxXferCount--;

            if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
            {
                return HAL_TIMEOUT;
            }
            if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
            {
                tmp = (uint16_t*) pData ;
                *tmp = (uint16_t)(hirda->Instance->RDR & uhMask);
                pData +=2;
            }
            else
            {
                *pData++ = (uint8_t)(hirda->Instance->RDR & (uint8_t)uhMask);
            }
        }

        /* At end of Rx process, restore hirda->RxState to Ready */
        hirda->RxState = HAL_IRDA_STATE_READY;

        /* Process Unlocked */
        __HAL_UNLOCK(hirda);

        return HAL_OK;
    }
    else
    {
        return HAL_BUSY;
    }
}

HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
{
    /* Check that a Tx process is not already ongoing */
    if(hirda->gState == HAL_IRDA_STATE_READY)
    {
        if((pData == NULL) || (Size == 0U))
        {
            return HAL_ERROR;
        }

        /* Process Locked */
        __HAL_LOCK(hirda);

        hirda->pTxBuffPtr = pData;
        hirda->TxXferSize = Size;
        hirda->TxXferCount = Size;

        hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
        hirda->gState = HAL_IRDA_STATE_BUSY_TX;

        /* Process Unlocked */
        __HAL_UNLOCK(hirda);

        /* Enable the IRDA Transmit Complete Interrupt */
        SET_BIT(hirda->Instance->CR1, USART_CR1_TCIE);

        return HAL_OK;
    }
    else
    {
        return HAL_BUSY;
    }
}

HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
{
    /* Check that a Rx process is not already ongoing */
    if(hirda->RxState == HAL_IRDA_STATE_READY)
    {
        if((pData == NULL) || (Size == 0U))
        {
            return HAL_ERROR;
        }

        /* Process Locked */
        __HAL_LOCK(hirda);

        hirda->pRxBuffPtr = pData;
        hirda->RxXferSize = Size;
        hirda->RxXferCount = Size;

        /* Computation of the mask to apply to the RDR register
           of the UART associated to the IRDA */
        IRDA_MASK_COMPUTATION(hirda);

        hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
        hirda->RxState = HAL_IRDA_STATE_BUSY_RX;

        /* Process Unlocked */
        __HAL_UNLOCK(hirda);

        /* Enable the IRDA Parity Error Interrupt */
        SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);

        /* Enable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
        SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);

        /* Enable the IRDA Data Register not empty Interrupt */
        SET_BIT(hirda->Instance->CR1, USART_CR1_RXNEIE);

        return HAL_OK;
    }
    else
    {
        return HAL_BUSY;
    }
}

HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
{
    uint32_t *tmp;

    /* Check that a Tx process is not already ongoing */
    if(hirda->gState == HAL_IRDA_STATE_READY)
    {
        if((pData == NULL) || (Size == 0U))
        {
            return HAL_ERROR;
        }

        /* Process Locked */
        __HAL_LOCK(hirda);

        hirda->pTxBuffPtr = pData;
        hirda->TxXferSize = Size;
        hirda->TxXferCount = Size;

        hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
        hirda->gState = HAL_IRDA_STATE_BUSY_TX;

        /* Set the IRDA DMA transfer complete callback */
        hirda->hdmatx->XferCpltCallback = IRDA_DMATransmitCplt;

        /* Set the IRDA DMA half transfer complete callback */
        hirda->hdmatx->XferHalfCpltCallback = IRDA_DMATransmitHalfCplt;

        /* Set the DMA error callback */
        hirda->hdmatx->XferErrorCallback = IRDA_DMAError;

        /* Set the DMA abort callback */
        hirda->hdmatx->XferAbortCallback = NULL;

        /* Enable the IRDA transmit DMA channel */
        tmp = (uint32_t*)&pData;
        HAL_DMA_Start_IT(hirda->hdmatx, *(uint32_t*)tmp, (uint32_t)&hirda->Instance->TDR, Size);

        /* Clear the TC flag in the SR register by writing 0 to it */
        __HAL_IRDA_CLEAR_IT(hirda, IRDA_FLAG_TC);

        /* Process Unlocked */
        __HAL_UNLOCK(hirda);

        /* Enable the DMA transfer for transmit request by setting the DMAT bit
           in the IRDA CR3 register */
        SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT);

        return HAL_OK;
    }
    else
    {
        return HAL_BUSY;
    }
}

HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size)
{
    uint32_t *tmp;

    /* Check that a Rx process is not already ongoing */
    if(hirda->RxState == HAL_IRDA_STATE_READY)
    {
        if((pData == NULL) || (Size == 0U))
        {
            return HAL_ERROR;
        }

        /* Process Locked */
        __HAL_LOCK(hirda);

        hirda->pRxBuffPtr = pData;
        hirda->RxXferSize = Size;

        hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
        hirda->RxState = HAL_IRDA_STATE_BUSY_RX;

        /* Set the IRDA DMA transfer complete callback */
        hirda->hdmarx->XferCpltCallback = IRDA_DMAReceiveCplt;

        /* Set the IRDA DMA half transfer complete callback */
        hirda->hdmarx->XferHalfCpltCallback = IRDA_DMAReceiveHalfCplt;

        /* Set the DMA error callback */
        hirda->hdmarx->XferErrorCallback = IRDA_DMAError;

        /* Set the DMA abort callback */
        hirda->hdmarx->XferAbortCallback = NULL;

        /* Enable the DMA channel */
        tmp = (uint32_t*)&pData;
        HAL_DMA_Start_IT(hirda->hdmarx, (uint32_t)&hirda->Instance->RDR, *(uint32_t*)tmp, Size);

        /* Process Unlocked */
        __HAL_UNLOCK(hirda);

        /* Enable the IRDA Parity Error Interrupt */
        SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);

        /* Enable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
        SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);

        /* Enable the DMA transfer for the receiver request by setting the DMAR bit
        in the USART CR3 register */
        SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);

        return HAL_OK;
    }
    else
    {
        return HAL_BUSY;
    }
}

HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda)
{
    /* Process Locked */
    __HAL_LOCK(hirda);

    if((hirda->gState == HAL_IRDA_STATE_BUSY_TX)&&
            (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)))
    {
        /* Disable the UART DMA Tx request */
        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
    }
    if((hirda->RxState == HAL_IRDA_STATE_BUSY_RX)&&
            (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
    {
        /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
        CLEAR_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);

        /* Disable the UART DMA Rx request */
        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
    }

    /* Process Unlocked */
    __HAL_UNLOCK(hirda);

    return HAL_OK;
}

HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda)
{
    /* Process Locked */
    __HAL_LOCK(hirda);

    if(hirda->gState == HAL_IRDA_STATE_BUSY_TX)
    {
        /* Enable the UART DMA Tx request */
        SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT);
    }
    if(hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
    {
        /* Clear the Overrun flag before resuming the Rx transfer*/
        __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_OREF);

        /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
        SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
        SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);

        /* Enable the UART DMA Rx request */
        SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
    }

    /* Process Unlocked */
    __HAL_UNLOCK(hirda);

    return HAL_OK;
}

HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda)
{
    /* The Lock is not implemented on this API to allow the user application
       to call the HAL IRDA API under callbacks HAL_IRDA_TxCpltCallback() / HAL_IRDA_RxCpltCallback() /
       HAL_IRDA_TxHalfCpltCallback / HAL_IRDA_RxHalfCpltCallback:
       indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete
       interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of
       the stream and the corresponding call back is executed. */

    /* Stop IRDA DMA Tx request if ongoing */
    if ((hirda->gState == HAL_IRDA_STATE_BUSY_TX) &&
            (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)))
    {
        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);

        /* Abort the IRDA DMA Tx channel */
        if(hirda->hdmatx != NULL)
        {
            HAL_DMA_Abort(hirda->hdmatx);
        }
        IRDA_EndTxTransfer(hirda);
    }

    /* Stop IRDA DMA Rx request if ongoing */
    if ((hirda->RxState == HAL_IRDA_STATE_BUSY_RX) &&
            (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
    {
        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);

        /* Abort the IRDA DMA Rx channel */
        if(hirda->hdmarx != NULL)
        {
            HAL_DMA_Abort(hirda->hdmarx);
        }
        IRDA_EndRxTransfer(hirda);
    }
    return HAL_OK;
}

static void IRDA_DMAAbortOnError(DMA_HandleTypeDef *hdma)
{
    IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
    hirda->RxXferCount = 0U;
    hirda->TxXferCount = 0U;

    HAL_IRDA_ErrorCallback(hirda);
}

void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda)
{
    uint32_t isrflags, cr1its, cr3its, errorflags;

    isrflags   = READ_REG(hirda->Instance->ISR);
    cr1its     = READ_REG(hirda->Instance->CR1);
    cr3its     = READ_REG(hirda->Instance->CR3);

    /* If no error occurs */
    errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE));
    if (errorflags == RESET)
    {
        /* IRDA in mode Receiver ---------------------------------------------------*/
        if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
        {
            IRDA_Receive_IT(hirda);
            /* Clear RXNE interrupt flag */
            __HAL_IRDA_SEND_REQ(hirda, IRDA_RXDATA_FLUSH_REQUEST);
        }
    }

    /* If some errors occur */
    if((errorflags != RESET) && ((cr3its & (USART_CR3_EIE | USART_CR1_PEIE)) != RESET))
    {
        /* IRDA parity error interrupt occurred -------------------------------------*/
        if(((isrflags & USART_ISR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
        {
            __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_PEF);
            hirda->ErrorCode |= HAL_IRDA_ERROR_PE;
        }

        /* IRDA frame error interrupt occurred --------------------------------------*/
        if(((isrflags & USART_ISR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
        {
            __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_FEF);
            hirda->ErrorCode |= HAL_IRDA_ERROR_FE;
        }

        /* IRDA noise error interrupt occurred --------------------------------------*/
        if(((isrflags & USART_ISR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
        {
            __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_NEF);
            hirda->ErrorCode |= HAL_IRDA_ERROR_NE;
        }

        /* IRDA Over-Run interrupt occurred -----------------------------------------*/
        if(((isrflags & USART_ISR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
        {
            __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_OREF);
            hirda->ErrorCode |= HAL_IRDA_ERROR_ORE;
        }

        /* Call IRDA Error Call back function if need be --------------------------*/
        if(hirda->ErrorCode != HAL_IRDA_ERROR_NONE)
        {
            /* IRDA in mode Receiver ---------------------------------------------------*/
            if(((isrflags & USART_ISR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
            {
                IRDA_Receive_IT(hirda);
            }

            /* If Overrun error occurs, or if any error occurs in DMA mode reception,
            consider error as blocking */
            if (((hirda->ErrorCode & HAL_UART_ERROR_ORE) != RESET) ||
                    (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)))
            {
                /* Blocking error : transfer is aborted
                Set the IRDA state ready to be able to start again the process,
                Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
                IRDA_EndRxTransfer(hirda);

                /* Disable the IRDA DMA Rx request if enabled */
                if (HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR))
                {
                    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);

                    /* Abort the IRDA DMA Rx channel */
                    if(hirda->hdmarx != NULL)
                    {
                        /* Set the IRDA DMA Abort callback :
                        will lead to call HAL_IRDA_ErrorCallback() at end of DMA abort procedure */
                        hirda->hdmarx->XferAbortCallback = IRDA_DMAAbortOnError;

                        /* Abort DMA RX */
                        if(HAL_DMA_Abort_IT(hirda->hdmarx) != HAL_OK)
                        {
                          /* Call Directly hirda->hdmarx->XferAbortCallback function in case of error */
                          hirda->hdmarx->XferAbortCallback(hirda->hdmarx);
                        }
                    }
                    else
                    {
                        /* Call user error callback */
                        HAL_IRDA_ErrorCallback(hirda);
                    }
                }
                else
                {
                    /* Call user error callback */
                    HAL_IRDA_ErrorCallback(hirda);
                }
            }
            else
            {
                /* Non Blocking error : transfer could go on.
                Error is notified to user through user error callback */
                HAL_IRDA_ErrorCallback(hirda);
                hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
            }
        }
        return;

    } /* End if some error occurs */

    /* IRDA in mode Transmitter ------------------------------------------------*/
    if(((isrflags & USART_ISR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
    {
        IRDA_Transmit_IT(hirda);
        return;
    }

    /* IRDA in mode Transmitter (transmission end) -----------------------------*/
    if(((isrflags & USART_ISR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
    {
        IRDA_EndTransmit_IT(hirda);
        return;
    }
}

static void IRDA_EndTxTransfer(IRDA_HandleTypeDef *hirda)
{
    /* Disable TXEIE and TCIE interrupts */
    CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));

    /* At end of Tx process, restore hirda->gState to Ready */
    hirda->gState = HAL_IRDA_STATE_READY;
}

static void IRDA_EndRxTransfer(IRDA_HandleTypeDef *hirda)
{
    /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
    CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);

    /* At end of Rx process, restore huart->RxState to Ready */
    hirda->RxState = HAL_IRDA_STATE_READY;
}

__weak void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda)
{
    /* Prevent unused argument(s) compilation warning */
    UNUSED(hirda);

    /* NOTE : This function should not be modified, when the callback is needed,
              the HAL_IRDA_TxHalfCpltCallback can be implemented in the user file
     */
}

__weak void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda)
{
    /* Prevent unused argument(s) compilation warning */
    UNUSED(hirda);

    /* NOTE : This function should not be modified, when the callback is needed,
              the HAL_IRDA_TxCpltCallback can be implemented in the user file
     */
}

__weak void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda)
{
    /* Prevent unused argument(s) compilation warning */
    UNUSED(hirda);

    /* NOTE : This function should not be modified, when the callback is needed,
              the HAL_IRDA_RxHalfCpltCallback can be implemented in the user file
     */
}

__weak void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda)
{
    /* Prevent unused argument(s) compilation warning */
    UNUSED(hirda);

    /* NOTE : This function should not be modified, when the callback is needed,
              the HAL_IRDA_RxCpltCallback can be implemented in the user file
     */
}

__weak void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda)
{
    /* Prevent unused argument(s) compilation warning */
    UNUSED(hirda);

    /* NOTE : This function should not be modified, when the callback is needed,
              the HAL_IRDA_ErrorCallback can be implemented in the user file
     */
}

HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda)
{
    uint32_t temp1 = 0x00U, temp2 = 0x00U;
    temp1 = hirda->gState;
    temp2 = hirda->RxState;

    return (HAL_IRDA_StateTypeDef)(temp1 | temp2);
}

uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda)
{
    uint32_t temp1 = 0x00U, temp2 = 0x00U;
    temp1 = hirda->gState;
    temp2 = hirda->RxState;

    return (HAL_IRDA_StateTypeDef)(temp1 | temp2);
}

static void IRDA_SetConfig(IRDA_HandleTypeDef *hirda)
{
    uint32_t tmpreg      = 0x00000000U;
    uint32_t clocksource = 0x00000000U;

    /* Check the communication parameters */
    assert_param(IS_IRDA_BAUDRATE(hirda->Init.BaudRate));
    assert_param(IS_IRDA_WORD_LENGTH(hirda->Init.WordLength));
    assert_param(IS_IRDA_PARITY(hirda->Init.Parity));
    assert_param(IS_IRDA_TX_RX_MODE(hirda->Init.Mode));
    assert_param(IS_IRDA_PRESCALER(hirda->Init.Prescaler));
    assert_param(IS_IRDA_POWERMODE(hirda->Init.PowerMode));
    /*-------------------------- USART CR1 Configuration -----------------------*/
    /* Configure the IRDA Word Length, Parity and transfer Mode:
    Set the M bits according to hirda->Init.WordLength value
    Set PCE and PS bits according to hirda->Init.Parity value
    Set TE and RE bits according to hirda->Init.Mode value */
    tmpreg = (uint32_t)hirda->Init.WordLength | hirda->Init.Parity | hirda->Init.Mode ;

    MODIFY_REG(hirda->Instance->CR1, IRDA_CR1_FIELDS, tmpreg);

    /*-------------------------- USART CR3 Configuration -----------------------*/
    MODIFY_REG(hirda->Instance->CR3, USART_CR3_IRLP, hirda->Init.PowerMode);

    /*-------------------------- USART GTPR Configuration ----------------------*/
    MODIFY_REG(hirda->Instance->GTPR, (uint32_t)USART_GTPR_PSC, hirda->Init.Prescaler);

    /*-------------------------- USART BRR Configuration -----------------------*/
    IRDA_GETCLOCKSOURCE(hirda, clocksource);
    switch (clocksource)
    {
    case IRDA_CLOCKSOURCE_PCLK1:
        hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK1Freq() + (hirda->Init.BaudRate/2))/ hirda->Init.BaudRate);
        break;
    case IRDA_CLOCKSOURCE_PCLK2:
        hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetPCLK2Freq() + (hirda->Init.BaudRate/2))/ hirda->Init.BaudRate);
        break;
    case IRDA_CLOCKSOURCE_HSI:
        hirda->Instance->BRR = (uint16_t)((HSI_VALUE + (hirda->Init.BaudRate/2))/ hirda->Init.BaudRate);
        break;
    case IRDA_CLOCKSOURCE_SYSCLK:
        hirda->Instance->BRR = (uint16_t)((HAL_RCC_GetSysClockFreq() + (hirda->Init.BaudRate/2))/ hirda->Init.BaudRate);
        break;
    case IRDA_CLOCKSOURCE_LSE:
        hirda->Instance->BRR = (uint16_t)((LSE_VALUE + (hirda->Init.BaudRate/2))/ hirda->Init.BaudRate);
        break;
    default:
        break;
    }
}

static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda)
{
    uint32_t tickstart = 0U;

    /* Initialize the IRDA ErrorCode */
    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;

    /* Init tickstart for timeout managment*/
    tickstart = HAL_GetTick();

    /* Check if the Transmitter is enabled */
    if((hirda->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
    {
        /* Wait until TEACK flag is set */
        if(IRDA_WaitOnFlagUntilTimeout(hirda, USART_ISR_TEACK, RESET, tickstart, TEACK_REACK_TIMEOUT) != HAL_OK)
        {
            return HAL_TIMEOUT;
        }
    }
    /* Check if the Receiver is enabled */
    if((hirda->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
    {
        if(IRDA_WaitOnFlagUntilTimeout(hirda, USART_ISR_REACK, RESET, tickstart, TEACK_REACK_TIMEOUT) != HAL_OK)
        {
            return HAL_TIMEOUT;
        }
    }
    /* Process Unlocked */
    __HAL_UNLOCK(hirda);

    /* Initialize the IRDA state*/
    hirda->gState= HAL_IRDA_STATE_READY;
    hirda->RxState= HAL_IRDA_STATE_READY;

    return HAL_OK;
}

static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
{
    /* Wait until flag is set */
    while((__HAL_IRDA_GET_FLAG(hirda, Flag) ? SET : RESET) == Status)
    {
        /* Check for the Timeout */
        if(Timeout != HAL_MAX_DELAY)
        {
            if((Timeout == 0)||((HAL_GetTick() - Tickstart ) > Timeout))
            {
                /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
                CLEAR_BIT(hirda->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
                CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);

                hirda->gState= HAL_IRDA_STATE_READY;
                hirda->RxState= HAL_IRDA_STATE_READY;

                /* Process Unlocked */
                __HAL_UNLOCK(hirda);

                return HAL_TIMEOUT;
            }
        }
    }
    return HAL_OK;
}

static HAL_StatusTypeDef IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda)
{
    uint16_t* tmp;

    /* Check that a Tx process is ongoing */
    if(hirda->gState == HAL_IRDA_STATE_BUSY_TX)
    {
        if(hirda->Init.WordLength == IRDA_WORDLENGTH_9B)
        {
            tmp = (uint16_t*) hirda->pTxBuffPtr;
            hirda->Instance->RDR = (uint16_t)(*tmp & (uint16_t)0x01FFU);
            if(hirda->Init.Parity == IRDA_PARITY_NONE)
            {
                hirda->pTxBuffPtr += 2U;
            }
            else
            {
                hirda->pTxBuffPtr += 1U;
            }
        }
        else
        {
            hirda->Instance->RDR = (uint8_t)(*hirda->pTxBuffPtr++ & (uint8_t)0x00FFU);
        }

        if(--hirda->TxXferCount == 0U)
        {
            /* Disable the IRDA Transmit Data Register Empty Interrupt */
            CLEAR_BIT(hirda->Instance->CR1, USART_CR1_TXEIE);

            /* Enable the IRDA Transmit Complete Interrupt */
            SET_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
        }

        return HAL_OK;
    }
    else
    {
        return HAL_BUSY;
    }
}

static HAL_StatusTypeDef IRDA_EndTransmit_IT(IRDA_HandleTypeDef *hirda)
{
    /* Disable the IRDA Transmit Complete Interrupt */
    CLEAR_BIT(hirda->Instance->CR1, USART_CR1_TCIE);

    /* Disable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
    CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);

    /* Tx process is ended, restore hirda->gState to Ready */
    hirda->gState = HAL_IRDA_STATE_READY;

    HAL_IRDA_TxCpltCallback(hirda);

    return HAL_OK;
}

static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda)
{
    uint16_t* tmp;
    uint16_t  uhdata;
    uint16_t  uhMask = hirda->Mask;

    if(hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
    {
        uhdata = (uint16_t) READ_REG(hirda->Instance->RDR);
        if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE))
        {
            tmp = (uint16_t*) hirda->pRxBuffPtr ;
            *tmp = (uint16_t)(uhdata & uhMask);
            hirda->pRxBuffPtr  +=2U;
        }
        else
        {
            *hirda->pRxBuffPtr++ = (uint8_t)(uhdata & (uint8_t)uhMask);
        }

        if(--hirda->RxXferCount == 0U)
        {
            CLEAR_BIT(hirda->Instance->CR1, USART_CR1_RXNEIE);

            /* Disable the IRDA Parity Error Interrupt */
            CLEAR_BIT(hirda->Instance->CR1, USART_CR1_PEIE);

            /* Disable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */
            CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);

            /* Rx process is completed, restore hirda->RxState to Ready */
            hirda->RxState = HAL_IRDA_STATE_READY;

            HAL_IRDA_RxCpltCallback(hirda);

            return HAL_OK;
        }
        return HAL_OK;
    }
    else
    {
        /* Clear RXNE interrupt flag */
        __HAL_IRDA_SEND_REQ(hirda, IRDA_RXDATA_FLUSH_REQUEST);
        return HAL_BUSY;
    }
}

static void IRDA_DMATransmitCplt(DMA_HandleTypeDef *hdma)
{
    IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;

    /* DMA Normal mode*/
    if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
    {
        hirda->TxXferCount = 0U;

        /* Disable the DMA transfer for transmit request by setting the DMAT bit
           in the IRDA CR3 register */
        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT);

        /* Enable the IRDA Transmit Complete Interrupt */
        SET_BIT(hirda->Instance->CR1, USART_CR1_TCIE);
    }
    /* DMA Circular mode */
    else
    {
        HAL_IRDA_TxCpltCallback(hirda);
    }
}

static void IRDA_DMATransmitHalfCplt(DMA_HandleTypeDef *hdma)
{
    IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;

    HAL_IRDA_TxHalfCpltCallback(hirda);
}

static void IRDA_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
{
    IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;

    /* DMA Normal mode */
    if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
    {
        hirda->RxXferCount = 0U;

        /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
        CLEAR_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_EIE);

        /* Disable the DMA transfer for the receiver request by setting the DMAR bit
           in the IRDA CR3 register */
        CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR);

        /* At end of Rx process, restore hirda->RxState to Ready */
        hirda->RxState = HAL_IRDA_STATE_READY;
    }

    HAL_IRDA_RxCpltCallback(hirda);
}

static void IRDA_DMAReceiveHalfCplt(DMA_HandleTypeDef *hdma)
{
    IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;

    HAL_IRDA_RxHalfCpltCallback(hirda);
}

static void IRDA_DMAError(DMA_HandleTypeDef *hdma)
{
    IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;

    hirda->RxXferCount = 0U;
    hirda->TxXferCount = 0U;

    /* Stop IRDA DMA Tx request if ongoing */
    if (  (hirda->gState == HAL_IRDA_STATE_BUSY_TX)
            &&(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT)) )
    {
        IRDA_EndTxTransfer(hirda);
    }

    /* Stop IRDA DMA Rx request if ongoing */
    if (  (hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
            &&(HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR)) )
    {
        IRDA_EndRxTransfer(hirda);
    }

    hirda->ErrorCode |= HAL_IRDA_ERROR_DMA;

    HAL_IRDA_ErrorCallback(hirda);
}

#endif /* HAL_IRDA_MODULE_ENABLED */

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/