STM32F769IDiscovery  1.00
uDANTE Audio Networking with STM32F7 DISCO board
otm8009a.c
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1 
39 /* Includes ------------------------------------------------------------------*/
40 #include "otm8009a.h"
41 
56 /* Private types -------------------------------------------------------------*/
57 /* Private variables ---------------------------------------------------------*/
58 /* Private constants ---------------------------------------------------------*/
63 /*
64  * @brief Constant tables of register settings used to transmit DSI
65  * command packets as power up initialization sequence of the KoD LCD (OTM8009A LCD Driver)
66  */
67 const uint8_t lcdRegData1[] = {0x80,0x09,0x01,0xFF};
68 const uint8_t lcdRegData2[] = {0x80,0x09,0xFF};
69 const uint8_t lcdRegData3[] = {0x00,0x09,0x0F,0x0E,0x07,0x10,0x0B,0x0A,0x04,0x07,0x0B,0x08,0x0F,0x10,0x0A,0x01,0xE1};
70 const uint8_t lcdRegData4[] = {0x00,0x09,0x0F,0x0E,0x07,0x10,0x0B,0x0A,0x04,0x07,0x0B,0x08,0x0F,0x10,0x0A,0x01,0xE2};
71 const uint8_t lcdRegData5[] = {0x79,0x79,0xD8};
72 const uint8_t lcdRegData6[] = {0x00,0x01,0xB3};
73 const uint8_t lcdRegData7[] = {0x85,0x01,0x00,0x84,0x01,0x00,0xCE};
74 const uint8_t lcdRegData8[] = {0x18,0x04,0x03,0x39,0x00,0x00,0x00,0x18,0x03,0x03,0x3A,0x00,0x00,0x00,0xCE};
75 const uint8_t lcdRegData9[] = {0x18,0x02,0x03,0x3B,0x00,0x00,0x00,0x18,0x01,0x03,0x3C,0x00,0x00,0x00,0xCE};
76 const uint8_t lcdRegData10[] = {0x01,0x01,0x20,0x20,0x00,0x00,0x01,0x02,0x00,0x00,0xCF};
77 const uint8_t lcdRegData11[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
78 const uint8_t lcdRegData12[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
79 const uint8_t lcdRegData13[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
80 const uint8_t lcdRegData14[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
81 const uint8_t lcdRegData15[] = {0x00,0x04,0x04,0x04,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
82 const uint8_t lcdRegData16[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x04,0x04,0x04,0x00,0x00,0x00,0x00,0xCB};
83 const uint8_t lcdRegData17[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCB};
84 const uint8_t lcdRegData18[] = {0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xCB};
85 const uint8_t lcdRegData19[] = {0x00,0x26,0x09,0x0B,0x01,0x25,0x00,0x00,0x00,0x00,0xCC};
86 const uint8_t lcdRegData20[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x26,0x0A,0x0C,0x02,0xCC};
87 const uint8_t lcdRegData21[] = {0x25,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCC};
88 const uint8_t lcdRegData22[] = {0x00,0x25,0x0C,0x0A,0x02,0x26,0x00,0x00,0x00,0x00,0xCC};
89 const uint8_t lcdRegData23[] = {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x25,0x0B,0x09,0x01,0xCC};
90 const uint8_t lcdRegData24[] = {0x26,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xCC};
91 const uint8_t lcdRegData25[] = {0xFF,0xFF,0xFF,0xFF};
92 /*
93  * CASET value (Column Address Set) : X direction LCD GRAM boundaries
94  * depending on LCD orientation mode and PASET value (Page Address Set) : Y direction
95  * LCD GRAM boundaries depending on LCD orientation mode
96  * XS[15:0] = 0x000 = 0, XE[15:0] = 0x31F = 799 for landscape mode : apply to CASET
97  * YS[15:0] = 0x000 = 0, YE[15:0] = 0x31F = 799 for portrait mode : : apply to PASET
98  */
99 const uint8_t lcdRegData27[] = {0x00, 0x00, 0x03, 0x1F, OTM8009A_CMD_CASET};
100 /*
101  * XS[15:0] = 0x000 = 0, XE[15:0] = 0x1DF = 479 for portrait mode : apply to CASET
102  * YS[15:0] = 0x000 = 0, YE[15:0] = 0x1DF = 479 for landscape mode : apply to PASET
103  */
104 const uint8_t lcdRegData28[] = {0x00, 0x00, 0x01, 0xDF, OTM8009A_CMD_PASET};
105 
106 
107 const uint8_t ShortRegData1[] = {OTM8009A_CMD_NOP, 0x00};
108 const uint8_t ShortRegData2[] = {OTM8009A_CMD_NOP, 0x80};
109 const uint8_t ShortRegData3[] = {0xC4, 0x30};
110 const uint8_t ShortRegData4[] = {OTM8009A_CMD_NOP, 0x8A};
111 const uint8_t ShortRegData5[] = {0xC4, 0x40};
112 const uint8_t ShortRegData6[] = {OTM8009A_CMD_NOP, 0xB1};
113 const uint8_t ShortRegData7[] = {0xC5, 0xA9};
114 const uint8_t ShortRegData8[] = {OTM8009A_CMD_NOP, 0x91};
115 const uint8_t ShortRegData9[] = {0xC5, 0x34};
116 const uint8_t ShortRegData10[] = {OTM8009A_CMD_NOP, 0xB4};
117 const uint8_t ShortRegData11[] = {0xC0, 0x50};
118 const uint8_t ShortRegData12[] = {0xD9, 0x4E};
119 const uint8_t ShortRegData13[] = {OTM8009A_CMD_NOP, 0x81};
120 const uint8_t ShortRegData14[] = {0xC1, 0x66};
121 const uint8_t ShortRegData15[] = {OTM8009A_CMD_NOP, 0xA1};
122 const uint8_t ShortRegData16[] = {0xC1, 0x08};
123 const uint8_t ShortRegData17[] = {OTM8009A_CMD_NOP, 0x92};
124 const uint8_t ShortRegData18[] = {0xC5, 0x01};
125 const uint8_t ShortRegData19[] = {OTM8009A_CMD_NOP, 0x95};
126 const uint8_t ShortRegData20[] = {OTM8009A_CMD_NOP, 0x94};
127 const uint8_t ShortRegData21[] = {0xC5, 0x33};
128 const uint8_t ShortRegData22[] = {OTM8009A_CMD_NOP, 0xA3};
129 const uint8_t ShortRegData23[] = {0xC0, 0x1B};
130 const uint8_t ShortRegData24[] = {OTM8009A_CMD_NOP, 0x82};
131 const uint8_t ShortRegData25[] = {0xC5, 0x83};
132 const uint8_t ShortRegData26[] = {0xC4, 0x83};
133 const uint8_t ShortRegData27[] = {0xC1, 0x0E};
134 const uint8_t ShortRegData28[] = {OTM8009A_CMD_NOP, 0xA6};
135 const uint8_t ShortRegData29[] = {OTM8009A_CMD_NOP, 0xA0};
136 const uint8_t ShortRegData30[] = {OTM8009A_CMD_NOP, 0xB0};
137 const uint8_t ShortRegData31[] = {OTM8009A_CMD_NOP, 0xC0};
138 const uint8_t ShortRegData32[] = {OTM8009A_CMD_NOP, 0xD0};
139 const uint8_t ShortRegData33[] = {OTM8009A_CMD_NOP, 0x90};
140 const uint8_t ShortRegData34[] = {OTM8009A_CMD_NOP, 0xE0};
141 const uint8_t ShortRegData35[] = {OTM8009A_CMD_NOP, 0xF0};
142 const uint8_t ShortRegData36[] = {OTM8009A_CMD_SLPOUT, 0x00};
146 const uint8_t ShortRegData40[] = {OTM8009A_CMD_WRDISBV, 0x7F};
147 const uint8_t ShortRegData41[] = {OTM8009A_CMD_WRCTRLD, 0x2C};
148 const uint8_t ShortRegData42[] = {OTM8009A_CMD_WRCABC, 0x02};
149 const uint8_t ShortRegData43[] = {OTM8009A_CMD_WRCABCMB, 0xFF};
150 const uint8_t ShortRegData44[] = {OTM8009A_CMD_DISPON, 0x00};
151 const uint8_t ShortRegData45[] = {OTM8009A_CMD_RAMWR, 0x00};
152 const uint8_t ShortRegData46[] = {0xCF, 0x00};
153 const uint8_t ShortRegData47[] = {0xC5, 0x66};
154 const uint8_t ShortRegData48[] = {OTM8009A_CMD_NOP, 0xB6};
155 const uint8_t ShortRegData49[] = {0xF5, 0x06};
156 
161 /* Private macros ------------------------------------------------------------*/
162 /* Private functions ---------------------------------------------------------*/
171 /* Exported functions ---------------------------------------------------------*/
180 __weak void DSI_IO_WriteCmd(uint32_t NbrParams, uint8_t *pParams)
181 {
182  /* NOTE : This function Should not be modified, when it is needed,
183  the DSI_IO_WriteCmd could be implemented in the user file
184  */
185 }
186 
194 uint8_t OTM8009A_Init(uint32_t ColorCoding, uint32_t orientation)
195 {
196  /* Enable CMD2 to access vendor specific commands */
197  /* Enter in command 2 mode and set EXTC to enable address shift function (0x00) */
198  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
199  DSI_IO_WriteCmd( 3, (uint8_t *)lcdRegData1);
200 
201  /* Enter ORISE Command 2 */
202  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2); /* Shift address to 0x80 */
203  DSI_IO_WriteCmd( 2, (uint8_t *)lcdRegData2);
204 
206  /* SD_PCH_CTRL - 0xC480h - 129th parameter - Default 0x00 */
207  /* Set SD_PT */
208  /* -> Source output level during porch and non-display area to GND */
209  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2);
210  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData3);
211  OTM8009A_IO_Delay(10);
212  /* Not documented */
213  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData4);
214  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData5);
215  OTM8009A_IO_Delay(10);
217 
218  /* PWR_CTRL4 - 0xC4B0h - 178th parameter - Default 0xA8 */
219  /* Set gvdd_en_test */
220  /* -> enable GVDD test mode !!! */
221  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData6);
222  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData7);
223 
224  /* PWR_CTRL2 - 0xC590h - 146th parameter - Default 0x79 */
225  /* Set pump 4 vgh voltage */
226  /* -> from 15.0v down to 13.0v */
227  /* Set pump 5 vgh voltage */
228  /* -> from -12.0v downto -9.0v */
229  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData8);
230  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData9);
231 
232  /* P_DRV_M - 0xC0B4h - 181th parameter - Default 0x00 */
233  /* -> Column inversion */
234  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData10);
235  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData11);
236 
237  /* VCOMDC - 0xD900h - 1st parameter - Default 0x39h */
238  /* VCOM Voltage settings */
239  /* -> from -1.0000v downto -1.2625v */
240  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
241  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData12);
242 
243  /* Oscillator adjustment for Idle/Normal mode (LPDT only) set to 65Hz (default is 60Hz) */
244  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData13);
245  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData14);
246 
247  /* Video mode internal */
248  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData15);
249  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData16);
250 
251  /* PWR_CTRL2 - 0xC590h - 147h parameter - Default 0x00 */
252  /* Set pump 4&5 x6 */
253  /* -> ONLY VALID when PUMP4_EN_ASDM_HV = "0" */
254  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData17);
255  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData18);
256 
257  /* PWR_CTRL2 - 0xC590h - 150th parameter - Default 0x33h */
258  /* Change pump4 clock ratio */
259  /* -> from 1 line to 1/2 line */
260  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData19);
261  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData9);
262 
263  /* GVDD/NGVDD settings */
264  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
265  DSI_IO_WriteCmd( 2, (uint8_t *)lcdRegData5);
266 
267  /* PWR_CTRL2 - 0xC590h - 149th parameter - Default 0x33h */
268  /* Rewrite the default value ! */
269  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData20);
270  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData21);
271 
272  /* Panel display timing Setting 3 */
273  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData22);
274  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData23);
275 
276  /* Power control 1 */
277  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData24);
278  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData25);
279 
280  /* Source driver precharge */
281  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData13);
282  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData26);
283 
284  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData15);
285  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData27);
286 
287  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData28);
288  DSI_IO_WriteCmd( 2, (uint8_t *)lcdRegData6);
289 
290  /* GOAVST */
291  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2);
292  DSI_IO_WriteCmd( 6, (uint8_t *)lcdRegData7);
293 
294  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData29);
295  DSI_IO_WriteCmd( 14, (uint8_t *)lcdRegData8);
296 
297  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData30);
298  DSI_IO_WriteCmd( 14, (uint8_t *)lcdRegData9);
299 
300  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData31);
301  DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData10);
302 
303  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData32);
304  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData46);
305 
306  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2);
307  DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData11);
308 
309  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData33);
310  DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData12);
311 
312  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData29);
313  DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData13);
314 
315  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData30);
316  DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData14);
317 
318  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData31);
319  DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData15);
320 
321  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData32);
322  DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData16);
323 
324  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData34);
325  DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData17);
326 
327  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData35);
328  DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData18);
329 
330  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData2);
331  DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData19);
332 
333  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData33);
334  DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData20);
335 
336  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData29);
337  DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData21);
338 
339  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData30);
340  DSI_IO_WriteCmd( 10, (uint8_t *)lcdRegData22);
341 
342  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData31);
343  DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData23);
344 
345  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData32);
346  DSI_IO_WriteCmd( 15, (uint8_t *)lcdRegData24);
347 
349  /* PWR_CTRL1 - 0xc580h - 130th parameter - default 0x00 */
350  /* Pump 1 min and max DM */
351  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData13);
352  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData47);
353  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData48);
354  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData49);
356 
357  /* Exit CMD2 mode */
358  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
359  DSI_IO_WriteCmd( 3, (uint8_t *)lcdRegData25);
360 
361  /*************************************************************************** */
362  /* Standard DCS Initialization TO KEEP CAN BE DONE IN HSDT */
363  /*************************************************************************** */
364 
365  /* NOP - goes back to DCS std command ? */
366  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
367 
368  /* Gamma correction 2.2+ table (HSDT possible) */
369  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
370  DSI_IO_WriteCmd( 16, (uint8_t *)lcdRegData3);
371 
372  /* Gamma correction 2.2- table (HSDT possible) */
373  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
374  DSI_IO_WriteCmd( 16, (uint8_t *)lcdRegData4);
375 
376  /* Send Sleep Out command to display : no parameter */
377  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData36);
378 
379  /* Wait for sleep out exit */
380  OTM8009A_IO_Delay(120);
381 
382  switch(ColorCoding)
383  {
385  /* Set Pixel color format to RGB565 */
386  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData37);
387  break;
389  /* Set Pixel color format to RGB888 */
390  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData38);
391  break;
392  default :
393  break;
394  }
395 
396  /* Send command to configure display in landscape orientation mode. By default
397  the orientation mode is portrait */
398  if(orientation == OTM8009A_ORIENTATION_LANDSCAPE)
399  {
400  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData39);
401  DSI_IO_WriteCmd( 4, (uint8_t *)lcdRegData27);
402  DSI_IO_WriteCmd( 4, (uint8_t *)lcdRegData28);
403  }
404 
406  /* Note : defaut is 0 (lowest Brightness), 0xFF is highest Brightness, try 0x7F : intermediate value */
407  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData40);
408 
409  /* defaut is 0, try 0x2C - Brightness Control Block, Display Dimming & BackLight on */
410  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData41);
411 
412  /* defaut is 0, try 0x02 - image Content based Adaptive Brightness [Still Picture] */
413  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData42);
414 
415  /* defaut is 0 (lowest Brightness), 0xFF is highest Brightness */
416  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData43);
417 
420  /* Send Command Display On */
421  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData44);
422 
423  /* NOP command */
424  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData1);
425 
426  /* Send Command GRAM memory write (no parameters) : this initiates frame write via other DSI commands sent by */
427  /* DSI host from LTDC incoming pixels in video mode */
428  DSI_IO_WriteCmd(0, (uint8_t *)ShortRegData45);
429 
430  return 0;
431 }
432 
449 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
const uint8_t ShortRegData30[]
Definition: otm8009a.c:136
const uint8_t ShortRegData42[]
Definition: otm8009a.c:148
#define OTM8009A_CMD_DISPON
Definition: otm8009a.h:132
const uint8_t ShortRegData20[]
Definition: otm8009a.c:126
const uint8_t ShortRegData32[]
Definition: otm8009a.c:138
const uint8_t ShortRegData31[]
Definition: otm8009a.c:137
const uint8_t ShortRegData45[]
Definition: otm8009a.c:151
const uint8_t lcdRegData8[]
Definition: otm8009a.c:74
const uint8_t lcdRegData12[]
Definition: otm8009a.c:78
const uint8_t lcdRegData16[]
Definition: otm8009a.c:82
const uint8_t lcdRegData7[]
Definition: otm8009a.c:73
#define OTM8009A_COLMOD_RGB565
Definition: otm8009a.h:162
const uint8_t lcdRegData18[]
Definition: otm8009a.c:84
const uint8_t ShortRegData11[]
Definition: otm8009a.c:117
const uint8_t ShortRegData36[]
Definition: otm8009a.c:142
const uint8_t ShortRegData27[]
Definition: otm8009a.c:133
const uint8_t ShortRegData18[]
Definition: otm8009a.c:124
const uint8_t lcdRegData1[]
Definition: otm8009a.c:67
#define OTM8009A_CMD_RAMWR
Definition: otm8009a.h:137
#define OTM8009A_FORMAT_RGB888
Possible values of pixel data format (ie color coding) transmitted on DSI Data lane in DSI packets...
Definition: otm8009a.h:83
const uint8_t ShortRegData35[]
Definition: otm8009a.c:141
const uint8_t lcdRegData5[]
Definition: otm8009a.c:71
const uint8_t ShortRegData40[]
Definition: otm8009a.c:146
const uint8_t ShortRegData46[]
Definition: otm8009a.c:152
const uint8_t ShortRegData4[]
Definition: otm8009a.c:110
const uint8_t lcdRegData24[]
Definition: otm8009a.c:90
const uint8_t ShortRegData43[]
Definition: otm8009a.c:149
const uint8_t ShortRegData5[]
Definition: otm8009a.c:111
#define OTM8009A_CMD_WRCABC
Definition: otm8009a.h:174
#define OTM8009A_CMD_PASET
Definition: otm8009a.h:135
const uint8_t lcdRegData14[]
Definition: otm8009a.c:80
const uint8_t lcdRegData19[]
Definition: otm8009a.c:85
const uint8_t lcdRegData10[]
Definition: otm8009a.c:76
const uint8_t ShortRegData9[]
Definition: otm8009a.c:115
const uint8_t lcdRegData9[]
Definition: otm8009a.c:75
const uint8_t ShortRegData7[]
Definition: otm8009a.c:113
const uint8_t ShortRegData39[]
Definition: otm8009a.c:145
const uint8_t ShortRegData41[]
Definition: otm8009a.c:147
const uint8_t ShortRegData19[]
Definition: otm8009a.c:125
const uint8_t lcdRegData22[]
Definition: otm8009a.c:88
#define OTM8009A_CMD_MADCTR
Definition: otm8009a.h:150
const uint8_t ShortRegData47[]
Definition: otm8009a.c:153
const uint8_t lcdRegData15[]
Definition: otm8009a.c:81
#define OTM8009A_MADCTR_MODE_LANDSCAPE
Definition: otm8009a.h:154
const uint8_t ShortRegData23[]
Definition: otm8009a.c:129
const uint8_t ShortRegData13[]
Definition: otm8009a.c:119
const uint8_t ShortRegData37[]
Definition: otm8009a.c:143
#define OTM8009A_CMD_WRCTRLD
Definition: otm8009a.h:173
const uint8_t lcdRegData6[]
Definition: otm8009a.c:72
const uint8_t ShortRegData21[]
Definition: otm8009a.c:127
const uint8_t lcdRegData11[]
Definition: otm8009a.c:77
const uint8_t lcdRegData21[]
Definition: otm8009a.c:87
const uint8_t lcdRegData3[]
Definition: otm8009a.c:69
const uint8_t ShortRegData33[]
Definition: otm8009a.c:139
const uint8_t lcdRegData17[]
Definition: otm8009a.c:83
const uint8_t ShortRegData34[]
Definition: otm8009a.c:140
const uint8_t lcdRegData27[]
Definition: otm8009a.c:99
const uint8_t ShortRegData24[]
Definition: otm8009a.c:130
const uint8_t ShortRegData1[]
Definition: otm8009a.c:107
This file contains all the constants parameters for the OTM8009A which is the LCD Driver for KoD KM-0...
const uint8_t ShortRegData6[]
Definition: otm8009a.c:112
const uint8_t lcdRegData2[]
Definition: otm8009a.c:68
const uint8_t ShortRegData2[]
Definition: otm8009a.c:108
#define OTM8009A_ORIENTATION_LANDSCAPE
Definition: otm8009a.h:77
const uint8_t lcdRegData13[]
Definition: otm8009a.c:79
const uint8_t ShortRegData48[]
Definition: otm8009a.c:154
#define OTM8009A_CMD_SLPOUT
Definition: otm8009a.h:128
const uint8_t ShortRegData10[]
Definition: otm8009a.c:116
#define OTM8009A_FORMAT_RBG565
Definition: otm8009a.h:84
const uint8_t ShortRegData17[]
Definition: otm8009a.c:123
void OTM8009A_IO_Delay(uint32_t Delay)
OTM8009A delay.
const uint8_t ShortRegData15[]
Definition: otm8009a.c:121
const uint8_t ShortRegData3[]
Definition: otm8009a.c:109
const uint8_t lcdRegData20[]
Definition: otm8009a.c:86
const uint8_t ShortRegData28[]
Definition: otm8009a.c:134
__weak void DSI_IO_WriteCmd(uint32_t NbrParams, uint8_t *pParams)
DSI IO write short/long command.
Definition: otm8009a.c:180
const uint8_t lcdRegData4[]
Definition: otm8009a.c:70
const uint8_t ShortRegData8[]
Definition: otm8009a.c:114
const uint8_t ShortRegData26[]
Definition: otm8009a.c:132
#define OTM8009A_CMD_WRCABCMB
Definition: otm8009a.h:175
#define OTM8009A_CMD_COLMOD
Definition: otm8009a.h:159
const uint8_t ShortRegData44[]
Definition: otm8009a.c:150
const uint8_t ShortRegData25[]
Definition: otm8009a.c:131
const uint8_t lcdRegData23[]
Definition: otm8009a.c:89
#define OTM8009A_CMD_NOP
Definition: otm8009a.h:123
const uint8_t ShortRegData14[]
Definition: otm8009a.c:120
const uint8_t ShortRegData22[]
Definition: otm8009a.c:128
const uint8_t ShortRegData12[]
Definition: otm8009a.c:118
const uint8_t lcdRegData25[]
Definition: otm8009a.c:91
#define OTM8009A_COLMOD_RGB888
Definition: otm8009a.h:163
uint8_t OTM8009A_Init(uint32_t ColorCoding, uint32_t orientation)
Initializes the LCD KoD display part by communication in DSI mode in Video Mode with IC Display Drive...
Definition: otm8009a.c:194
#define OTM8009A_CMD_CASET
Definition: otm8009a.h:134
const uint8_t ShortRegData29[]
Definition: otm8009a.c:135
const uint8_t ShortRegData49[]
Definition: otm8009a.c:155
const uint8_t ShortRegData16[]
Definition: otm8009a.c:122
const uint8_t lcdRegData28[]
Definition: otm8009a.c:104
#define OTM8009A_CMD_WRDISBV
Definition: otm8009a.h:172
const uint8_t ShortRegData38[]
Definition: otm8009a.c:144