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STM32F769IDiscovery
1.00
uDANTE Audio Networking with STM32F7 DISCO board
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STM32F769IDiscovery
1.00
uDANTE Audio Networking with STM32F7 DISCO board
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Macros | |
| #define | NAND_DEVICE ((uint32_t)0x80000000U) |
| #define | NAND_WRITE_TIMEOUT ((uint32_t)0x01000000U) |
| #define | CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */ |
| #define | ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */ |
| #define | NAND_CMD_AREA_A ((uint8_t)0x00U) |
| #define | NAND_CMD_AREA_B ((uint8_t)0x01U) |
| #define | NAND_CMD_AREA_C ((uint8_t)0x50U) |
| #define | NAND_CMD_AREA_TRUE1 ((uint8_t)0x30U) |
| #define | NAND_CMD_WRITE0 ((uint8_t)0x80U) |
| #define | NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10U) |
| #define | NAND_CMD_ERASE0 ((uint8_t)0x60U) |
| #define | NAND_CMD_ERASE1 ((uint8_t)0xD0U) |
| #define | NAND_CMD_READID ((uint8_t)0x90U) |
| #define | NAND_CMD_STATUS ((uint8_t)0x70U) |
| #define | NAND_CMD_LOCK_STATUS ((uint8_t)0x7AU) |
| #define | NAND_CMD_RESET ((uint8_t)0xFFU) |
| #define | NAND_VALID_ADDRESS ((uint32_t)0x00000100U) |
| #define | NAND_INVALID_ADDRESS ((uint32_t)0x00000200U) |
| #define | NAND_TIMEOUT_ERROR ((uint32_t)0x00000400U) |
| #define | NAND_BUSY ((uint32_t)0x00000000U) |
| #define | NAND_ERROR ((uint32_t)0x00000001U) |
| #define | NAND_READY ((uint32_t)0x00000040U) |
| #define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */ |
Definition at line 235 of file stm32f7xx_hal_nand.h.
| #define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */ |
Definition at line 234 of file stm32f7xx_hal_nand.h.
| #define NAND_BUSY ((uint32_t)0x00000000U) |
Definition at line 255 of file stm32f7xx_hal_nand.h.
| #define NAND_CMD_AREA_A ((uint8_t)0x00U) |
Definition at line 237 of file stm32f7xx_hal_nand.h.
| #define NAND_CMD_AREA_B ((uint8_t)0x01U) |
Definition at line 238 of file stm32f7xx_hal_nand.h.
| #define NAND_CMD_AREA_C ((uint8_t)0x50U) |
Definition at line 239 of file stm32f7xx_hal_nand.h.
| #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30U) |
Definition at line 240 of file stm32f7xx_hal_nand.h.
| #define NAND_CMD_ERASE0 ((uint8_t)0x60U) |
Definition at line 244 of file stm32f7xx_hal_nand.h.
| #define NAND_CMD_ERASE1 ((uint8_t)0xD0U) |
Definition at line 245 of file stm32f7xx_hal_nand.h.
| #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7AU) |
Definition at line 248 of file stm32f7xx_hal_nand.h.
| #define NAND_CMD_READID ((uint8_t)0x90U) |
Definition at line 246 of file stm32f7xx_hal_nand.h.
| #define NAND_CMD_RESET ((uint8_t)0xFFU) |
Definition at line 249 of file stm32f7xx_hal_nand.h.
| #define NAND_CMD_STATUS ((uint8_t)0x70U) |
Definition at line 247 of file stm32f7xx_hal_nand.h.
| #define NAND_CMD_WRITE0 ((uint8_t)0x80U) |
Definition at line 242 of file stm32f7xx_hal_nand.h.
| #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10U) |
Definition at line 243 of file stm32f7xx_hal_nand.h.
| #define NAND_DEVICE ((uint32_t)0x80000000U) |
Definition at line 231 of file stm32f7xx_hal_nand.h.
| #define NAND_ERROR ((uint32_t)0x00000001U) |
Definition at line 256 of file stm32f7xx_hal_nand.h.
| #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200U) |
Definition at line 253 of file stm32f7xx_hal_nand.h.
| #define NAND_READY ((uint32_t)0x00000040U) |
Definition at line 257 of file stm32f7xx_hal_nand.h.
| #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400U) |
Definition at line 254 of file stm32f7xx_hal_nand.h.
| #define NAND_VALID_ADDRESS ((uint32_t)0x00000100U) |
Definition at line 252 of file stm32f7xx_hal_nand.h.
| #define NAND_WRITE_TIMEOUT ((uint32_t)0x01000000U) |
Definition at line 232 of file stm32f7xx_hal_nand.h.
1.8.11
