N25Q128A_Exported_Constants

Macros
#define	N25Q128A_FLASH_SIZE   0x1000000 /* 128 MBits => 16MBytes */
	N25Q128A Configuration. More...
#define	N25Q128A_SECTOR_SIZE   0x10000 /* 256 sectors of 64KBytes */
#define	N25Q128A_SUBSECTOR_SIZE   0x1000 /* 4096 subsectors of 4kBytes */
#define	N25Q128A_PAGE_SIZE   0x100 /* 65536 pages of 256 bytes */
#define	N25Q128A_DUMMY_CYCLES_READ   8
#define	N25Q128A_DUMMY_CYCLES_READ_QUAD   10
#define	N25Q128A_BULK_ERASE_MAX_TIME   250000
#define	N25Q128A_SECTOR_ERASE_MAX_TIME   3000
#define	N25Q128A_SUBSECTOR_ERASE_MAX_TIME   800
#define	RESET_ENABLE_CMD   0x66
	N25Q128A Commands. More...
#define	RESET_MEMORY_CMD   0x99
#define	READ_ID_CMD   0x9E
#define	READ_ID_CMD2   0x9F
#define	MULTIPLE_IO_READ_ID_CMD   0xAF
#define	READ_SERIAL_FLASH_DISCO_PARAM_CMD   0x5A
#define	READ_CMD   0x03
#define	FAST_READ_CMD   0x0B
#define	DUAL_OUT_FAST_READ_CMD   0x3B
#define	DUAL_INOUT_FAST_READ_CMD   0xBB
#define	QUAD_OUT_FAST_READ_CMD   0x6B
#define	QUAD_INOUT_FAST_READ_CMD   0xEB
#define	WRITE_ENABLE_CMD   0x06
#define	WRITE_DISABLE_CMD   0x04
#define	READ_STATUS_REG_CMD   0x05
#define	WRITE_STATUS_REG_CMD   0x01
#define	READ_LOCK_REG_CMD   0xE8
#define	WRITE_LOCK_REG_CMD   0xE5
#define	READ_FLAG_STATUS_REG_CMD   0x70
#define	CLEAR_FLAG_STATUS_REG_CMD   0x50
#define	READ_NONVOL_CFG_REG_CMD   0xB5
#define	WRITE_NONVOL_CFG_REG_CMD   0xB1
#define	READ_VOL_CFG_REG_CMD   0x85
#define	WRITE_VOL_CFG_REG_CMD   0x81
#define	READ_ENHANCED_VOL_CFG_REG_CMD   0x65
#define	WRITE_ENHANCED_VOL_CFG_REG_CMD   0x61
#define	PAGE_PROG_CMD   0x02
#define	DUAL_IN_FAST_PROG_CMD   0xA2
#define	EXT_DUAL_IN_FAST_PROG_CMD   0xD2
#define	QUAD_IN_FAST_PROG_CMD   0x32
#define	EXT_QUAD_IN_FAST_PROG_CMD   0x12
#define	SUBSECTOR_ERASE_CMD   0x20
#define	SECTOR_ERASE_CMD   0xD8
#define	BULK_ERASE_CMD   0xC7
#define	PROG_ERASE_RESUME_CMD   0x7A
#define	PROG_ERASE_SUSPEND_CMD   0x75
#define	READ_OTP_ARRAY_CMD   0x4B
#define	PROG_OTP_ARRAY_CMD   0x42
#define	N25Q128A_SR_WIP   ((uint8_t)0x01)
	N25Q128A Registers. More...
#define	N25Q128A_SR_WREN   ((uint8_t)0x02)
#define	N25Q128A_SR_BLOCKPR   ((uint8_t)0x5C)
#define	N25Q128A_SR_PRBOTTOM   ((uint8_t)0x20)
#define	N25Q128A_SR_SRWREN   ((uint8_t)0x80)
#define	N25Q128A_NVCR_LOCK   ((uint16_t)0x0001)
#define	N25Q128A_NVCR_DUAL   ((uint16_t)0x0004)
#define	N25Q128A_NVCR_QUAB   ((uint16_t)0x0008)
#define	N25Q128A_NVCR_RH   ((uint16_t)0x0010)
#define	N25Q128A_NVCR_ODS   ((uint16_t)0x01C0)
#define	N25Q128A_NVCR_XIP   ((uint16_t)0x0E00)
#define	N25Q128A_NVCR_NB_DUMMY   ((uint16_t)0xF000)
#define	N25Q128A_VCR_WRAP   ((uint8_t)0x03)
#define	N25Q128A_VCR_XIP   ((uint8_t)0x08)
#define	N25Q128A_VCR_NB_DUMMY   ((uint8_t)0xF0)
#define	N25Q128A_EVCR_ODS   ((uint8_t)0x07)
#define	N25Q128A_EVCR_VPPA   ((uint8_t)0x08)
#define	N25Q128A_EVCR_RH   ((uint8_t)0x10)
#define	N25Q128A_EVCR_DUAL   ((uint8_t)0x40)
#define	N25Q128A_EVCR_QUAD   ((uint8_t)0x80)
#define	N25Q128A_FSR_PRERR   ((uint8_t)0x02)
#define	N25Q128A_FSR_PGSUS   ((uint8_t)0x04)
#define	N25Q128A_FSR_VPPERR   ((uint8_t)0x08)
#define	N25Q128A_FSR_PGERR   ((uint8_t)0x10)
#define	N25Q128A_FSR_ERERR   ((uint8_t)0x20)
#define	N25Q128A_FSR_ERSUS   ((uint8_t)0x40)
#define	N25Q128A_FSR_READY   ((uint8_t)0x80)

Detailed Description

Macro Definition Documentation

#define BULK_ERASE_CMD   0xC7

Definition at line 141 of file n25q128a.h.

#define CLEAR_FLAG_STATUS_REG_CMD   0x50

Definition at line 120 of file n25q128a.h.

#define DUAL_IN_FAST_PROG_CMD   0xA2

Definition at line 133 of file n25q128a.h.

#define DUAL_INOUT_FAST_READ_CMD   0xBB

Definition at line 104 of file n25q128a.h.

#define DUAL_OUT_FAST_READ_CMD   0x3B

Definition at line 103 of file n25q128a.h.

#define EXT_DUAL_IN_FAST_PROG_CMD   0xD2

Definition at line 134 of file n25q128a.h.

#define EXT_QUAD_IN_FAST_PROG_CMD   0x12

Definition at line 136 of file n25q128a.h.

#define FAST_READ_CMD   0x0B

Definition at line 102 of file n25q128a.h.

#define MULTIPLE_IO_READ_ID_CMD   0xAF

Definition at line 97 of file n25q128a.h.

#define N25Q128A_BULK_ERASE_MAX_TIME   250000

Definition at line 83 of file n25q128a.h.

#define N25Q128A_DUMMY_CYCLES_READ   8

Definition at line 80 of file n25q128a.h.

#define N25Q128A_DUMMY_CYCLES_READ_QUAD   10

Definition at line 81 of file n25q128a.h.

#define N25Q128A_EVCR_DUAL   ((uint8_t)0x40)

Dual I/O protocol

Definition at line 178 of file n25q128a.h.

#define N25Q128A_EVCR_ODS   ((uint8_t)0x07)

Output driver strength

Definition at line 175 of file n25q128a.h.

#define N25Q128A_EVCR_QUAD   ((uint8_t)0x80)

Quad I/O protocol

Definition at line 179 of file n25q128a.h.

#define N25Q128A_EVCR_RH   ((uint8_t)0x10)

Reset/hold

Definition at line 177 of file n25q128a.h.

#define N25Q128A_EVCR_VPPA   ((uint8_t)0x08)

Vpp accelerator

Definition at line 176 of file n25q128a.h.

#define N25Q128A_FLASH_SIZE   0x1000000 /* 128 MBits => 16MBytes */

N25Q128A Configuration.

Definition at line 75 of file n25q128a.h.

#define N25Q128A_FSR_ERERR   ((uint8_t)0x20)

Erase error

Definition at line 186 of file n25q128a.h.

#define N25Q128A_FSR_ERSUS   ((uint8_t)0x40)

Erase operation suspended

Definition at line 187 of file n25q128a.h.

#define N25Q128A_FSR_PGERR   ((uint8_t)0x10)

Program error

Definition at line 185 of file n25q128a.h.

#define N25Q128A_FSR_PGSUS   ((uint8_t)0x04)

Program operation suspended

Definition at line 183 of file n25q128a.h.

#define N25Q128A_FSR_PRERR   ((uint8_t)0x02)

Protection error

Definition at line 182 of file n25q128a.h.

#define N25Q128A_FSR_READY   ((uint8_t)0x80)

Ready or command in progress

Definition at line 188 of file n25q128a.h.

#define N25Q128A_FSR_VPPERR   ((uint8_t)0x08)

Invalid voltage during program or erase

Definition at line 184 of file n25q128a.h.

#define N25Q128A_NVCR_DUAL   ((uint16_t)0x0004)

Dual I/O protocol

Definition at line 162 of file n25q128a.h.

#define N25Q128A_NVCR_LOCK   ((uint16_t)0x0001)

Lock nonvolatile configuration register

Definition at line 161 of file n25q128a.h.

#define N25Q128A_NVCR_NB_DUMMY   ((uint16_t)0xF000)

Number of dummy clock cycles

Definition at line 167 of file n25q128a.h.

#define N25Q128A_NVCR_ODS   ((uint16_t)0x01C0)

Output driver strength

Definition at line 165 of file n25q128a.h.

#define N25Q128A_NVCR_QUAB   ((uint16_t)0x0008)

Quad I/O protocol

Definition at line 163 of file n25q128a.h.

#define N25Q128A_NVCR_RH   ((uint16_t)0x0010)

Reset/hold

Definition at line 164 of file n25q128a.h.

#define N25Q128A_NVCR_XIP   ((uint16_t)0x0E00)

XIP mode at power-on reset

Definition at line 166 of file n25q128a.h.

#define N25Q128A_PAGE_SIZE   0x100 /* 65536 pages of 256 bytes */

Definition at line 78 of file n25q128a.h.

#define N25Q128A_SECTOR_ERASE_MAX_TIME   3000

Definition at line 84 of file n25q128a.h.

#define N25Q128A_SECTOR_SIZE   0x10000 /* 256 sectors of 64KBytes */

Definition at line 76 of file n25q128a.h.

#define N25Q128A_SR_BLOCKPR   ((uint8_t)0x5C)

Block protected against program and erase operations

Definition at line 156 of file n25q128a.h.

#define N25Q128A_SR_PRBOTTOM   ((uint8_t)0x20)

Protected memory area defined by BLOCKPR starts from top or bottom

Definition at line 157 of file n25q128a.h.

#define N25Q128A_SR_SRWREN   ((uint8_t)0x80)

Status register write enable/disable

Definition at line 158 of file n25q128a.h.

#define N25Q128A_SR_WIP   ((uint8_t)0x01)

N25Q128A Registers.

Write in progress

Definition at line 154 of file n25q128a.h.

#define N25Q128A_SR_WREN   ((uint8_t)0x02)

Write enable latch

Definition at line 155 of file n25q128a.h.

#define N25Q128A_SUBSECTOR_ERASE_MAX_TIME   800

Definition at line 85 of file n25q128a.h.

#define N25Q128A_SUBSECTOR_SIZE   0x1000 /* 4096 subsectors of 4kBytes */

Definition at line 77 of file n25q128a.h.

#define N25Q128A_VCR_NB_DUMMY   ((uint8_t)0xF0)

Number of dummy clock cycles

Definition at line 172 of file n25q128a.h.

#define N25Q128A_VCR_WRAP   ((uint8_t)0x03)

Wrap

Definition at line 170 of file n25q128a.h.

#define N25Q128A_VCR_XIP   ((uint8_t)0x08)

XIP

Definition at line 171 of file n25q128a.h.

#define PAGE_PROG_CMD   0x02

Definition at line 132 of file n25q128a.h.

#define PROG_ERASE_RESUME_CMD   0x7A

Definition at line 143 of file n25q128a.h.

#define PROG_ERASE_SUSPEND_CMD   0x75

Definition at line 144 of file n25q128a.h.

#define PROG_OTP_ARRAY_CMD   0x42

Definition at line 148 of file n25q128a.h.

#define QUAD_IN_FAST_PROG_CMD   0x32

Definition at line 135 of file n25q128a.h.

#define QUAD_INOUT_FAST_READ_CMD   0xEB

Definition at line 106 of file n25q128a.h.

#define QUAD_OUT_FAST_READ_CMD   0x6B

Definition at line 105 of file n25q128a.h.

#define READ_CMD   0x03

Definition at line 101 of file n25q128a.h.

#define READ_ENHANCED_VOL_CFG_REG_CMD   0x65

Definition at line 128 of file n25q128a.h.

#define READ_FLAG_STATUS_REG_CMD   0x70

Definition at line 119 of file n25q128a.h.

#define READ_ID_CMD   0x9E

Definition at line 95 of file n25q128a.h.

#define READ_ID_CMD2   0x9F

Definition at line 96 of file n25q128a.h.

#define READ_LOCK_REG_CMD   0xE8

Definition at line 116 of file n25q128a.h.

#define READ_NONVOL_CFG_REG_CMD   0xB5

Definition at line 122 of file n25q128a.h.

#define READ_OTP_ARRAY_CMD   0x4B

Definition at line 147 of file n25q128a.h.

#define READ_SERIAL_FLASH_DISCO_PARAM_CMD   0x5A

Definition at line 98 of file n25q128a.h.

#define READ_STATUS_REG_CMD   0x05

Definition at line 113 of file n25q128a.h.

#define READ_VOL_CFG_REG_CMD   0x85

Definition at line 125 of file n25q128a.h.

#define RESET_ENABLE_CMD   0x66

N25Q128A Commands.

Definition at line 91 of file n25q128a.h.

#define RESET_MEMORY_CMD   0x99

Definition at line 92 of file n25q128a.h.

#define SECTOR_ERASE_CMD   0xD8

Definition at line 140 of file n25q128a.h.

#define SUBSECTOR_ERASE_CMD   0x20

Definition at line 139 of file n25q128a.h.

#define WRITE_DISABLE_CMD   0x04

Definition at line 110 of file n25q128a.h.

#define WRITE_ENABLE_CMD   0x06

Definition at line 109 of file n25q128a.h.

#define WRITE_ENHANCED_VOL_CFG_REG_CMD   0x61

Definition at line 129 of file n25q128a.h.

#define WRITE_LOCK_REG_CMD   0xE5

Definition at line 117 of file n25q128a.h.

#define WRITE_NONVOL_CFG_REG_CMD   0xB1

Definition at line 123 of file n25q128a.h.

#define WRITE_STATUS_REG_CMD   0x01

Definition at line 114 of file n25q128a.h.

#define WRITE_VOL_CFG_REG_CMD   0x81

Definition at line 126 of file n25q128a.h.