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STM32F769IDiscovery
1.00
uDANTE Audio Networking with STM32F7 DISCO board
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STM32F769IDiscovery
1.00
uDANTE Audio Networking with STM32F7 DISCO board
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| #define BULK_ERASE_CMD 0xC7 |
Definition at line 154 of file mx25l512.h.
| #define DUAL_INOUT_FAST_READ_4_BYTE_ADDR_CMD 0xBC |
Definition at line 115 of file mx25l512.h.
| #define DUAL_INOUT_FAST_READ_CMD 0xBB |
Definition at line 113 of file mx25l512.h.
| #define DUAL_INOUT_FAST_READ_DTR_CMD 0xBD |
Definition at line 114 of file mx25l512.h.
| #define DUAL_OUT_FAST_READ_4_BYTE_ADDR_CMD 0x3C |
Definition at line 111 of file mx25l512.h.
| #define DUAL_OUT_FAST_READ_CMD 0x3B |
Definition at line 110 of file mx25l512.h.
| #define ENTER_4_BYTE_ADDR_MODE_CMD 0xB7 |
Definition at line 160 of file mx25l512.h.
| #define ENTER_QUAD_CMD 0x35 |
Definition at line 164 of file mx25l512.h.
| #define EXIT_4_BYTE_ADDR_MODE_CMD 0xE9 |
Definition at line 161 of file mx25l512.h.
| #define EXIT_QUAD_CMD 0xF5 |
Definition at line 165 of file mx25l512.h.
| #define EXT_QUAD_IN_FAST_PROG_CMD 0x38 |
Definition at line 144 of file mx25l512.h.
| #define FAST_READ_4_BYTE_ADDR_CMD 0x0C |
Definition at line 108 of file mx25l512.h.
| #define FAST_READ_CMD 0x0B |
Definition at line 106 of file mx25l512.h.
| #define FAST_READ_DTR_CMD 0x0D |
Definition at line 107 of file mx25l512.h.
| #define MULTIPLE_IO_READ_ID_CMD 0xAF |
Definition at line 99 of file mx25l512.h.
| #define MX25L512_BULK_ERASE_MAX_TIME 600000 |
Definition at line 86 of file mx25l512.h.
| #define MX25L512_CR_4BYTE ((uint8_t)0x20) |
3-bytes or 4-bytes addressing
Definition at line 188 of file mx25l512.h.
| #define MX25L512_CR_NB_DUMMY ((uint8_t)0xC0) |
Number of dummy clock cycles
Definition at line 189 of file mx25l512.h.
| #define MX25L512_CR_ODS ((uint8_t)0x07) |
Output driver strength
Definition at line 179 of file mx25l512.h.
| #define MX25L512_CR_ODS_15 ((uint8_t)0x06) |
Output driver strength 15 ohms
Definition at line 181 of file mx25l512.h.
| #define MX25L512_CR_ODS_20 ((uint8_t)0x05) |
Output driver strength 20 ohms
Definition at line 182 of file mx25l512.h.
| #define MX25L512_CR_ODS_30 ((uint8_t)0x07) |
Output driver strength 30 ohms (default)
Definition at line 180 of file mx25l512.h.
| #define MX25L512_CR_ODS_45 ((uint8_t)0x03) |
Output driver strength 45 ohms
Definition at line 183 of file mx25l512.h.
| #define MX25L512_CR_ODS_60 ((uint8_t)0x02) |
Output driver strength 60 ohms
Definition at line 184 of file mx25l512.h.
| #define MX25L512_CR_ODS_90 ((uint8_t)0x01) |
Output driver strength 90 ohms
Definition at line 185 of file mx25l512.h.
| #define MX25L512_CR_PBE ((uint8_t)0x10) |
Preamble Bit Enable
Definition at line 187 of file mx25l512.h.
| #define MX25L512_CR_TB ((uint8_t)0x08) |
Top/Bottom bit used to configure the block protect area
Definition at line 186 of file mx25l512.h.
| #define MX25L512_DEVICE_ID_MEM_CAPACITY ((uint8_t)0x1A) |
Definition at line 193 of file mx25l512.h.
| #define MX25L512_DEVICE_ID_MEM_TYPE ((uint8_t)0x20) |
Definition at line 192 of file mx25l512.h.
| #define MX25L512_DUMMY_CYCLES_READ 8 |
Definition at line 81 of file mx25l512.h.
| #define MX25L512_DUMMY_CYCLES_READ_DTR 6 |
Definition at line 83 of file mx25l512.h.
| #define MX25L512_DUMMY_CYCLES_READ_QUAD 3 |
Definition at line 80 of file mx25l512.h.
| #define MX25L512_DUMMY_CYCLES_READ_QUAD_DTR 8 |
Definition at line 84 of file mx25l512.h.
| #define MX25L512_DUMMY_CYCLES_READ_QUAD_IO 10 |
Definition at line 82 of file mx25l512.h.
| #define MX25L512_FLASH_SIZE 0x4000000 /* 512 MBits => 64MBytes */ |
MX25L512 Configuration.
Definition at line 75 of file mx25l512.h.
| #define MX25L512_MANUFACTURER_ID ((uint8_t)0xC2) |
Definition at line 191 of file mx25l512.h.
| #define MX25L512_PAGE_SIZE 0x100 /* 262144 pages of 256 bytes */ |
Definition at line 78 of file mx25l512.h.
| #define MX25L512_SECTOR_ERASE_MAX_TIME 2000 |
Definition at line 87 of file mx25l512.h.
| #define MX25L512_SECTOR_SIZE 0x10000 /* 1024 sectors of 64KBytes */ |
Definition at line 76 of file mx25l512.h.
| #define MX25L512_SR_BLOCKPR ((uint8_t)0x5C) |
Block protected against program and erase operations
Definition at line 173 of file mx25l512.h.
| #define MX25L512_SR_PRBOTTOM ((uint8_t)0x20) |
Protected memory area defined by BLOCKPR starts from top or bottom
Definition at line 174 of file mx25l512.h.
| #define MX25L512_SR_QUADEN ((uint8_t)0x40) |
Quad IO mode enabled if =1
Definition at line 175 of file mx25l512.h.
| #define MX25L512_SR_SRWREN ((uint8_t)0x80) |
Status register write enable/disable
Definition at line 176 of file mx25l512.h.
| #define MX25L512_SR_WIP ((uint8_t)0x01) |
| #define MX25L512_SR_WREN ((uint8_t)0x02) |
Write enable latch
Definition at line 172 of file mx25l512.h.
| #define MX25L512_SUBSECTOR_ERASE_MAX_TIME 800 |
Definition at line 88 of file mx25l512.h.
| #define MX25L512_SUBSECTOR_SIZE 0x1000 /* 16384 subsectors of 4kBytes */ |
Definition at line 77 of file mx25l512.h.
| #define MX25L512_UNIQUE_ID_DATA_LENGTH ((uint8_t)0x10) /*JCC: not checked */ |
Definition at line 194 of file mx25l512.h.
| #define PAGE_PROG_CMD 0x02 |
Definition at line 140 of file mx25l512.h.
| #define PROG_ERASE_RESUME_CMD 0x30 |
Definition at line 156 of file mx25l512.h.
| #define PROG_ERASE_SUSPEND_CMD 0xB0 |
Definition at line 157 of file mx25l512.h.
| #define QPI_PAGE_PROG_4_BYTE_ADDR_CMD 0x12 |
Definition at line 141 of file mx25l512.h.
| #define QPI_READ_4_BYTE_ADDR_CMD 0xEC |
Definition at line 122 of file mx25l512.h.
| #define QUAD_IN_FAST_PROG_4_BYTE_ADDR_CMD 0x3E |
Definition at line 145 of file mx25l512.h.
| #define QUAD_IN_FAST_PROG_CMD 0x38 |
Definition at line 143 of file mx25l512.h.
| #define QUAD_INOUT_FAST_READ_CMD 0xEB |
Definition at line 120 of file mx25l512.h.
| #define QUAD_INOUT_FAST_READ_DTR_CMD 0xED |
Definition at line 121 of file mx25l512.h.
| #define QUAD_OUT_FAST_READ_4_BYTE_ADDR_CMD 0x6C |
Definition at line 118 of file mx25l512.h.
| #define QUAD_OUT_FAST_READ_CMD 0x6B |
Definition at line 117 of file mx25l512.h.
| #define READ_4_BYTE_ADDR_CMD 0x13 |
Definition at line 104 of file mx25l512.h.
| #define READ_CFG_REG_CMD 0x15 |
Definition at line 130 of file mx25l512.h.
| #define READ_CMD 0x03 |
Definition at line 103 of file mx25l512.h.
| #define READ_EXT_ADDR_REG_CMD 0xC8 |
Definition at line 136 of file mx25l512.h.
| #define READ_ID_CMD 0x9F |
Definition at line 98 of file mx25l512.h.
| #define READ_LOCK_REG_CMD 0x2D |
Definition at line 133 of file mx25l512.h.
| #define READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5A |
Definition at line 100 of file mx25l512.h.
| #define READ_STATUS_REG_CMD 0x05 |
Definition at line 129 of file mx25l512.h.
| #define RESET_ENABLE_CMD 0x66 |
MX25L512 Commands.
Definition at line 94 of file mx25l512.h.
| #define RESET_MEMORY_CMD 0x99 |
Definition at line 95 of file mx25l512.h.
| #define SECTOR_ERASE_4_BYTE_ADDR_CMD 0xDC |
Definition at line 152 of file mx25l512.h.
| #define SECTOR_ERASE_CMD 0xD8 |
Definition at line 151 of file mx25l512.h.
| #define SUBSECTOR_ERASE_4_BYTE_ADDR_CMD 0x21 |
Definition at line 149 of file mx25l512.h.
| #define SUBSECTOR_ERASE_CMD 0x20 |
Definition at line 148 of file mx25l512.h.
| #define WRITE_DISABLE_CMD 0x04 |
Definition at line 126 of file mx25l512.h.
| #define WRITE_ENABLE_CMD 0x06 |
Definition at line 125 of file mx25l512.h.
| #define WRITE_EXT_ADDR_REG_CMD 0xC5 |
Definition at line 137 of file mx25l512.h.
| #define WRITE_LOCK_REG_CMD 0x2C |
Definition at line 134 of file mx25l512.h.
| #define WRITE_STATUS_CFG_REG_CMD 0x01 |
Definition at line 131 of file mx25l512.h.
1.8.11
