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arm_offset_q7.c
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1 /* ----------------------------------------------------------------------
2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 *
4 * $Date: 19. March 2015
5 * $Revision: V.1.4.5
6 *
7 * Project: CMSIS DSP Library
8 * Title: arm_offset_q7.c
9 *
10 * Description: Q7 vector offset.
11 *
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * - Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 * - Neither the name of ARM LIMITED nor the names of its contributors
24 * may be used to endorse or promote products derived from this
25 * software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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39 * -------------------------------------------------------------------- */
40 
41 #include "arm_math.h"
42 
67  q7_t * pSrc,
68  q7_t offset,
69  q7_t * pDst,
70  uint32_t blockSize)
71 {
72  uint32_t blkCnt; /* loop counter */
73 
74 #ifndef ARM_MATH_CM0_FAMILY
75 
76 /* Run the below code for Cortex-M4 and Cortex-M3 */
77  q31_t offset_packed; /* Offset packed to 32 bit */
78 
79 
80  /*loop Unrolling */
81  blkCnt = blockSize >> 2u;
82 
83  /* Offset is packed to 32 bit in order to use SIMD32 for addition */
84  offset_packed = __PACKq7(offset, offset, offset, offset);
85 
86  /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
87  ** a second loop below computes the remaining 1 to 3 samples. */
88  while(blkCnt > 0u)
89  {
90  /* C = A + offset */
91  /* Add offset and then store the results in the destination bufferfor 4 samples at a time. */
92  *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed);
93 
94  /* Decrement the loop counter */
95  blkCnt--;
96  }
97 
98  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
99  ** No loop unrolling is used. */
100  blkCnt = blockSize % 0x4u;
101 
102  while(blkCnt > 0u)
103  {
104  /* C = A + offset */
105  /* Add offset and then store the result in the destination buffer. */
106  *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
107 
108  /* Decrement the loop counter */
109  blkCnt--;
110  }
111 
112 #else
113 
114  /* Run the below code for Cortex-M0 */
115 
116  /* Initialize blkCnt with number of samples */
117  blkCnt = blockSize;
118 
119  while(blkCnt > 0u)
120  {
121  /* C = A + offset */
122  /* Add offset and then store the result in the destination buffer. */
123  *pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8);
124 
125  /* Decrement the loop counter */
126  blkCnt--;
127  }
128 
129 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
130 
131 }
132 
int8_t q7_t
8-bit fractional data type in 1.7 format.
Definition: arm_math.h:387
#define __PACKq7(v0, v1, v2, v3)
definition to pack four 8 bit values.
Definition: arm_math.h:467
int16_t q15_t
16-bit fractional data type in 1.15 format.
Definition: arm_math.h:392
#define __SIMD32(addr)
definition to read/write two 16 bit values.
Definition: arm_math.h:445
int32_t q31_t
32-bit fractional data type in 1.31 format.
Definition: arm_math.h:397
void arm_offset_q7(q7_t *pSrc, q7_t offset, q7_t *pDst, uint32_t blockSize)
Adds a constant offset to a Q7 vector.
Definition: arm_offset_q7.c:66