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arm_cmplx_dot_prod_q15.c
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1 /* ----------------------------------------------------------------------
2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 *
4 * $Date: 19. March 2015
5 * $Revision: V.1.4.5
6 *
7 * Project: CMSIS DSP Library
8 * Title: arm_cmplx_dot_prod_q15.c
9 *
10 * Description: Processing function for the Q15 Complex Dot product
11 *
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
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21 * the documentation and/or other materials provided with the
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24 * may be used to endorse or promote products derived from this
25 * software without specific prior written permission.
26 *
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39 * -------------------------------------------------------------------- */
40 
41 #include "arm_math.h"
42 
71  q15_t * pSrcA,
72  q15_t * pSrcB,
73  uint32_t numSamples,
74  q31_t * realResult,
75  q31_t * imagResult)
76 {
77  q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */
78  q15_t a0,b0,c0,d0;
79 
80 #ifndef ARM_MATH_CM0_FAMILY
81 
82  /* Run the below code for Cortex-M4 and Cortex-M3 */
83  uint32_t blkCnt; /* loop counter */
84 
85 
86  /*loop Unrolling */
87  blkCnt = numSamples >> 2u;
88 
89  /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
90  ** a second loop below computes the remaining 1 to 3 samples. */
91  while(blkCnt > 0u)
92  {
93  a0 = *pSrcA++;
94  b0 = *pSrcA++;
95  c0 = *pSrcB++;
96  d0 = *pSrcB++;
97 
98  real_sum += (q31_t)a0 * c0;
99  imag_sum += (q31_t)a0 * d0;
100  real_sum -= (q31_t)b0 * d0;
101  imag_sum += (q31_t)b0 * c0;
102 
103  a0 = *pSrcA++;
104  b0 = *pSrcA++;
105  c0 = *pSrcB++;
106  d0 = *pSrcB++;
107 
108  real_sum += (q31_t)a0 * c0;
109  imag_sum += (q31_t)a0 * d0;
110  real_sum -= (q31_t)b0 * d0;
111  imag_sum += (q31_t)b0 * c0;
112 
113  a0 = *pSrcA++;
114  b0 = *pSrcA++;
115  c0 = *pSrcB++;
116  d0 = *pSrcB++;
117 
118  real_sum += (q31_t)a0 * c0;
119  imag_sum += (q31_t)a0 * d0;
120  real_sum -= (q31_t)b0 * d0;
121  imag_sum += (q31_t)b0 * c0;
122 
123  a0 = *pSrcA++;
124  b0 = *pSrcA++;
125  c0 = *pSrcB++;
126  d0 = *pSrcB++;
127 
128  real_sum += (q31_t)a0 * c0;
129  imag_sum += (q31_t)a0 * d0;
130  real_sum -= (q31_t)b0 * d0;
131  imag_sum += (q31_t)b0 * c0;
132 
133  /* Decrement the loop counter */
134  blkCnt--;
135  }
136 
137  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
138  ** No loop unrolling is used. */
139  blkCnt = numSamples % 0x4u;
140 
141  while(blkCnt > 0u)
142  {
143  a0 = *pSrcA++;
144  b0 = *pSrcA++;
145  c0 = *pSrcB++;
146  d0 = *pSrcB++;
147 
148  real_sum += (q31_t)a0 * c0;
149  imag_sum += (q31_t)a0 * d0;
150  real_sum -= (q31_t)b0 * d0;
151  imag_sum += (q31_t)b0 * c0;
152 
153  /* Decrement the loop counter */
154  blkCnt--;
155  }
156 
157 #else
158 
159  /* Run the below code for Cortex-M0 */
160 
161  while(numSamples > 0u)
162  {
163  a0 = *pSrcA++;
164  b0 = *pSrcA++;
165  c0 = *pSrcB++;
166  d0 = *pSrcB++;
167 
168  real_sum += a0 * c0;
169  imag_sum += a0 * d0;
170  real_sum -= b0 * d0;
171  imag_sum += b0 * c0;
172 
173 
174  /* Decrement the loop counter */
175  numSamples--;
176  }
177 
178 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
179 
180  /* Store the real and imaginary results in 8.24 format */
181  /* Convert real data in 34.30 to 8.24 by 6 right shifts */
182  *realResult = (q31_t) (real_sum >> 6);
183  /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
184  *imagResult = (q31_t) (imag_sum >> 6);
185 }
186 
int64_t q63_t
64-bit fractional data type in 1.63 format.
Definition: arm_math.h:402
void arm_cmplx_dot_prod_q15(q15_t *pSrcA, q15_t *pSrcB, uint32_t numSamples, q31_t *realResult, q31_t *imagResult)
Q15 complex dot product.
int16_t q15_t
16-bit fractional data type in 1.15 format.
Definition: arm_math.h:392
int32_t q31_t
32-bit fractional data type in 1.31 format.
Definition: arm_math.h:397