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arm_biquad_cascade_df1_init_q31.c
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/* ----------------------------------------------------------------------
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* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
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*
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* $Date: 19. March 2015
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* $Revision: V.1.4.5
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*
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* Project: CMSIS DSP Library
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* Title: arm_biquad_cascade_df1_init_q31.c
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*
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* Description: Q31 Biquad cascade DirectFormI(DF1) filter initialization function.
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*
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*
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* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of ARM LIMITED nor the names of its contributors
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* may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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* -------------------------------------------------------------------- */
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#include "
arm_math.h
"
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86
void
arm_biquad_cascade_df1_init_q31
(
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arm_biquad_casd_df1_inst_q31
* S,
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uint8_t numStages,
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q31_t
* pCoeffs,
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q31_t
* pState,
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int8_t postShift)
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{
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/* Assign filter stages */
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S->
numStages
= numStages;
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/* Assign postShift to be applied to the output */
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S->
postShift
= postShift;
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/* Assign coefficient pointer */
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S->
pCoeffs
= pCoeffs;
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/* Clear state buffer and size is always 4 * numStages */
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memset(pState, 0, (4u * (uint32_t) numStages) *
sizeof
(
q31_t
));
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/* Assign state pointer */
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S->
pState
= pState;
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}
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arm_math.h
arm_biquad_casd_df1_inst_q31::pCoeffs
q31_t * pCoeffs
Definition:
arm_math.h:1235
arm_biquad_cascade_df1_init_q31
void arm_biquad_cascade_df1_init_q31(arm_biquad_casd_df1_inst_q31 *S, uint8_t numStages, q31_t *pCoeffs, q31_t *pState, int8_t postShift)
Initialization function for the Q31 Biquad cascade filter.
Definition:
arm_biquad_cascade_df1_init_q31.c:86
arm_biquad_casd_df1_inst_q31
Instance structure for the Q31 Biquad cascade filter.
Definition:
arm_math.h:1231
q31_t
int32_t q31_t
32-bit fractional data type in 1.31 format.
Definition:
arm_math.h:397
arm_biquad_casd_df1_inst_q31::pState
q31_t * pState
Definition:
arm_math.h:1234
arm_biquad_casd_df1_inst_q31::numStages
uint32_t numStages
Definition:
arm_math.h:1233
arm_biquad_casd_df1_inst_q31::postShift
uint8_t postShift
Definition:
arm_math.h:1236
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