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arm_add_q31.c
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1 /* ----------------------------------------------------------------------
2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 *
4 * $Date: 19. March 2015
5 * $Revision: V.1.4.5
6 *
7 * Project: CMSIS DSP Library
8 * Title: arm_add_q31.c
9 *
10 * Description: Q31 vector addition.
11 *
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
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17 * - Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 * - Neither the name of ARM LIMITED nor the names of its contributors
24 * may be used to endorse or promote products derived from this
25 * software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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39 * -------------------------------------------------------------------- */
40 
41 #include "arm_math.h"
42 
68  q31_t * pSrcA,
69  q31_t * pSrcB,
70  q31_t * pDst,
71  uint32_t blockSize)
72 {
73  uint32_t blkCnt; /* loop counter */
74 
75 #ifndef ARM_MATH_CM0_FAMILY
76 
77 /* Run the below code for Cortex-M4 and Cortex-M3 */
78  q31_t inA1, inA2, inA3, inA4;
79  q31_t inB1, inB2, inB3, inB4;
80 
81  /*loop Unrolling */
82  blkCnt = blockSize >> 2u;
83 
84  /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
85  ** a second loop below computes the remaining 1 to 3 samples. */
86  while(blkCnt > 0u)
87  {
88  /* C = A + B */
89  /* Add and then store the results in the destination buffer. */
90  inA1 = *pSrcA++;
91  inA2 = *pSrcA++;
92  inB1 = *pSrcB++;
93  inB2 = *pSrcB++;
94 
95  inA3 = *pSrcA++;
96  inA4 = *pSrcA++;
97  inB3 = *pSrcB++;
98  inB4 = *pSrcB++;
99 
100  *pDst++ = __QADD(inA1, inB1);
101  *pDst++ = __QADD(inA2, inB2);
102  *pDst++ = __QADD(inA3, inB3);
103  *pDst++ = __QADD(inA4, inB4);
104 
105  /* Decrement the loop counter */
106  blkCnt--;
107  }
108 
109  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
110  ** No loop unrolling is used. */
111  blkCnt = blockSize % 0x4u;
112 
113  while(blkCnt > 0u)
114  {
115  /* C = A + B */
116  /* Add and then store the results in the destination buffer. */
117  *pDst++ = __QADD(*pSrcA++, *pSrcB++);
118 
119  /* Decrement the loop counter */
120  blkCnt--;
121  }
122 
123 #else
124 
125  /* Run the below code for Cortex-M0 */
126 
127 
128 
129  /* Initialize blkCnt with number of samples */
130  blkCnt = blockSize;
131 
132  while(blkCnt > 0u)
133  {
134  /* C = A + B */
135  /* Add and then store the results in the destination buffer. */
136  *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++);
137 
138  /* Decrement the loop counter */
139  blkCnt--;
140  }
141 
142 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
143 
144 }
145 
int64_t q63_t
64-bit fractional data type in 1.63 format.
Definition: arm_math.h:402
void arm_add_q31(q31_t *pSrcA, q31_t *pSrcB, q31_t *pDst, uint32_t blockSize)
Q31 vector addition.
Definition: arm_add_q31.c:67
int32_t q31_t
32-bit fractional data type in 1.31 format.
Definition: arm_math.h:397