STM32F769IDiscovery  1.00
uDANTE Audio Networking with STM32F7 DISCO board
Data Structures | Macros | Functions
stm32f7xx_ll_sdmmc.h File Reference

Header file of SDMMC HAL module. More...

#include "stm32f7xx_hal_def.h"

Go to the source code of this file.

Data Structures

struct  SDMMC_InitTypeDef
 SDMMC Configuration Structure definition. More...
 
struct  SDMMC_CmdInitTypeDef
 SDMMC Command Control structure. More...
 
struct  SDMMC_DataInitTypeDef
 SDMMC Data Control structure. More...
 

Macros

#define SDMMC_CLOCK_EDGE_RISING   ((uint32_t)0x00000000U)
 
#define SDMMC_CLOCK_EDGE_FALLING   SDMMC_CLKCR_NEGEDGE
 
#define IS_SDMMC_CLOCK_EDGE(EDGE)
 
#define SDMMC_CLOCK_BYPASS_DISABLE   ((uint32_t)0x00000000U)
 
#define SDMMC_CLOCK_BYPASS_ENABLE   SDMMC_CLKCR_BYPASS
 
#define IS_SDMMC_CLOCK_BYPASS(BYPASS)
 
#define SDMMC_CLOCK_POWER_SAVE_DISABLE   ((uint32_t)0x00000000U)
 
#define SDMMC_CLOCK_POWER_SAVE_ENABLE   SDMMC_CLKCR_PWRSAV
 
#define IS_SDMMC_CLOCK_POWER_SAVE(SAVE)
 
#define SDMMC_BUS_WIDE_1B   ((uint32_t)0x00000000U)
 
#define SDMMC_BUS_WIDE_4B   SDMMC_CLKCR_WIDBUS_0
 
#define SDMMC_BUS_WIDE_8B   SDMMC_CLKCR_WIDBUS_1
 
#define IS_SDMMC_BUS_WIDE(WIDE)
 
#define SDMMC_HARDWARE_FLOW_CONTROL_DISABLE   ((uint32_t)0x00000000U)
 
#define SDMMC_HARDWARE_FLOW_CONTROL_ENABLE   SDMMC_CLKCR_HWFC_EN
 
#define IS_SDMMC_HARDWARE_FLOW_CONTROL(CONTROL)
 
#define IS_SDMMC_CLKDIV(DIV)    ((DIV) <= 0xFF)
 
#define IS_SDMMC_CMD_INDEX(INDEX)    ((INDEX) < 0x40)
 
#define SDMMC_RESPONSE_NO   ((uint32_t)0x00000000U)
 
#define SDMMC_RESPONSE_SHORT   SDMMC_CMD_WAITRESP_0
 
#define SDMMC_RESPONSE_LONG   SDMMC_CMD_WAITRESP
 
#define IS_SDMMC_RESPONSE(RESPONSE)
 
#define SDMMC_WAIT_NO   ((uint32_t)0x00000000U)
 
#define SDMMC_WAIT_IT   SDMMC_CMD_WAITINT
 
#define SDMMC_WAIT_PEND   SDMMC_CMD_WAITPEND
 
#define IS_SDMMC_WAIT(WAIT)
 
#define SDMMC_CPSM_DISABLE   ((uint32_t)0x00000000U)
 
#define SDMMC_CPSM_ENABLE   SDMMC_CMD_CPSMEN
 
#define IS_SDMMC_CPSM(CPSM)
 
#define SDMMC_RESP1   ((uint32_t)0x00000000U)
 
#define SDMMC_RESP2   ((uint32_t)0x00000004U)
 
#define SDMMC_RESP3   ((uint32_t)0x00000008U)
 
#define SDMMC_RESP4   ((uint32_t)0x0000000C)
 
#define IS_SDMMC_RESP(RESP)
 
#define IS_SDMMC_DATA_LENGTH(LENGTH)   ((LENGTH) <= 0x01FFFFFF)
 
#define SDMMC_DATABLOCK_SIZE_1B   ((uint32_t)0x00000000U)
 
#define SDMMC_DATABLOCK_SIZE_2B   SDMMC_DCTRL_DBLOCKSIZE_0
 
#define SDMMC_DATABLOCK_SIZE_4B   SDMMC_DCTRL_DBLOCKSIZE_1
 
#define SDMMC_DATABLOCK_SIZE_8B   (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_1)
 
#define SDMMC_DATABLOCK_SIZE_16B   SDMMC_DCTRL_DBLOCKSIZE_2
 
#define SDMMC_DATABLOCK_SIZE_32B   (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_2)
 
#define SDMMC_DATABLOCK_SIZE_64B   (SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_2)
 
#define SDMMC_DATABLOCK_SIZE_128B   (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_2)
 
#define SDMMC_DATABLOCK_SIZE_256B   SDMMC_DCTRL_DBLOCKSIZE_3
 
#define SDMMC_DATABLOCK_SIZE_512B   (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_3)
 
#define SDMMC_DATABLOCK_SIZE_1024B   (SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_3)
 
#define SDMMC_DATABLOCK_SIZE_2048B   (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_3)
 
#define SDMMC_DATABLOCK_SIZE_4096B   (SDMMC_DCTRL_DBLOCKSIZE_2|SDMMC_DCTRL_DBLOCKSIZE_3)
 
#define SDMMC_DATABLOCK_SIZE_8192B   (SDMMC_DCTRL_DBLOCKSIZE_0|SDMMC_DCTRL_DBLOCKSIZE_2|SDMMC_DCTRL_DBLOCKSIZE_3)
 
#define SDMMC_DATABLOCK_SIZE_16384B   (SDMMC_DCTRL_DBLOCKSIZE_1|SDMMC_DCTRL_DBLOCKSIZE_2|SDMMC_DCTRL_DBLOCKSIZE_3)
 
#define IS_SDMMC_BLOCK_SIZE(SIZE)
 
#define SDMMC_TRANSFER_DIR_TO_CARD   ((uint32_t)0x00000000U)
 
#define SDMMC_TRANSFER_DIR_TO_SDMMC   SDMMC_DCTRL_DTDIR
 
#define IS_SDMMC_TRANSFER_DIR(DIR)
 
#define SDMMC_TRANSFER_MODE_BLOCK   ((uint32_t)0x00000000U)
 
#define SDMMC_TRANSFER_MODE_STREAM   SDMMC_DCTRL_DTMODE
 
#define IS_SDMMC_TRANSFER_MODE(MODE)
 
#define SDMMC_DPSM_DISABLE   ((uint32_t)0x00000000U)
 
#define SDMMC_DPSM_ENABLE   SDMMC_DCTRL_DTEN
 
#define IS_SDMMC_DPSM(DPSM)
 
#define SDMMC_READ_WAIT_MODE_DATA2   ((uint32_t)0x00000000U)
 
#define SDMMC_READ_WAIT_MODE_CLK   (SDMMC_DCTRL_RWMOD)
 
#define IS_SDMMC_READWAIT_MODE(MODE)
 
#define SDMMC_IT_CCRCFAIL   SDMMC_STA_CCRCFAIL
 
#define SDMMC_IT_DCRCFAIL   SDMMC_STA_DCRCFAIL
 
#define SDMMC_IT_CTIMEOUT   SDMMC_STA_CTIMEOUT
 
#define SDMMC_IT_DTIMEOUT   SDMMC_STA_DTIMEOUT
 
#define SDMMC_IT_TXUNDERR   SDMMC_STA_TXUNDERR
 
#define SDMMC_IT_RXOVERR   SDMMC_STA_RXOVERR
 
#define SDMMC_IT_CMDREND   SDMMC_STA_CMDREND
 
#define SDMMC_IT_CMDSENT   SDMMC_STA_CMDSENT
 
#define SDMMC_IT_DATAEND   SDMMC_STA_DATAEND
 
#define SDMMC_IT_DBCKEND   SDMMC_STA_DBCKEND
 
#define SDMMC_IT_CMDACT   SDMMC_STA_CMDACT
 
#define SDMMC_IT_TXACT   SDMMC_STA_TXACT
 
#define SDMMC_IT_RXACT   SDMMC_STA_RXACT
 
#define SDMMC_IT_TXFIFOHE   SDMMC_STA_TXFIFOHE
 
#define SDMMC_IT_RXFIFOHF   SDMMC_STA_RXFIFOHF
 
#define SDMMC_IT_TXFIFOF   SDMMC_STA_TXFIFOF
 
#define SDMMC_IT_RXFIFOF   SDMMC_STA_RXFIFOF
 
#define SDMMC_IT_TXFIFOE   SDMMC_STA_TXFIFOE
 
#define SDMMC_IT_RXFIFOE   SDMMC_STA_RXFIFOE
 
#define SDMMC_IT_TXDAVL   SDMMC_STA_TXDAVL
 
#define SDMMC_IT_RXDAVL   SDMMC_STA_RXDAVL
 
#define SDMMC_IT_SDIOIT   SDMMC_STA_SDIOIT
 
#define SDMMC_FLAG_CCRCFAIL   SDMMC_STA_CCRCFAIL
 
#define SDMMC_FLAG_DCRCFAIL   SDMMC_STA_DCRCFAIL
 
#define SDMMC_FLAG_CTIMEOUT   SDMMC_STA_CTIMEOUT
 
#define SDMMC_FLAG_DTIMEOUT   SDMMC_STA_DTIMEOUT
 
#define SDMMC_FLAG_TXUNDERR   SDMMC_STA_TXUNDERR
 
#define SDMMC_FLAG_RXOVERR   SDMMC_STA_RXOVERR
 
#define SDMMC_FLAG_CMDREND   SDMMC_STA_CMDREND
 
#define SDMMC_FLAG_CMDSENT   SDMMC_STA_CMDSENT
 
#define SDMMC_FLAG_DATAEND   SDMMC_STA_DATAEND
 
#define SDMMC_FLAG_DBCKEND   SDMMC_STA_DBCKEND
 
#define SDMMC_FLAG_CMDACT   SDMMC_STA_CMDACT
 
#define SDMMC_FLAG_TXACT   SDMMC_STA_TXACT
 
#define SDMMC_FLAG_RXACT   SDMMC_STA_RXACT
 
#define SDMMC_FLAG_TXFIFOHE   SDMMC_STA_TXFIFOHE
 
#define SDMMC_FLAG_RXFIFOHF   SDMMC_STA_RXFIFOHF
 
#define SDMMC_FLAG_TXFIFOF   SDMMC_STA_TXFIFOF
 
#define SDMMC_FLAG_RXFIFOF   SDMMC_STA_RXFIFOF
 
#define SDMMC_FLAG_TXFIFOE   SDMMC_STA_TXFIFOE
 
#define SDMMC_FLAG_RXFIFOE   SDMMC_STA_RXFIFOE
 
#define SDMMC_FLAG_TXDAVL   SDMMC_STA_TXDAVL
 
#define SDMMC_FLAG_RXDAVL   SDMMC_STA_RXDAVL
 
#define SDMMC_FLAG_SDIOIT   SDMMC_STA_SDIOIT
 
#define CLKCR_CLEAR_MASK
 
#define DCTRL_CLEAR_MASK
 
#define CMD_CLEAR_MASK
 
#define SDMMC_INIT_CLK_DIV   ((uint8_t)0x76)
 
#define SDMMC_TRANSFER_CLK_DIV   ((uint8_t)0x0)
 
#define __SDMMC_ENABLE(__INSTANCE__)   ((__INSTANCE__)->CLKCR |= SDMMC_CLKCR_CLKEN)
 Enable the SDMMC device. More...
 
#define __SDMMC_DISABLE(__INSTANCE__)   ((__INSTANCE__)->CLKCR &= ~SDMMC_CLKCR_CLKEN)
 Disable the SDMMC device. More...
 
#define __SDMMC_DMA_ENABLE(__INSTANCE__)   ((__INSTANCE__)->DCTRL |= SDMMC_DCTRL_DMAEN)
 Enable the SDMMC DMA transfer. More...
 
#define __SDMMC_DMA_DISABLE(__INSTANCE__)   ((__INSTANCE__)->DCTRL &= ~SDMMC_DCTRL_DMAEN)
 Disable the SDMMC DMA transfer. More...
 
#define __SDMMC_ENABLE_IT(__INSTANCE__, __INTERRUPT__)   ((__INSTANCE__)->MASK |= (__INTERRUPT__))
 Enable the SDMMC device interrupt. More...
 
#define __SDMMC_DISABLE_IT(__INSTANCE__, __INTERRUPT__)   ((__INSTANCE__)->MASK &= ~(__INTERRUPT__))
 Disable the SDMMC device interrupt. More...
 
#define __SDMMC_GET_FLAG(__INSTANCE__, __FLAG__)   (((__INSTANCE__)->STA &(__FLAG__)) != RESET)
 Checks whether the specified SDMMC flag is set or not. More...
 
#define __SDMMC_CLEAR_FLAG(__INSTANCE__, __FLAG__)   ((__INSTANCE__)->ICR = (__FLAG__))
 Clears the SDMMC pending flags. More...
 
#define __SDMMC_GET_IT   (__INSTANCE__, __INTERRUPT__) (((__INSTANCE__)->STA &(__INTERRUPT__)) == (__INTERRUPT__))
 Checks whether the specified SDMMC interrupt has occurred or not. More...
 
#define __SDMMC_CLEAR_IT(__INSTANCE__, __INTERRUPT__)   ((__INSTANCE__)->ICR = (__INTERRUPT__))
 Clears the SDMMC's interrupt pending bits. More...
 
#define __SDMMC_START_READWAIT_ENABLE(__INSTANCE__)   ((__INSTANCE__)->DCTRL |= SDMMC_DCTRL_RWSTART)
 Enable Start the SD I/O Read Wait operation. More...
 
#define __SDMMC_START_READWAIT_DISABLE(__INSTANCE__)   ((__INSTANCE__)->DCTRL &= ~SDMMC_DCTRL_RWSTART)
 Disable Start the SD I/O Read Wait operations. More...
 
#define __SDMMC_STOP_READWAIT_ENABLE(__INSTANCE__)   ((__INSTANCE__)->DCTRL |= SDMMC_DCTRL_RWSTOP)
 Enable Start the SD I/O Read Wait operation. More...
 
#define __SDMMC_STOP_READWAIT_DISABLE(__INSTANCE__)   ((__INSTANCE__)->DCTRL &= ~SDMMC_DCTRL_RWSTOP)
 Disable Stop the SD I/O Read Wait operations. More...
 
#define __SDMMC_OPERATION_ENABLE(__INSTANCE__)   ((__INSTANCE__)->DCTRL |= SDMMC_DCTRL_SDIOEN)
 Enable the SD I/O Mode Operation. More...
 
#define __SDMMC_OPERATION_DISABLE(__INSTANCE__)   ((__INSTANCE__)->DCTRL &= ~SDMMC_DCTRL_SDIOEN)
 Disable the SD I/O Mode Operation. More...
 
#define __SDMMC_SUSPEND_CMD_ENABLE(__INSTANCE__)   ((__INSTANCE__)->CMD |= SDMMC_CMD_SDIOSUSPEND)
 Enable the SD I/O Suspend command sending. More...
 
#define __SDMMC_SUSPEND_CMD_DISABLE(__INSTANCE__)   ((__INSTANCE__)->CMD &= ~SDMMC_CMD_SDIOSUSPEND)
 Disable the SD I/O Suspend command sending. More...
 

Functions

HAL_StatusTypeDef SDMMC_Init (SDMMC_TypeDef *SDMMCx, SDMMC_InitTypeDef Init)
 
uint32_t SDMMC_ReadFIFO (SDMMC_TypeDef *SDMMCx)
 
HAL_StatusTypeDef SDMMC_WriteFIFO (SDMMC_TypeDef *SDMMCx, uint32_t *pWriteData)
 
HAL_StatusTypeDef SDMMC_PowerState_ON (SDMMC_TypeDef *SDMMCx)
 
HAL_StatusTypeDef SDMMC_PowerState_OFF (SDMMC_TypeDef *SDMMCx)
 
uint32_t SDMMC_GetPowerState (SDMMC_TypeDef *SDMMCx)
 
HAL_StatusTypeDef SDMMC_SendCommand (SDMMC_TypeDef *SDMMCx, SDMMC_CmdInitTypeDef *Command)
 
uint8_t SDMMC_GetCommandResponse (SDMMC_TypeDef *SDMMCx)
 
uint32_t SDMMC_GetResponse (SDMMC_TypeDef *SDMMCx, uint32_t Response)
 
HAL_StatusTypeDef SDMMC_DataConfig (SDMMC_TypeDef *SDMMCx, SDMMC_DataInitTypeDef *Data)
 
uint32_t SDMMC_GetDataCounter (SDMMC_TypeDef *SDMMCx)
 
uint32_t SDMMC_GetFIFOCount (SDMMC_TypeDef *SDMMCx)
 
HAL_StatusTypeDef SDMMC_SetSDMMCReadWaitMode (SDMMC_TypeDef *SDMMCx, uint32_t SDMMC_ReadWaitMode)
 

Detailed Description

Header file of SDMMC HAL module.

Author
MCD Application Team
Version
V1.1.0
Date
22-April-2016
Attention

© COPYRIGHT(c) 2016 STMicroelectronics

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
  3. Neither the name of STMicroelectronics nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Definition in file stm32f7xx_ll_sdmmc.h.

Generated by   doxygen 1.8.11